diff --git a/docs-site/.dockerignore b/docs-site/.dockerignore new file mode 100644 index 0000000..9b3842b --- /dev/null +++ b/docs-site/.dockerignore @@ -0,0 +1,7 @@ +node_modules +dist +.astro +.env +.git +.gitignore +*.md diff --git a/docs-site/.env.example b/docs-site/.env.example new file mode 100644 index 0000000..fa3ebd7 --- /dev/null +++ b/docs-site/.env.example @@ -0,0 +1,3 @@ +COMPOSE_PROJECT=mckicad-docs +DOMAIN=mckicad.warehack.ing +MODE=prod diff --git a/docs-site/.gitignore b/docs-site/.gitignore new file mode 100644 index 0000000..0564e93 --- /dev/null +++ b/docs-site/.gitignore @@ -0,0 +1,4 @@ +node_modules/ +dist/ +.astro/ +.env diff --git a/docs-site/Caddyfile b/docs-site/Caddyfile new file mode 100644 index 0000000..c4e4fa4 --- /dev/null +++ b/docs-site/Caddyfile @@ -0,0 +1,11 @@ +:80 { + root * /srv + file_server + try_files {path} {path}/ /index.html + + @nocache path /robots.txt /sitemap-index.xml /sitemap-*.xml + header @nocache Cache-Control "no-cache, max-age=0" + + @hashed path /_astro/* + header @hashed Cache-Control "public, max-age=31536000, immutable" +} diff --git a/docs-site/Dockerfile b/docs-site/Dockerfile new file mode 100644 index 0000000..b359058 --- /dev/null +++ b/docs-site/Dockerfile @@ -0,0 +1,27 @@ +# Stage 1: Build static site +FROM node:22-slim AS builder + +WORKDIR /app +COPY package.json package-lock.json* ./ +RUN npm ci +COPY . . +RUN npm run build + +# Stage 2: Production — serve static dist via Caddy +FROM caddy:2-alpine AS prod + +COPY Caddyfile /etc/caddy/Caddyfile +COPY --from=builder /app/dist /srv + +EXPOSE 80 + +# Stage 3: Development — Node with HMR +FROM node:22-slim AS dev + +WORKDIR /app +COPY package.json package-lock.json* ./ +RUN npm ci +COPY . . + +EXPOSE 4321 +CMD ["npm", "run", "dev", "--", "--host", "0.0.0.0"] diff --git a/docs-site/Makefile b/docs-site/Makefile new file mode 100644 index 0000000..ec237bb --- /dev/null +++ b/docs-site/Makefile @@ -0,0 +1,11 @@ +prod: + docker compose up -d --build + +dev: + docker compose --profile dev up --build + +down: + docker compose down + +logs: + docker compose logs -f diff --git a/docs-site/astro.config.mjs b/docs-site/astro.config.mjs new file mode 100644 index 0000000..9135203 --- /dev/null +++ b/docs-site/astro.config.mjs @@ -0,0 +1,76 @@ +import { defineConfig } from "astro/config"; +import starlight from "@astrojs/starlight"; + +export default defineConfig({ + site: "https://mckicad.warehack.ing", + integrations: [ + starlight({ + title: "mckicad", + description: + "MCP server for KiCad electronic design automation", + social: [ + { + icon: "github", + label: "Source", + href: "https://git.supported.systems/MCP/kicad-mcp", + }, + ], + editLink: { + baseUrl: + "https://git.supported.systems/MCP/kicad-mcp/_edit/main/docs-site/", + }, + customCss: ["./src/styles/custom.css"], + sidebar: [ + { + label: "Getting Started", + items: [ + { label: "Introduction", slug: "getting-started" }, + { label: "Installation", slug: "getting-started/installation" }, + { label: "Configuration", slug: "getting-started/configuration" }, + ], + }, + { + label: "Guides", + items: [ + { label: "Project Management", slug: "guides/projects" }, + { label: "Schematic Patterns", slug: "guides/patterns" }, + { label: "Autowiring", slug: "guides/autowire" }, + { label: "Netlist Import", slug: "guides/netlist" }, + { label: "BOM Management", slug: "guides/bom" }, + { label: "Design Rule Checks", slug: "guides/drc" }, + { label: "Board Analysis", slug: "guides/analysis" }, + { label: "Export & Manufacturing", slug: "guides/export" }, + { label: "Prompt Templates", slug: "guides/prompts" }, + ], + }, + { + label: "Reference", + items: [ + { label: "Tool Reference", slug: "reference/tools" }, + { label: "Batch Operations", slug: "reference/batch" }, + { label: "Environment Variables", slug: "reference/environment" }, + ], + }, + { + label: "Development", + items: [ + { label: "Architecture", slug: "development/architecture" }, + { label: "Adding Tools", slug: "development/adding-tools" }, + { label: "Troubleshooting", slug: "development/troubleshooting" }, + ], + }, + ], + head: [ + { + tag: "meta", + attrs: { + name: "robots", + content: "index, follow", + }, + }, + ], + }), + ], + telemetry: false, + devToolbar: { enabled: false }, +}); diff --git a/docs-site/docker-compose.yml b/docs-site/docker-compose.yml new file mode 100644 index 0000000..166638c --- /dev/null +++ b/docs-site/docker-compose.yml @@ -0,0 +1,32 @@ +name: ${COMPOSE_PROJECT} + +services: + docs: + build: + context: . + target: prod + container_name: ${COMPOSE_PROJECT}-prod + restart: unless-stopped + networks: + - caddy + labels: + caddy: ${DOMAIN} + caddy.reverse_proxy: "{{upstreams 80}}" + + docs-dev: + build: + context: . + target: dev + container_name: ${COMPOSE_PROJECT}-dev + profiles: + - dev + ports: + - "4321:4321" + volumes: + - ./src:/app/src + - ./public:/app/public + - ./astro.config.mjs:/app/astro.config.mjs + +networks: + caddy: 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0000000..c2a49f4 --- /dev/null +++ b/docs-site/public/robots.txt @@ -0,0 +1,2 @@ +User-agent: * +Allow: / diff --git a/docs-site/src/content.config.ts b/docs-site/src/content.config.ts new file mode 100644 index 0000000..7fbcf2c --- /dev/null +++ b/docs-site/src/content.config.ts @@ -0,0 +1,7 @@ +import { defineCollection } from "astro:content"; +import { docsLoader } from "@astrojs/starlight/loaders"; +import { docsSchema } from "@astrojs/starlight/schema"; + +export const collections = { + docs: defineCollection({ loader: docsLoader(), schema: docsSchema() }), +}; diff --git a/docs-site/src/content/docs/development/adding-tools.md b/docs-site/src/content/docs/development/adding-tools.md new file mode 100644 index 0000000..a1bee2d --- /dev/null +++ b/docs-site/src/content/docs/development/adding-tools.md @@ -0,0 +1,202 @@ +--- +title: "Adding Tools" +description: "How to add new tools, resources, and prompts to mckicad" +--- + +This guide covers the process of extending mckicad with new tools, resources, and prompt templates. + +## Adding a new tool + +### 1. Choose the right module + +Look at the existing modules in `tools/` and decide where your tool fits: + +- `schematic.py` -- schematic creation and reading +- `schematic_edit.py` -- schematic modification and removal +- `schematic_analysis.py` -- connectivity, ERC, validation +- `schematic_patterns.py` -- circuit building block patterns +- `batch.py` -- batch operations +- `project.py` -- project discovery and management +- `drc.py` -- design rule checks +- `bom.py` -- BOM operations +- `export.py` -- file export (Gerber, PDF, SVG) +- `routing.py` -- autorouting +- `analysis.py` -- board-level analysis +- `pcb.py` -- live PCB manipulation via IPC + +If none of the existing modules fit, create a new one in `tools/`. + +### 2. Write the tool function + +Import `mcp` from `mckicad.server` and decorate with `@mcp.tool()`: + +```python +# tools/my_module.py +from typing import Any +from mckicad.server import mcp + +@mcp.tool() +def my_new_tool(param: str) -> dict[str, Any]: + """Clear description of what this tool does. + + The docstring is shown to the LLM, so make it specific and actionable. + Describe what the tool returns and when to use it. + """ + try: + # Your implementation + result = do_something(param) + return {"success": True, "data": result} + except Exception as e: + return {"success": False, "error": str(e)} +``` + +Follow the return convention: always include `success: bool`. On failure, include `error: str`. On success, include relevant data fields. + +### 3. Register the module + +If you created a new module, add an import in `server.py`: + +```python +# server.py - add with the other tool imports +import mckicad.tools.my_module # noqa: F401 +``` + +The import triggers the `@mcp.tool()` decorators, which register the functions with the server. No additional registration code is needed. + +### 4. Write tests + +Create a test file in `tests/`: + +```python +# tests/test_my_module.py +import pytest +from mckicad.tools.my_module import my_new_tool + +def test_my_new_tool_success(tmp_path): + result = my_new_tool(str(tmp_path / "test.kicad_sch")) + assert result["success"] is True + +def test_my_new_tool_missing_file(): + result = my_new_tool("/nonexistent/path.kicad_sch") + assert result["success"] is False + assert "error" in result +``` + +Use appropriate test markers: `@pytest.mark.unit`, `@pytest.mark.integration`, `@pytest.mark.requires_kicad`. + +### 5. Run tests and lint + +```bash +make test tests/test_my_module.py +make lint +``` + +## Adding a new resource + +Resources provide read-only data to the LLM. Add them in `resources/`: + +```python +# resources/my_resource.py +from mckicad.server import mcp + +@mcp.resource("kicad://my-data/{parameter}") +def my_custom_resource(parameter: str) -> str: + """Description of what this resource provides.""" + # Return formatted text for the LLM + return f"Data about {parameter}" +``` + +Import the module in `server.py` to trigger registration. + +## Adding a new prompt template + +Prompts are reusable conversation starters. Add them in `prompts/`: + +```python +# prompts/my_prompts.py +from mckicad.server import mcp + +@mcp.prompt() +def my_workflow_prompt() -> str: + """Description of what this prompt helps with.""" + return """ + I need help with [specific KiCad task]. Please assist me with: + + 1. [First aspect] + 2. [Second aspect] + 3. [Third aspect] + + My KiCad project is located at: + [Enter the full path to your .kicad_pro file here] + """ +``` + +## Best practices + +### Docstrings + +The tool docstring is shown directly to the calling LLM. Make it: +- **Specific** -- describe exactly what the tool does and returns +- **Actionable** -- explain when to use this tool vs alternatives +- **Concise** -- LLMs work better with focused descriptions + +### Error handling + +Always catch exceptions and return structured errors: + +```python +@mcp.tool() +def my_tool(path: str) -> dict[str, Any]: + """...""" + if not path: + return {"success": False, "error": "Path must be non-empty"} + try: + # ... + return {"success": True, "data": result} + except FileNotFoundError: + return {"success": False, "error": f"File not found: {path}"} + except Exception as e: + return {"success": False, "error": str(e)} +``` + +### Path validation + +Use the path validator for any file access: + +```python +from mckicad.utils.path_validator import validate_path + +err = validate_path(path) +if err: + return {"success": False, "error": err} +``` + +### External commands + +Use the secure subprocess wrapper for any external command execution: + +```python +from mckicad.utils.secure_subprocess import run_command + +result = run_command(["kicad-cli", "pcb", "export", "svg", pcb_path]) +``` + +### Logging + +Use the module logger, never `print()`: + +```python +import logging +logger = logging.getLogger(__name__) + +logger.info("Processing %s", path) +logger.warning("Unexpected format in %s", path) +logger.error("Failed to process %s: %s", path, e) +``` + +## Performance + +- Use caching for expensive operations (the lifespan context provides a cache dict) +- Report progress for long-running operations via `ctx.report_progress()` +- Use `asyncio` for concurrent operations where appropriate +- Keep tool responses focused -- return what the LLM needs, not everything available diff --git a/docs-site/src/content/docs/development/architecture.md b/docs-site/src/content/docs/development/architecture.md new file mode 100644 index 0000000..f681887 --- /dev/null +++ b/docs-site/src/content/docs/development/architecture.md @@ -0,0 +1,143 @@ +--- +title: "Architecture" +description: "Internal architecture and design decisions of the mckicad server" +--- + +mckicad is a FastMCP 3 server for KiCad electronic design automation. It uses src-layout packaging with `hatchling` as the build backend. + +## Project structure + +``` +src/mckicad/ + __init__.py # __version__ only + server.py # FastMCP 3 server + lifespan + module imports + config.py # Lazy config functions (no module-level env reads) + autowire/ + __init__.py # Package init + strategy.py # Wiring decision tree: classify_net, crossing estimation + planner.py # NetPlan -> apply_batch JSON conversion + tools/ + autowire.py # autowire_schematic MCP tool + schematic.py # kicad-sch-api: create/edit schematics + schematic_edit.py # Modify/remove schematic elements + schematic_analysis.py # Connectivity, ERC, netlist, validation + schematic_patterns.py # Circuit building block patterns + batch.py # Atomic multi-operation batch tool + power_symbols.py # Power symbol placement + netlist.py # External netlist import + project.py # Project discovery and structure + drc.py # DRC checking + manufacturing constraints + bom.py # BOM generation and export + export.py # Gerber, drill, PDF, SVG via kicad-cli + routing.py # FreeRouting autorouter integration + analysis.py # Board validation + real-time analysis + pcb.py # IPC-based PCB manipulation via kipy + resources/ + projects.py # kicad://projects resource + files.py # kicad://project/{path} resource + prompts/ + templates.py # debug_pcb, analyze_bom, design_circuit, debug_schematic + utils/ + kicad_cli.py # KiCad CLI detection and execution + path_validator.py # Path security / directory traversal prevention + secure_subprocess.py # Safe subprocess execution with timeouts + ipc_client.py # kipy IPC wrapper for live KiCad connection + freerouting.py # FreeRouting JAR engine + file_utils.py # Project file discovery + kicad_utils.py # KiCad path detection, project search + sexp_parser.py # S-expression parsing for pin position resolution +tests/ + conftest.py # Shared fixtures (tmp dirs, project paths) + test_*.py # Per-module test files +main.py # Entry point: .env loader + server start +``` + +## Key design decisions + +### Lazy config + +`config.py` provides all environment-dependent values through functions (`get_search_paths()`, `get_kicad_user_dir()`) called at runtime, not at import time. Static constants (`KICAD_EXTENSIONS`, `TIMEOUT_CONSTANTS`, `COMMON_LIBRARIES`, `BATCH_LIMITS`, `LABEL_DEFAULTS`) remain as module-level dicts since they do not read environment variables. + +This eliminates the `.env` load-order race condition -- `main.py` loads `.env` before any mckicad imports, and config functions read `os.environ` lazily when first called. + +### Decorator-based tool registration + +Each tool module imports `mcp` from `server.py` and decorates functions with `@mcp.tool()` at module level. `server.py` imports those modules to trigger registration. There is no `register_*_tools()` boilerplate. + +```python +# tools/example.py +from mckicad.server import mcp + +@mcp.tool() +def my_tool(param: str) -> dict: + """Tool description for the calling LLM.""" + return {"success": True, "data": "..."} +``` + +### Schematic abstraction point + +`tools/schematic.py` uses `kicad-sch-api` for file-level schematic manipulation. The `_get_schematic_engine()` helper exists as a swap point for when kipy adds schematic IPC support. + +### Dual-mode operation + +PCB tools work via IPC (kipy, requires running KiCad) or CLI (kicad-cli, batch mode). Tools degrade gracefully when KiCad is not running -- they return clear error messages rather than crashing. + +### Tool return convention + +All tools return dicts with at least `success: bool`. On failure, include `error: str`. On success, include relevant data fields. This gives callers a consistent interface for error handling. + +### Batch processing + +The batch system (`tools/batch.py`) applies hundreds of operations in a single load-save cycle. Operations are processed in dependency order: components first (so pin references resolve), then power symbols, wires, labels, and no-connects. + +Labels are handled as post-save sexp insertions because kicad-sch-api's serializer has issues with label types. The batch tool generates sexp strings, saves the schematic through kicad-sch-api, then inserts the label sexp directly into the file. + +### Pin position resolution + +The `utils/sexp_parser.py` module provides pin position resolution that works even when kicad-sch-api's API does not expose pin coordinates. It falls back to parsing the raw S-expression data from the schematic file and computing pin positions from component transforms. + +## Security + +- All file paths are validated via `utils/path_validator.py` before access -- prevents directory traversal +- External commands run through `utils/secure_subprocess.py` with timeouts -- prevents hangs and injection +- KiCad CLI commands are sanitized -- no shell injection possible +- `.env` loading runs before any mckicad imports to avoid partial initialization + +## Entry point + +```toml +[project.scripts] +mckicad = "mckicad.server:main" +``` + +Can be run as `uvx mckicad`, `uv run mckicad`, or `uv run python main.py`. + +## Logging + +Logs go to `mckicad.log` in the project root, overwritten on each server start. Never use `print()` -- MCP uses stdin/stdout for JSON-RPC transport, so any print output would corrupt the protocol stream. + +## Development environment + +```bash +make install # Install dependencies with uv +make run # Start the MCP server +make test # Run all tests +make lint # Lint with ruff + mypy +make format # Auto-format with ruff +``` + +Use the MCP Inspector for interactive debugging: + +```bash +npx @modelcontextprotocol/inspector uv --directory . run main.py +``` + +## Testing + +Markers: `unit`, `integration`, `requires_kicad`, `slow`, `performance` + +```bash +make test # all tests +make test tests/test_schematic.py # one file +uv run pytest -m "unit" # by marker +``` diff --git a/docs-site/src/content/docs/development/troubleshooting.md b/docs-site/src/content/docs/development/troubleshooting.md new file mode 100644 index 0000000..fed467e --- /dev/null +++ b/docs-site/src/content/docs/development/troubleshooting.md @@ -0,0 +1,192 @@ +--- +title: "Troubleshooting" +description: "Common issues and solutions for the mckicad server" +--- + +## Server setup issues + +### Server not starting + +**`ModuleNotFoundError: No module named 'mcp'`** + +Dependencies are not installed. Run: + +```bash +make install +``` + +**Syntax errors or unsupported features** + +Verify you are using Python 3.10 or higher: + +```bash +python --version +``` + +**`FileNotFoundError` or path-related errors** + +Check your `.env` file and ensure all configured paths exist. See [Environment Variables](/reference/environment/) for the full list. + +**`PermissionError: [Errno 13] Permission denied`** + +Ensure you have read/write permissions for all configured directories and files. + +## MCP client integration + +### Server not appearing in Claude Desktop + +**Check the configuration file:** + +macOS: +```bash +cat ~/Library/Application\ Support/Claude/claude_desktop_config.json +``` + +Windows: +``` +type %APPDATA%\Claude\claude_desktop_config.json +``` + +Ensure it contains: + +```json +{ + "mcpServers": { + "kicad": { + "command": "/ABSOLUTE/PATH/TO/kicad-mcp/.venv/bin/python", + "args": [ + "/ABSOLUTE/PATH/TO/kicad-mcp/main.py" + ] + } + } +} +``` + +**Always use absolute paths.** Replace: + +```json +"args": ["main.py"] +``` + +with: + +```json +"args": ["/absolute/path/to/main.py"] +``` + +**Restart Claude Desktop** after editing the configuration. + +**Protocol version mismatch** -- update both the client and server to compatible versions. + +## KiCad integration + +### KiCad Python modules not found + +Warning messages about missing KiCad Python modules indicate limited functionality for some features. Solutions: + +1. Install KiCad from [kicad.org](https://www.kicad.org/download/) +2. Set `KICAD_APP_PATH` for non-standard installations +3. Check server logs for Python path setup errors + +### Unable to open projects + +1. Verify KiCad is installed and `KICAD_APP_PATH` is correct +2. Double-check the project file path (use absolute paths) +3. Ensure the file has a `.kicad_pro` extension +4. Check file and application permissions + +## Project discovery + +### Projects not found + +1. Configure search paths in `.env`: + ``` + KICAD_SEARCH_PATHS=~/pcb,~/Electronics,~/Projects/KiCad + ``` +2. Set `KICAD_USER_DIR` if using a custom directory: + ``` + KICAD_USER_DIR=~/Documents/KiCadProjects + ``` +3. Ensure projects have the `.kicad_pro` extension +4. Restart the server after configuration changes + +## DRC and export issues + +### DRC checks failing + +1. Ensure your project contains a `.kicad_pcb` file +2. Verify `kicad-cli` is available: + ```bash + which kicad-cli + ``` + Or set `KICAD_CLI_PATH` in `.env` +3. Verify the PCB file can be opened in KiCad + +### Export tools failing + +1. Check `kicad-cli` availability (same as DRC) +2. Verify the source file exists and is valid +3. Check write permissions in the output directory + +### PCB thumbnail/SVG generation failing + +1. Ensure the project has a valid `.kicad_pcb` file +2. Check that `kicad-cli` supports SVG export (KiCad 9+) +3. Use absolute file paths + +## Logging and debugging + +### Checking logs + +mckicad writes logs to `mckicad.log` in the project root, overwritten on each start. + +For Claude Desktop logs: + +macOS: +```bash +tail -n 20 -F ~/Library/Logs/Claude/mcp-server-kicad.log +tail -n 20 -F ~/Library/Logs/Claude/mcp.log +``` + +Windows: check `%APPDATA%\Claude\Logs\` + +### Using the MCP Inspector + +For interactive debugging, use the MCP Inspector: + +```bash +npx @modelcontextprotocol/inspector uv --directory . run main.py +``` + +This lets you call tools directly and inspect responses without going through an AI client. + +## Platform-specific issues + +### macOS + +**Permission denied accessing files** -- ensure Terminal has full disk access in System Preferences > Security & Privacy. + +**System Python vs Homebrew Python** -- specify the full path to the Python interpreter in your client configuration. Use the `.venv/bin/python` from `make install`. + +### Windows + +**Path separator issues** -- use forward slashes (`/`) in all paths, or double backslashes (`\\`). + +**Cannot launch KiCad** -- ensure `KICAD_APP_PATH` is set correctly in `.env`. + +### Linux + +**Non-standard KiCad location** -- set `KICAD_APP_PATH` to your installation path. + +**Permission issues** -- check file permissions with `ls -la` and adjust with `chmod` if needed. + +## Still having issues? + +1. Use the MCP Inspector for direct tool testing +2. Check `mckicad.log` for detailed error information +3. Set `LOG_LEVEL=DEBUG` in `.env` for verbose logging +4. Open an issue with: + - Clear description of the problem + - Steps to reproduce + - Error messages or log excerpts + - Environment details (OS, Python version, KiCad version) diff --git a/docs-site/src/content/docs/getting-started.md b/docs-site/src/content/docs/getting-started.md new file mode 100644 index 0000000..67e697f --- /dev/null +++ b/docs-site/src/content/docs/getting-started.md @@ -0,0 +1,49 @@ +--- +title: "Introduction" +description: "MCP server for KiCad electronic design automation" +--- + +mckicad is an MCP (Model Context Protocol) server that gives AI assistants direct access to KiCad electronic design automation. Rather than describing what you want and translating instructions manually, you talk to an AI and it manipulates your schematics, runs checks, generates manufacturing files, and routes your boards. + +The server connects to KiCad through two complementary interfaces: + +- **kicad-cli** for batch operations -- schematic creation, BOM export, DRC checks, Gerber generation, and netlist export. No running KiCad instance required. +- **KiCad IPC API** (via kipy) for live interaction -- real-time board analysis, component placement, zone refills, and connectivity monitoring while KiCad is open. + +Tools degrade gracefully: if KiCad is not running, IPC-dependent tools report that clearly while CLI-based tools continue working. + +## What it can do + +**Schematic creation and editing** -- Create schematics from scratch, place components from KiCad's symbol libraries, wire them together with direct wires or net labels, add power symbols, hierarchical sheets, and title blocks. The batch system applies hundreds of operations atomically in a single load-save cycle. + +**Autowiring** -- Analyze unconnected nets and automatically select the best wiring strategy (direct wire, local label, global label, power symbol, or no-connect flag) based on distance, fanout, crossing estimation, and net name patterns. + +**Schematic patterns** -- Place common circuit building blocks (decoupling cap banks, pull resistors, crystal oscillator circuits) with a single tool call. Components, wires, labels, and power symbols are positioned using established layout conventions. + +**Design rule checks** -- Run DRC on PCB layouts via kicad-cli with progress tracking and violation categorization. Generate technology-specific rule sets for standard, HDI, RF, or automotive designs. + +**BOM management** -- Analyze and export Bills of Materials. Get component counts, category breakdowns, and cost estimates from existing BOM CSVs or generate fresh ones from schematics. + +**Export and manufacturing** -- Generate Gerber files, drill files, PDFs, and SVGs for your boards. Everything goes through kicad-cli with proper layer selection and output directory organization. + +**Autorouting** -- Route PCBs automatically via FreeRouting integration with configurable strategies (conservative, balanced, aggressive) and technology profiles. + +**Board analysis** -- Live board statistics, connectivity monitoring, component detail inspection, and routing quality analysis through the IPC API. + +**Netlist import** -- Convert external netlist formats (KiCad S-expression, OrcadPCB2, Cadence Allegro) into mckicad batch JSON for schematic generation from existing designs. + +## Quick example + +``` +"Create a new KiCad project for an LED blinker circuit with an ATtiny85, +a 100nF decoupling cap, and two LEDs with current-limiting resistors. +Wire everything up and run ERC to check for issues." +``` + +The AI will use `create_schematic`, `apply_batch` (to place components, wires, labels, and power symbols), and `validate_schematic` to build and verify the design -- all without you touching the KiCad GUI. + +## Next steps + +- [Installation](/getting-started/installation/) -- get mckicad running on your system +- [Configuration](/getting-started/configuration/) -- set up project paths and environment +- [Tool Reference](/reference/tools/) -- browse every available tool diff --git a/docs-site/src/content/docs/getting-started/configuration.md b/docs-site/src/content/docs/getting-started/configuration.md new file mode 100644 index 0000000..bb71038 --- /dev/null +++ b/docs-site/src/content/docs/getting-started/configuration.md @@ -0,0 +1,207 @@ +--- +title: "Configuration" +description: "Configure mckicad for your environment" +--- + +## Configuration methods + +mckicad can be configured through: + +1. **`.env` file** in the project root (recommended) +2. **Environment variables** set directly or via your MCP client config +3. **Code constants** in `config.py` for static values like file extensions + +## Core configuration + +### Project paths + +These settings control where the server looks for KiCad projects: + +| Environment Variable | Description | Default | Example | +|---------------------|-------------|---------|---------| +| `KICAD_USER_DIR` | KiCad user directory | `~/Documents/KiCad` (macOS/Windows), `~/kicad` (Linux) | `~/Documents/KiCadProjects` | +| `KICAD_SEARCH_PATHS` | Additional project directories (comma-separated) | None | `~/pcb,~/Electronics,~/Projects/KiCad` | + +### Application paths + +| Environment Variable | Description | Default | Example | +|---------------------|-------------|---------|---------| +| `KICAD_APP_PATH` | Path to the KiCad installation | Auto-detected per platform | `/Applications/KiCad/KiCad.app` | +| `KICAD_CLI_PATH` | Explicit path to kicad-cli | Auto-detected | `/usr/bin/kicad-cli` | +| `FREEROUTING_JAR_PATH` | Path to FreeRouting JAR | Auto-detected in common locations | `~/freerouting.jar` | + +### Server settings + +| Environment Variable | Description | Default | Example | +|---------------------|-------------|---------|---------| +| `LOG_LEVEL` | Logging level | `INFO` | `DEBUG` | + +## Using a .env file + +The recommended approach. Copy the example and edit: + +```bash +cp .env.example .env +``` + +Example `.env`: + +```bash +# KiCad user directory +KICAD_USER_DIR=~/Documents/KiCad + +# Additional project directories (comma-separated) +KICAD_SEARCH_PATHS=~/pcb,~/Electronics,~/Projects/KiCad + +# KiCad application path +# macOS: +KICAD_APP_PATH=/Applications/KiCad/KiCad.app +# Linux: +# KICAD_APP_PATH=/usr/share/kicad +# Windows: +# KICAD_APP_PATH=C:\Program Files\KiCad +``` + +The `.env` file is loaded by `main.py` before any mckicad imports, which means all config functions see the correct values at runtime. + +## Project discovery + +The server automatically searches for KiCad projects in: + +1. The **KiCad user directory** (`KICAD_USER_DIR`) +2. Any **additional search paths** from `KICAD_SEARCH_PATHS` +3. **Common project locations** that are auto-detected (e.g., `~/Documents/PCB`, `~/Electronics`) + +Projects are identified by the `.kicad_pro` file extension. The server searches recursively through all configured directories. + +## Client configuration + +### Claude Desktop + +Create or edit the configuration file: + +**macOS**: +```bash +mkdir -p ~/Library/Application\ Support/Claude +``` +Edit `~/Library/Application Support/Claude/claude_desktop_config.json` + +**Windows**: +Edit `%APPDATA%\Claude\claude_desktop_config.json` + +Add the server entry: + +```json +{ + "mcpServers": { + "kicad": { + "command": "/ABSOLUTE/PATH/TO/kicad-mcp/.venv/bin/python", + "args": [ + "/ABSOLUTE/PATH/TO/kicad-mcp/main.py" + ] + } + } +} +``` + +For Windows, use the appropriate path format: + +```json +{ + "mcpServers": { + "kicad": { + "command": "C:\\Path\\To\\kicad-mcp\\.venv\\Scripts\\python.exe", + "args": [ + "C:\\Path\\To\\kicad-mcp\\main.py" + ] + } + } +} +``` + +### Passing environment variables via client config + +```json +{ + "mcpServers": { + "kicad": { + "command": "/ABSOLUTE/PATH/TO/kicad-mcp/.venv/bin/python", + "args": [ + "/ABSOLUTE/PATH/TO/kicad-mcp/main.py" + ], + "env": { + "KICAD_SEARCH_PATHS": "/custom/path1,/custom/path2", + "KICAD_APP_PATH": "/custom/path" + } + } + } +} +``` + +## Advanced configuration + +### Custom KiCad extensions + +The recognized file extensions are defined in `config.py`: + +```python +KICAD_EXTENSIONS = { + "project": ".kicad_pro", + "pcb": ".kicad_pcb", + "schematic": ".kicad_sch", +} +``` + +### DRC history + +DRC results are stored in: + +- macOS/Linux: `~/.mckicad/drc_history/` +- Windows: `%APPDATA%\mckicad\drc_history\` + +## Platform-specific notes + +### macOS + +KiCad is typically at `/Applications/KiCad/KiCad.app`. For non-standard installations: + +``` +KICAD_APP_PATH=/path/to/your/KiCad.app +``` + +### Windows + +KiCad is typically at `C:\Program Files\KiCad`. In `.env` files, use either forward slashes or escaped backslashes: + +``` +KICAD_SEARCH_PATHS=C:/Users/Username/Documents/KiCad +KICAD_SEARCH_PATHS=C:\\Users\\Username\\Documents\\KiCad +``` + +### Linux + +KiCad locations vary by distribution. Common paths: + +- `/usr/share/kicad` +- `/usr/local/share/kicad` +- `/opt/kicad` + +## Debugging configuration issues + +1. Start the server and check logs: + ```bash + uv run python main.py + ``` + Logs go to `mckicad.log` in the project root. + +2. Verify environment variables are loaded: + ```bash + python -c "import os; print(os.environ.get('KICAD_SEARCH_PATHS', 'Not set'))" + ``` + +3. Use absolute paths to eliminate path resolution issues. + +4. Use the MCP Inspector for direct server testing: + ```bash + npx @modelcontextprotocol/inspector uv --directory . run main.py + ``` diff --git a/docs-site/src/content/docs/getting-started/installation.md b/docs-site/src/content/docs/getting-started/installation.md new file mode 100644 index 0000000..a8435ac --- /dev/null +++ b/docs-site/src/content/docs/getting-started/installation.md @@ -0,0 +1,124 @@ +--- +title: "Installation" +description: "Set up mckicad on your system" +--- + +## Prerequisites + +- Python 3.10 or newer +- [uv](https://docs.astral.sh/uv/) package manager +- KiCad 9.0+ (for `kicad-cli` features) +- Git + +## Clone and install + +```bash +git clone https://git.supported.systems/MCP/kicad-mcp.git +cd kicad-mcp +make install +``` + +`make install` uses `uv` to create a virtual environment and install all dependencies. + +## Configure your environment + +Copy the example environment file and edit it with your paths: + +```bash +cp .env.example .env +``` + +At minimum, set `KICAD_SEARCH_PATHS` to the directories where your KiCad projects live: + +``` +KICAD_SEARCH_PATHS=~/Documents/KiCad,~/Electronics +``` + +See [Configuration](/getting-started/configuration/) for the full list of environment variables. + +## Connect to Claude Desktop + +Add mckicad to your Claude Desktop configuration file: + +**macOS**: `~/Library/Application Support/Claude/claude_desktop_config.json` + +**Linux**: `~/.config/Claude/claude_desktop_config.json` + +**Windows**: `%APPDATA%\Claude\claude_desktop_config.json` + +```json +{ + "mcpServers": { + "kicad": { + "command": "/ABSOLUTE/PATH/TO/kicad-mcp/.venv/bin/python", + "args": ["/ABSOLUTE/PATH/TO/kicad-mcp/main.py"] + } + } +} +``` + +Replace the paths with absolute paths to your clone. Use the Python binary inside the `.venv` directory that `make install` created. + +You can also pass environment variables directly in the client config: + +```json +{ + "mcpServers": { + "kicad": { + "command": "/ABSOLUTE/PATH/TO/kicad-mcp/.venv/bin/python", + "args": ["/ABSOLUTE/PATH/TO/kicad-mcp/main.py"], + "env": { + "KICAD_SEARCH_PATHS": "/home/user/Electronics,/home/user/PCB" + } + } + } +} +``` + +Restart Claude Desktop after editing the configuration. + +## Alternative: run directly + +mckicad declares a console script entry point, so you can also run it with: + +```bash +uv run mckicad +``` + +Or from the project directory: + +```bash +uv run python main.py +``` + +## Verify installation + +After connecting, ask your AI client something like: + +``` +List all my KiCad projects +``` + +If the server is running and configured correctly, it will scan your search paths and return a list of `.kicad_pro` files. + +## Optional: FreeRouting (autorouting) + +For automated PCB routing, install FreeRouting: + +1. Download the JAR from [freerouting.app](https://freerouting.app/) +2. Place it at one of the auto-detected paths: `~/freerouting.jar`, `/usr/local/bin/freerouting.jar`, or `/opt/freerouting/freerouting.jar` +3. Install a Java runtime (`java` must be on your PATH) +4. Verify with the `check_routing_capability` tool +5. Or set `FREEROUTING_JAR_PATH` in your `.env` file to an explicit path + +## Development commands + +| Command | Description | +|---------|-------------| +| `make install` | Install dependencies with uv | +| `make run` | Start the MCP server | +| `make test` | Run all tests | +| `make lint` | Lint with ruff + mypy | +| `make format` | Auto-format with ruff | +| `make build` | Build package | +| `make clean` | Remove build artifacts | diff --git a/docs-site/src/content/docs/guides/analysis.md b/docs-site/src/content/docs/guides/analysis.md new file mode 100644 index 0000000..fea5536 --- /dev/null +++ b/docs-site/src/content/docs/guides/analysis.md @@ -0,0 +1,175 @@ +--- +title: "Board Analysis" +description: "Analyze schematics, PCB layouts, and live board data" +--- + +The analysis tools let you extract information from schematics, validate projects, analyze PCB layouts, and get real-time board data from a running KiCad instance via the IPC API. + +## Quick reference + +| Task | Example prompt | +|------|---------------| +| Get schematic info | `What components are in my schematic at /path/to/project.kicad_sch?` | +| Validate project | `Validate my KiCad project at /path/to/project.kicad_pro` | +| Analyze PCB layout | `Analyze the PCB layout at /path/to/project.kicad_pcb` | +| Live board stats | `Get real-time board statistics for my project` | +| Component details | `Show me details for U1 on my board` | + +## Schematic information + +``` +What components are in my schematic at /path/to/project.kicad_sch? +``` + +Returns a list of all components with their values, footprints, connection information, and basic schematic structure. + +You can also ask targeted questions: + +``` +What are all the resistor values in my schematic? +``` + +``` +Show me all the power connections in my schematic +``` + +## Project validation + +``` +Validate my KiCad project at /path/to/project.kicad_pro +``` + +The `validate_project` tool accepts either a `.kicad_pro` file or a directory containing one. It checks for: +- Missing project files +- Required components (schematic, PCB) +- Valid file formats +- Common structural issues + +For schematic-level validation including ERC: + +``` +Validate my schematic at /path/to/project.kicad_sch +``` + +The `validate_schematic` tool runs a comprehensive health check including ERC, connectivity analysis, and optionally compares against a baseline. + +## PCB layout analysis + +``` +Analyze the PCB layout at /path/to/project.kicad_pcb +``` + +Provides information about board dimensions, layer structure, component placement, trace characteristics, and via usage. + +## Live board analysis (IPC) + +These tools require a running KiCad instance with the IPC API enabled. + +### Real-time statistics + +``` +Get real-time board statistics for my project +``` + +The `analyze_board_real_time` tool connects to KiCad via IPC and pulls footprint, net, track, and connectivity data to build a comprehensive snapshot of the current board state. + +### Component details + +``` +Show me the details for U1 on my board +``` + +The `get_component_details` tool retrieves live component information including position, rotation, pad assignments, and net connections. + +### Connectivity check + +``` +Check the routing connectivity of my PCB +``` + +The `check_connectivity` tool reports total nets, routed vs unrouted counts, routing completion percentage, and names of routed nets. + +### Board statistics + +``` +What are the statistics for my board? +``` + +The `get_board_statistics` tool returns counts of footprints, nets, tracks, and vias, plus a breakdown of component types by reference-designator prefix. + +## Schematic analysis tools + +### Connectivity analysis + +``` +Analyze the net connectivity of my schematic +``` + +The `analyze_connectivity` tool walks every net and reports the pins connected to each one. Useful for understanding how components are wired together. + +### Pin connection check + +``` +Is pin 5 of U1 connected in my schematic? +``` + +The `check_pin_connection` tool checks whether a specific pin is connected to a net and what other pins share that net. + +### Pin verification + +``` +Verify that U1 pin 5 is connected to R3 pin 1 +``` + +The `verify_pins_connected` tool confirms whether two specific pins share the same net. + +### Wiring audit + +``` +Audit the wiring for U1 in my schematic +``` + +The `audit_wiring` tool performs a detailed inspection of all connections to a component, checking for missing connections, unexpected connections, and wiring issues. + +## MCP resources + +The server provides resources for accessing design information: + +- `kicad://schematic/{schematic_path}` -- information from a schematic file +- `kicad://pcb/{pcb_path}` -- information from a PCB file + +## Combining analysis with other features + +1. Analyze a schematic to understand component selection +2. Check the BOM for component availability and cost +3. Run DRC checks to find design rule violations +4. Use the [export tools](/guides/export/) for visual overview + +## Troubleshooting + +### Schematic reading errors + +1. Verify the file exists with the `.kicad_sch` extension +2. Check that it is a valid KiCad schematic +3. Ensure read permissions +4. Try analysis on a simpler schematic to isolate the issue + +### PCB analysis issues + +1. Check the file exists with the `.kicad_pcb` extension +2. Ensure the file is not corrupted +3. Check for complex features that might cause parsing issues + +### IPC connection failures + +1. Ensure KiCad is running with the project open +2. Verify the IPC API is enabled in KiCad's settings +3. Check that kipy is installed (`uv add kipy`) +4. The tool will report a clear error if the IPC connection fails + +## Limitations + +- **Large designs** may not be fully analyzed in a single pass +- **KiCad version compatibility** -- best results with the same KiCad version the server targets +- **Structural analysis** -- the tools analyze structure rather than simulating electrical behavior +- **No SPICE** -- no electrical simulation capability diff --git a/docs-site/src/content/docs/guides/autowire.md b/docs-site/src/content/docs/guides/autowire.md new file mode 100644 index 0000000..e0d4f65 --- /dev/null +++ b/docs-site/src/content/docs/guides/autowire.md @@ -0,0 +1,202 @@ +--- +title: "Autowiring" +description: "Automatically wire unconnected nets with optimal strategies" +--- + +The `autowire_schematic` tool analyzes unconnected nets in a KiCad schematic and automatically selects the best wiring strategy for each one. It provides a single-call alternative to manually deciding wire vs label vs power symbol for every net. + +## Quick reference + +| Task | Example prompt | +|------|---------------| +| Preview wiring plan | `Autowire my schematic at /path/to/project.kicad_sch` | +| Apply wiring | `Autowire my schematic at /path/to/project.kicad_sch with dry_run=False` | +| Wire specific nets only | `Autowire only the SPI nets in my schematic` | +| Exclude power nets | `Autowire my schematic, excluding GND and VCC` | +| Adjust distance threshold | `Autowire with direct_wire_max_distance=30` | + +## How the decision tree works + +For each unconnected net, the tool walks through these checks in order: + +| Priority | Condition | Strategy | Rationale | +|----------|-----------|----------|-----------| +| 1 | Power net (name matches GND/VCC/+3V3/etc, or pin type is `power_in`/`power_out`) | Power symbol | Standard KiCad convention for power rails | +| 2 | Single-pin net | No-connect flag | Avoids ERC warnings on intentionally unused pins | +| 3 | Cross-sheet net | Global label | Global labels are required for inter-sheet connectivity | +| 4 | High fanout (>5 pins by default) | Global label | Labels scale better than wire stars for many connections | +| 5 | Two-pin net, distance <= 10mm | Direct wire | Short enough that a wire is cleaner than a label | +| 6 | Two-pin net, distance > 50mm | Local label | Too far for a clean wire run | +| 7 | Two-pin net, mid-range with >2 crossings | Local label | Avoids visual clutter from crossing wires | +| 8 | Two-pin net, mid-range with few crossings | Direct wire | Wire is the simplest connection | +| 9 | 3-4 pin net | Local label | Star topology with labels is cleaner than a wire tree | + +All thresholds are tunable via tool parameters. + +## Using autowire + +### Dry run (preview) + +Autowire defaults to `dry_run=True` -- it shows you the plan without touching the schematic: + +``` +Autowire my schematic at ~/Projects/KiCad/amplifier/amplifier.kicad_sch +``` + +The response includes: +- **Strategy summary** -- counts by method (e.g., 12 direct wires, 8 local labels, 4 power symbols, 2 no-connects) +- **Per-net plan** -- each net's chosen method and the reasoning +- **Batch file** -- the generated JSON written to `.mckicad/autowire_batch.json` + +### Applying the plan + +Once you have reviewed the dry run, apply with: + +``` +Autowire my schematic at ~/Projects/KiCad/amplifier/amplifier.kicad_sch with dry_run=False +``` + +This calls `apply_batch` internally, which means you get collision detection, label placement optimization, and power symbol stub generation automatically. + +### Filtering nets + +To wire only specific nets: + +``` +Autowire only the MOSI, MISO, and SCK nets in my schematic +``` + +To exclude nets you have already wired manually: + +``` +Autowire my schematic, excluding USB_D_P and USB_D_N +``` + +To exclude entire components (e.g., a connector you want to wire by hand): + +``` +Autowire my schematic, excluding refs J1 and J2 +``` + +### Tuning thresholds + +The default thresholds work well for typical schematics, but you can adjust them: + +| Parameter | Default | Effect | +|-----------|---------|--------| +| `direct_wire_max_distance` | 50.0mm | Pins farther apart get labels instead of wires | +| `crossing_threshold` | 2 | More crossings than this triggers label fallback | +| `high_fanout_threshold` | 5 | Nets with more pins than this get global labels | + +For dense boards with tight pin spacing: + +``` +Autowire my schematic with direct_wire_max_distance=25 and crossing_threshold=1 +``` + +For sparse layouts where longer wires are acceptable: + +``` +Autowire my schematic with direct_wire_max_distance=80 +``` + +## Understanding results + +### Strategy summary + +```json +{ + "strategy_summary": { + "direct_wire": 12, + "local_label": 8, + "global_label": 3, + "power_symbol": 6, + "no_connect": 2 + }, + "total_nets_classified": 31, + "nets_skipped": 45 +} +``` + +`nets_skipped` includes already-connected nets plus any you excluded -- these are not counted in the classification total. + +### Per-net plan + +Each net entry explains the decision: + +```json +{ + "net": "SPI_CLK", + "method": "local_label", + "pin_count": 2, + "reason": "long distance (67.3mm > 50.0mm)" +} +``` + +The `reason` field traces which branch of the decision tree was taken. + +### Batch file + +The generated `.mckicad/autowire_batch.json` uses the same schema as `apply_batch`. You can inspect it, edit it manually, and apply it yourself if you want to tweak individual connections before committing: + +``` +Show me the contents of .mckicad/autowire_batch.json +``` + +## Crossing estimation + +The crossing estimator checks whether a proposed direct wire between two pins would cross existing wires. It uses axis-aligned segment intersection: a horizontal wire crosses a vertical wire when their X/Y ranges overlap (strict inequality -- touching endpoints do not count). + +This keeps the schematic visually clean by falling back to labels when wires would create crossing patterns. + +## Power net detection + +Power nets are identified by two methods: + +1. **Name matching** -- GND, VCC, VDD, VSS, +3V3, +5V, +12V, +1.8V, VBUS, VBAT, and variants (AGND, DGND, PGND, etc.) +2. **Pin type metadata** -- if any pin on the net has `pintype` of `power_in` or `power_out` in the netlist, the net is treated as power regardless of its name + +This handles custom power rails that do not follow standard naming conventions. + +## Recommended workflow + +1. Place all components and set values/footprints +2. Wire critical signal paths manually (`connect_pins`, `add_wire`) +3. Run `autowire_schematic` in dry-run to preview +4. Review the plan -- adjust thresholds or exclude specific nets if needed +5. Apply with `dry_run=False` +6. Run `validate_schematic` to verify +7. Open in KiCad to visually inspect + +## Tips + +- **Always dry-run first** -- review the plan before applying. The default `dry_run=True` exists for good reason. +- **Wire critical nets manually** -- for sensitive analog paths, differential pairs, or impedance-controlled traces, use `add_wire` or `connect_pins` directly, then let autowire handle the rest. +- **Use exclude_nets for partially-wired designs** -- if you have already connected some nets, exclude them to avoid duplicate labels. +- **Run ERC after autowiring** -- `validate_schematic` confirms the wiring is electrically correct. + +## Troubleshooting + +### No nets classified + +If autowire reports 0 nets classified: + +1. **Check that kicad-cli is available** -- autowire needs it to export the netlist. Set `KICAD_CLI_PATH` if needed. +2. **Verify the schematic has components** -- an empty schematic has no nets to wire. +3. **Check if nets are already connected** -- autowire skips nets that appear in the connectivity graph. Run `analyze_connectivity` to see what is already wired. + +### Wrong strategy for a net + +1. **Check pin types in the netlist** -- a pin with `power_in` type will force POWER_SYMBOL even if the net name is unusual. +2. **Adjust thresholds** -- if too many nets get labels when you want wires, increase `direct_wire_max_distance`. +3. **Use only_nets/exclude_nets** -- wire the problematic net manually and exclude it from autowire. + +### Netlist export fails + +1. **Provide a pre-exported netlist** -- use `export_netlist` to create one, then pass it as `netlist_path`. +2. **Check kicad-cli version** -- KiCad 9+ is required for the `kicadsexpr` format. +3. **Check schematic validity** -- run `validate_schematic` to catch structural issues. + +## Attribution + +The wiring strategy decision tree is informed by [KICAD-autowire](https://github.com/arashmparsa/KICAD-autowire) (MIT, arashmparsa), which demonstrated the concept of automated wiring strategy selection. The mckicad implementation is original, built on the existing batch pipeline. diff --git a/docs-site/src/content/docs/guides/bom.md b/docs-site/src/content/docs/guides/bom.md new file mode 100644 index 0000000..8adc8de --- /dev/null +++ b/docs-site/src/content/docs/guides/bom.md @@ -0,0 +1,139 @@ +--- +title: "BOM Management" +description: "Analyze, export, and manage Bills of Materials" +--- + +The BOM tools let you analyze component usage in your KiCad projects, export BOMs from schematics, estimate project costs, and view BOM data in multiple formats. + +## Quick reference + +| Task | Example prompt | +|------|---------------| +| Analyze components | `Analyze the BOM for my KiCad project at /path/to/project.kicad_pro` | +| Export a BOM | `Export a BOM for my KiCad project at /path/to/project.kicad_pro` | +| View formatted report | `Show me the BOM report for /path/to/project.kicad_pro` | + +## Analyzing a BOM + +``` +Please analyze the BOM for my KiCad project at /path/to/project.kicad_pro +``` + +The `analyze_bom` tool: +- Searches for existing BOM CSV files in the project directory +- Parses and analyzes the component data +- Generates a report with component counts, categories, and cost estimates (if available) + +## Exporting a BOM + +If you do not have a BOM yet, export one directly: + +``` +Export a BOM for my KiCad project at /path/to/project.kicad_pro +``` + +The `export_bom` tool: +- Finds the schematic file in your project +- Runs `kicad-cli sch export bom` to generate a CSV +- Saves the BOM alongside the project +- Returns the path to the generated file + +## Viewing BOM information + +### Formatted report + +``` +Show me the BOM report for /path/to/project.kicad_pro +``` + +Loads the `kicad://bom/project_path` resource, showing total component count, breakdown by type, cost estimates (if available), component table, and optimization suggestions. + +### Raw CSV data + +``` +Show me the raw CSV BOM data for /path/to/project.kicad_pro +``` + +Returns the raw CSV data from the BOM file, suitable for importing into spreadsheets. + +### JSON data + +``` +Show me the JSON BOM data for /path/to/project.kicad_pro +``` + +Returns a structured JSON representation for programmatic processing. + +## Understanding BOM results + +### Component categories + +| Category | Description | Example refs | +|----------|-------------|-------------| +| Resistors | Current-limiting, voltage-dividing | R1, R2, R3 | +| Capacitors | Energy storage, filtering | C1, C2, C3 | +| ICs | Integrated circuits | U1, U2, U3 | +| Connectors | Board-to-board, board-to-wire | J1, J2, J3 | +| Transistors | Switching, amplifying | Q1, Q2, Q3 | +| Diodes | Unidirectional current flow | D1, D2, D3 | + +### Cost information + +The analysis extracts cost information if it is available in the BOM file. To include costs, add a "Cost" or "Price" column to your KiCad component fields before exporting. + +## Tips for BOM management + +### Structuring your exports + +1. Use descriptive component values +2. Add meaningful component descriptions +3. Include footprint information +4. Add supplier part numbers where possible +5. Include cost information for better estimates + +### Optimizing component selection + +Based on BOM analysis, consider: +- Standardizing component values (e.g., using the same resistor values across the design) +- Reducing the variety of footprints +- Selecting commonly available components +- Using components from the same supplier where possible + +### Keeping BOMs updated + +1. Re-export after significant schematic changes +2. Compare with previous versions to identify changes +3. Verify component availability +4. Update cost estimates regularly + +## Advanced usage + +### Custom analysis + +``` +Looking at the BOM for my project, can you suggest ways to reduce +the variety of resistor values while maintaining the same functionality? +``` + +### Comparing revisions + +``` +Compare the BOMs between my projects at /path/to/project_v1.kicad_pro +and /path/to/project_v2.kicad_pro +``` + +## Troubleshooting + +### BOM analysis fails + +1. Ensure the BOM file is in CSV, XML, or JSON format +2. Check that the file is not corrupted or empty +3. Verify the file is in the project directory +4. Try exporting a fresh BOM from the schematic + +### BOM export fails + +1. Make sure KiCad is properly installed +2. Verify the schematic file exists and is valid +3. Check write permissions in the project directory +4. Look for kicad-cli in your PATH or set `KICAD_CLI_PATH` diff --git a/docs-site/src/content/docs/guides/drc.md b/docs-site/src/content/docs/guides/drc.md new file mode 100644 index 0000000..c1fc621 --- /dev/null +++ b/docs-site/src/content/docs/guides/drc.md @@ -0,0 +1,119 @@ +--- +title: "Design Rule Checks" +description: "Run DRC checks, track violations, and generate rule sets" +--- + +The DRC tools let you run Design Rule Checks on your KiCad PCB designs, get detailed violation reports, track progress over time, and generate technology-specific rule sets. All DRC operations use `kicad-cli` and do not require a running KiCad instance. + +## Prerequisites + +- KiCad 9.0 or newer installed +- `kicad-cli` available in your system PATH (included with KiCad 9.0+) + +## Running a DRC check + +``` +Run a DRC check on my project at /path/to/project.kicad_pro +``` + +The `run_drc_check` tool: +- Locates the `.kicad_pcb` file for the project +- Runs DRC via `kicad-cli pcb drc` +- Parses the JSON report to extract violations +- Saves results to DRC history +- Compares with previous runs (if available) + +## Viewing DRC reports + +### Current report + +``` +Show me the DRC report for /path/to/project.kicad_pro +``` + +Loads the `kicad://drc/project_path` resource, showing total violations, categorized issues, violation details with locations, and recommendations for common fixes. + +### DRC history + +``` +Show me the DRC history for /path/to/project.kicad_pro +``` + +Loads the `kicad://drc/history/project_path` resource, showing a visual trend of violations over time, table of all check runs, comparison between first and most recent checks, and progress indicators. + +## Understanding violations + +### Common categories + +| Category | Description | Common fixes | +|----------|-------------|-------------| +| Clearance | Items too close together | Increase spacing, reroute traces | +| Track Width | Traces too narrow | Increase trace width, check current requirements | +| Annular Ring | Via rings too small | Increase via size, adjust manufacturing settings | +| Drill Size | Holes too small | Increase drill diameter, check fab capabilities | +| Silkscreen | Silkscreen conflicts with pads | Adjust silkscreen position, resize text | +| Courtyard | Component courtyards overlap | Adjust placement, reduce footprint sizes | + +## Generating rule sets + +### Technology-specific rules + +``` +Create a DRC rule set for HDI technology +``` + +The `create_drc_rule_set` tool generates rules tailored to specific PCB technologies: +- **standard** -- conventional PCB manufacturing +- **HDI** -- high-density interconnect +- **RF** -- radio frequency designs +- **automotive** -- automotive-grade requirements + +### Exporting rules + +``` +Export DRC rules for RF technology in KiCad format +``` + +The `export_kicad_drc_rules` tool outputs rules in KiCad-compatible text format, ready to paste into your project's design rules. + +### Manufacturing constraints + +``` +Get manufacturing constraints for automotive technology +``` + +The `get_manufacturing_constraints` tool returns numeric limits (minimum track width, clearance, via size, etc.) along with design recommendations and notes for the specified technology. + +## Workflow + +The DRC tools work alongside KiCad's built-in DRC: + +1. Run the mckicad DRC check to get an overview and start tracking progress +2. Use KiCad's built-in DRC for interactive fixes (highlights exact locations in the editor) +3. Re-run the mckicad DRC to verify fixes and update the history + +## Custom design rules + +Use the DRC prompt templates for help creating specialized rules: + +``` +I need custom design rules for a high-voltage circuit with 2kV isolation +``` + +This provides guidance for high-voltage circuits, high-current paths, RF constraints, and specialized manufacturing requirements. + +## Troubleshooting + +### DRC check fails + +1. Ensure the project exists at the specified path +2. Verify the project contains a `.kicad_pcb` file +3. Check that `kicad-cli` is in your PATH or set `KICAD_CLI_PATH` +4. Use the full absolute path to the project file +5. Check the server logs for detailed error information + +### Incomplete results + +1. Verify the PCB file is not corrupted -- try opening it in KiCad +2. Ensure you are using KiCad 9.0+ for full kicad-cli DRC support +3. Check that all referenced libraries are available diff --git a/docs-site/src/content/docs/guides/export.md b/docs-site/src/content/docs/guides/export.md new file mode 100644 index 0000000..3ad58e8 --- /dev/null +++ b/docs-site/src/content/docs/guides/export.md @@ -0,0 +1,114 @@ +--- +title: "Export & Manufacturing" +description: "Generate Gerber files, drill files, PDFs, SVGs, and thumbnails" +--- + +The export tools generate manufacturing and documentation files from your KiCad projects using `kicad-cli`. All exports run in batch mode without requiring a running KiCad instance. + +## Quick reference + +| Task | Example prompt | +|------|---------------| +| Export Gerbers | `Export Gerber files for my project at /path/to/project.kicad_pro` | +| Export drill files | `Export drill files for my project` | +| Export PDF | `Export a PDF of my PCB layout` | +| Generate SVG | `Generate an SVG render of my PCB` | +| Export schematic PDF | `Export a PDF of my schematic` | + +## Gerber export + +``` +Export Gerber files for my project at /path/to/project.kicad_pro +``` + +The `export_gerbers` tool runs `kicad-cli pcb export gerbers` and writes output into a `gerbers/` subdirectory alongside the project. Returns the list of generated files and their paths. + +Gerber files cover all standard layers: copper (front/back), solder mask, silkscreen, paste, and board outline. + +## Drill file export + +``` +Export drill files for my project at /path/to/project.kicad_pro +``` + +The `export_drill` tool runs `kicad-cli pcb export drill` and writes output to the `gerbers/` subdirectory (following the common convention of co-locating drill files with Gerbers for fab submission). + +## PDF export + +``` +Export a PDF of my PCB layout at /path/to/project.kicad_pro +``` + +The `export_pdf` tool supports both PCB and schematic exports: + +- **PCB PDF**: `export_pdf` with `file_type="pcb"` (default) +- **Schematic PDF**: `export_pdf` with `file_type="schematic"` + +Or use the dedicated schematic PDF export with additional options: + +``` +Export a black-and-white PDF of my schematic +``` + +The `export_schematic_pdf` tool provides options for black-and-white output and background exclusion. + +## SVG generation + +``` +Generate an SVG render of my PCB at /path/to/project.kicad_pro +``` + +The `generate_pcb_svg` tool uses `kicad-cli pcb export svg` to produce a multi-layer SVG of the board. The SVG content is returned as a string so the caller can display or save it. + +## PCB thumbnails + +The SVG export effectively serves as a PCB thumbnail. When viewing the output, you will typically see: + +- Board outline (Edge.Cuts layer) +- Copper layers (F.Cu and B.Cu) +- Silkscreen layers (F.SilkS and B.SilkS) +- Mask layers (F.Mask and B.Mask) +- Component outlines and reference designators + +### Tips for best visual results + +1. **Ensure KiCad is properly installed** -- the export tools rely on kicad-cli +2. **Use absolute paths** to avoid path resolution issues +3. **Define a board outline** (Edge.Cuts layer) for proper visualization +4. **Use the latest KiCad version** for best compatibility + +## Manufacturing workflow + +A typical flow for preparing manufacturing files: + +1. Run [DRC](/guides/drc/) to verify the design has no violations +2. Export Gerber files +3. Export drill files +4. Generate a PDF for visual review +5. Check the [BOM](/guides/bom/) for component availability +6. Submit the `gerbers/` directory to your PCB fabricator + +## Integration uses + +- **Project browsing** -- generate SVGs for all projects to visually identify them +- **Documentation** -- include PCB renders in project docs +- **Design review** -- use PDFs and SVGs to discuss layouts without opening KiCad + +## Troubleshooting + +### Export fails + +1. Verify `kicad-cli` is available in your PATH or set `KICAD_CLI_PATH` +2. Check that the project file exists and contains a valid PCB or schematic +3. Ensure write permissions in the output directory +4. Check server logs for detailed error messages + +### No thumbnail generated + +1. Check that the project contains a valid `.kicad_pcb` file +2. Ensure the PCB has a defined board outline (Edge.Cuts layer) + +### Low quality output + +1. Ensure the PCB has a properly defined board outline +2. Update to the latest KiCad version for improved CLI export quality diff --git a/docs-site/src/content/docs/guides/netlist.md b/docs-site/src/content/docs/guides/netlist.md new file mode 100644 index 0000000..9341f28 --- /dev/null +++ b/docs-site/src/content/docs/guides/netlist.md @@ -0,0 +1,159 @@ +--- +title: "Netlist Import" +description: "Extract and import netlist data from KiCad schematics" +--- + +The netlist tools let you extract connectivity information from KiCad schematics, analyze component connections, and import netlists from external formats into mckicad's batch JSON for schematic generation. + +## Quick reference + +| Task | Example prompt | +|------|---------------| +| Extract netlist | `Extract the netlist from my schematic at /path/to/project.kicad_sch` | +| Analyze project netlist | `Analyze the netlist in my KiCad project at /path/to/project.kicad_pro` | +| Check component connections | `Show me the connections for R5 in my schematic` | +| Import external netlist | `Import the netlist at /path/to/design.net into batch JSON` | +| Export netlist | `Export a netlist from my schematic` | + +## Extracting netlists + +To extract a netlist from a schematic: + +``` +Extract the netlist from my schematic at /path/to/project.kicad_sch +``` + +This parses the schematic, extracts all components and their properties, identifies connections between components, analyzes power and signal nets, and returns comprehensive netlist information. + +For project-based extraction: + +``` +Extract the netlist for my KiCad project at /path/to/project.kicad_pro +``` + +This finds the schematic associated with the project and extracts its netlist. + +## Understanding netlist data + +### Components + +| Field | Description | Example | +|-------|-------------|---------| +| Reference | Component reference designator | R1, C2, U3 | +| Type (lib_id) | Component type from library | Device:R, Device:C | +| Value | Component value | 10k, 100n, ATmega328P | +| Footprint | PCB footprint | Resistor_SMD:R_0805 | +| Pins | Pin numbers and names | 1 (VCC), 2 (GND) | + +### Nets + +| Field | Description | Example | +|-------|-------------|---------| +| Name | Net name | VCC, GND, NET1 | +| Pins | Connected pins | R1.1, C1.1, U1.5 | +| Type | Power or signal | Power, Signal | + +## Analyzing component connections + +To find all connections for a specific component: + +``` +Show me the connections for U1 in my schematic at /path/to/project.kicad_sch +``` + +Returns detailed component information, all pins and their connections, connected components on each pin, and net names. + +## Importing external netlists + +The `import_netlist` tool converts external netlist formats into mckicad batch JSON: + +``` +Import the netlist at /path/to/design.net into batch JSON +``` + +Supported formats: +- **KiCad S-expression** (`kicadsexpr`) -- the native KiCad netlist format +- **OrcadPCB2** -- OrCAD PCB Editor netlist format +- **Cadence Allegro** -- Cadence Allegro netlist format +- **auto** -- auto-detect format from file contents + +The output is a batch JSON file compatible with [apply_batch](/reference/batch/), ready to generate a schematic from the imported netlist. + +## Exporting netlists + +To export a netlist from a schematic using kicad-cli: + +``` +Export a netlist from my schematic at /path/to/project.kicad_sch +``` + +The `export_netlist` tool runs `kicad-cli sch export netlist` and supports multiple output formats. + +## Integration with other tools + +### BOM comparison + +Combine netlist extraction with BOM analysis: + +``` +Compare the netlist and BOM for my project at /path/to/project.kicad_pro +``` + +Helps identify components present in the schematic but missing from the BOM, or vice versa. + +### Design validation + +Use netlist extraction for validation: + +``` +Check for floating inputs in my schematic at /path/to/project.kicad_sch +``` + +``` +Verify power connections for all ICs in my project +``` + +### Power analysis + +Analyze power distribution: + +``` +Show me all power nets in my schematic +``` + +``` +List all components connected to the VCC net in my project +``` + +## Tips for better netlist analysis + +### Schematic organization + +1. **Use descriptive net names** instead of auto-generated ones +2. **Add power flags** to explicitly mark power inputs +3. **Organize hierarchical sheets** by function +4. **Use global labels** consistently for important signals + +### Working with complex designs + +1. Focus on specific sections using hierarchical labels +2. Analyze one component type at a time +3. Examine critical nets individually +4. Use reference designators systematically + +## Troubleshooting + +### Netlist extraction fails + +1. Check that the file exists and has the `.kicad_sch` extension +2. Verify it is a valid KiCad 6+ format schematic +3. Check file permissions +4. Look for syntax errors from recent manual edits +5. Try a simpler schematic to isolate the issue + +### Missing connections + +1. **Check for disconnected wires** -- wires that appear connected in KiCad might not actually be +2. **Verify junction points** -- make sure junction dots are present where needed +3. **Check hierarchical connections** -- ensure labels match across sheets +4. **Verify net labels** -- labels must be correctly placed to establish connections diff --git a/docs-site/src/content/docs/guides/patterns.md b/docs-site/src/content/docs/guides/patterns.md new file mode 100644 index 0000000..f7de448 --- /dev/null +++ b/docs-site/src/content/docs/guides/patterns.md @@ -0,0 +1,140 @@ +--- +title: "Schematic Patterns" +description: "Place common circuit building blocks with single tool calls" +--- + +The schematic patterns tools place common circuit building blocks -- decoupling cap banks, pull resistors, crystal oscillator circuits -- with a single tool call. Components, wires, labels, and power symbols are positioned using established layout conventions. + +In addition, the circuit pattern recognition tools can analyze existing schematics to identify common circuit blocks automatically. + +## Quick reference + +| Task | Example prompt | +|------|---------------| +| Place decoupling caps | `Place a decoupling bank with 100nF and 10uF on the 3V3 rail at position (150, 100)` | +| Place pull resistor | `Add a 4.7k pull-up resistor to the I2C_SDA signal on U1 pin 5, pulled to 3V3` | +| Place crystal circuit | `Place a 16MHz crystal with 22pF load caps at position (200, 150)` | +| Identify patterns | `Identify circuit patterns in my schematic at /path/to/schematic.kicad_sch` | +| Find specific patterns | `Find all power supply circuits in my schematic` | + +## Placement patterns + +### Decoupling cap bank + +`place_decoupling_bank_pattern` places a set of bypass capacitors with power and ground connections: + +``` +Place a decoupling bank with 100nF,10uF on +3V3 rail at x=150 y=100 in my schematic +``` + +The tool creates capacitors in a vertical column, each with a power symbol on the positive pin and GND on the negative pin, plus wire stubs connecting everything. + +### Pull resistor + +`place_pull_resistor_pattern` adds a pull-up or pull-down resistor connected to an existing signal pin: + +``` +Add a 10k pull-up resistor to signal SDA on U1 pin 15, pulled to +3V3 +``` + +The tool positions the resistor, connects one end to the specified signal pin, and connects the other end to the specified power rail. + +### Crystal oscillator + +`place_crystal_pattern` places a crystal with its load capacitors: + +``` +Place a 12MHz crystal with 18pF load caps at x=200 y=150 +``` + +This creates the crystal symbol and two load capacitors in the standard configuration, with GND connections on the cap ground pins. + +## Pattern recognition + +The pattern recognition system analyzes existing schematics to identify common circuit blocks. It works by matching component values, reference designators, and library IDs against known patterns. + +### Identifying patterns + +``` +Identify circuit patterns in my schematic at /path/to/schematic.kicad_sch +``` + +This parses the schematic, applies pattern recognition, and generates a report of all identified circuits with their components and characteristics. + +### Supported pattern types + +**Power supply circuits** -- Linear voltage regulators (78xx/79xx, LDOs), switching regulators (buck, boost, buck-boost). + +**Amplifier circuits** -- Operational amplifiers, transistor amplifiers (BJT, FET), audio amplifier ICs. + +**Filter circuits** -- Passive RC filters (low-pass/high-pass), active filters (op-amp based), crystal and ceramic filters. + +**Oscillator circuits** -- Crystal oscillators, oscillator ICs, RC oscillators (555 timer). + +**Digital interface circuits** -- I2C, SPI, UART, USB, Ethernet interfaces. + +**Microcontroller circuits** -- AVR, STM32, PIC, ESP, and other MCU families; development board modules. + +**Sensor interfaces** -- Temperature, humidity, pressure, motion, light, and other sensor types. + +### Searching for specific patterns + +``` +Find all power supply circuits in my schematic at /path/to/schematic.kicad_sch +``` + +``` +Show me the microcontroller circuits in my KiCad project at /path/to/project.kicad_pro +``` + +## Combining with other tools + +Pattern recognition works well alongside other mckicad features: + +1. **DRC + patterns** -- find design issues in specific circuit blocks + ``` + Find DRC issues affecting the power supply circuits in my schematic + ``` + +2. **BOM + patterns** -- analyze component usage by circuit type + ``` + Show me the BOM breakdown for the digital interface circuits in my design + ``` + +3. **Connectivity + patterns** -- understand connections within specific blocks + ``` + Analyze the connections between the microcontroller and sensor interfaces + ``` + +## Extending pattern recognition + +The pattern recognition system is based on regex matching of component values and library IDs, defined in `utils/pattern_recognition.py`. + +To add support for a new component family: + +```python +mcu_patterns = { + "AVR": r"ATMEGA\d+|ATTINY\d+|AT90\w+", + "STM32": r"STM32\w+", + # Add your pattern + "Renesas": r"R[A-Z]\d+|RL78|RX\d+", +} +``` + +See [Adding Tools](/development/adding-tools/) for the general process of contributing new functionality. + +## Troubleshooting + +### Patterns not recognized + +1. **Check component naming** -- pattern recognition relies on standard reference designators (R, C, U, etc.) +2. **Check component values** -- values must be in standard formats +3. **Check library IDs** -- using standard KiCad libraries improves recognition +4. **Inspect the patterns file** -- review `utils/pattern_recognition.py` to see what patterns are defined + +### Recognition fails entirely + +1. Verify the schematic file exists with a `.kicad_sch` extension +2. Confirm it is a valid KiCad 6+ format schematic +3. Check file permissions +4. Try a simpler schematic first to isolate the issue diff --git a/docs-site/src/content/docs/guides/projects.md b/docs-site/src/content/docs/guides/projects.md new file mode 100644 index 0000000..47cba13 --- /dev/null +++ b/docs-site/src/content/docs/guides/projects.md @@ -0,0 +1,116 @@ +--- +title: "Project Management" +description: "Discover, inspect, and manage KiCad projects" +--- + +The project management tools let you find KiCad projects on your system, inspect their file structure, open them in KiCad, and validate their integrity. + +## Quick reference + +| Task | Example prompt | +|------|---------------| +| List all projects | `List all my KiCad projects` | +| View project details | `Show details for my KiCad project at /path/to/project.kicad_pro` | +| Open a project | `Open my KiCad project at /path/to/project.kicad_pro` | +| Validate a project | `Validate my KiCad project at /path/to/project.kicad_pro` | + +## Listing projects + +``` +Could you list all my KiCad projects? +``` + +This scans your configured directories and returns a sorted list with project names, file paths, and last-modified dates. Most recently modified projects appear first. + +### How project discovery works + +Projects are discovered by: +1. Looking in the KiCad user directory (`KICAD_USER_DIR`) +2. Searching directories from `KICAD_SEARCH_PATHS` +3. Checking common project locations (auto-detected) + +Any file with a `.kicad_pro` extension is treated as a project. + +## Viewing project details + +``` +Show me details about my KiCad project at /path/to/your/project.kicad_pro +``` + +Returns: +- Basic project information +- Associated files (schematic, PCB, netlist, BOM exports) +- Project settings and metadata + +Example output: + +``` +Project: my_project + +Project Files +- project: /path/to/my_project.kicad_pro +- schematic: /path/to/my_project.kicad_sch +- pcb: /path/to/my_project.kicad_pcb +- netlist: /path/to/my_project_netlist.net + +Project Settings +- version: 20210606 +- generator: pcbnew +- board_thickness: 1.6 +``` + +## Opening projects + +``` +Can you open my KiCad project at /path/to/your/project.kicad_pro? +``` + +Launches KiCad with the specified project using platform-appropriate commands (`open` on macOS, `xdg-open` on Linux, `start` on Windows). Requires KiCad to be installed in a standard location or configured via `KICAD_APP_PATH`. + +## Validating projects + +``` +Validate my KiCad project at /path/to/your/project.kicad_pro +``` + +Checks for: +- Missing or corrupt project files +- Required components (schematic, PCB) +- Valid project structure +- Proper JSON formatting + +Useful for catching file issues before opening in KiCad. + +## MCP resources + +The server also exposes project data as MCP resources: + +- `kicad://projects` -- list of all discovered projects +- `kicad://project/{project_path}` -- details about a specific project + +These resources can be accessed programmatically by other MCP clients. + +## Best practices + +1. **Use consistent naming** -- keep project filenames meaningful and predictable +2. **Organize by function** -- group related projects in themed directories +3. **Use version control** -- track project changes with git +4. **Use absolute paths** -- when specifying project paths, absolute paths avoid ambiguity +5. **Escape spaces** -- on all platforms, ensure paths with spaces are properly quoted + +## Troubleshooting + +### Projects not found + +1. Check `.env` to ensure `KICAD_SEARCH_PATHS` includes the right directories +2. Verify projects have the `.kicad_pro` extension +3. Check read permissions on the directories +4. Try absolute paths instead of relative paths +5. Restart the server after changing configuration + +### Cannot open projects + +1. Verify KiCad is installed +2. Set `KICAD_APP_PATH` if KiCad is in a non-standard location +3. Ensure the project path is correct and accessible +4. Check the server logs for errors diff --git a/docs-site/src/content/docs/guides/prompts.md b/docs-site/src/content/docs/guides/prompts.md new file mode 100644 index 0000000..a547cdb --- /dev/null +++ b/docs-site/src/content/docs/guides/prompts.md @@ -0,0 +1,56 @@ +--- +title: "Prompt Templates" +description: "Pre-built conversation starters for common KiCad workflows" +--- + +Prompt templates are structured conversation starters that help you get targeted assistance from your AI client when working with KiCad. They provide context and structure for common tasks so the AI knows exactly what kind of help you need. + +## Available templates + +### General KiCad + +| Template | Description | Use when... | +|----------|-------------|-------------| +| `create_new_component` | Guidance for creating new KiCad components | You need to create a schematic symbol, PCB footprint, or 3D model | +| `debug_pcb_issues` | Help with troubleshooting PCB problems | You encounter issues with your PCB design | +| `pcb_manufacturing_checklist` | Preparation guidance for manufacturing | You are getting ready to send your PCB for fabrication | + +### DRC-specific + +| Template | Description | Use when... | +|----------|-------------|-------------| +| `fix_drc_violations` | Help resolving DRC violations | You have design rule violations to fix | +| `custom_design_rules` | Guidance for creating custom design rules | You need specialized rules for your project | + +### BOM-related + +| Template | Description | Use when... | +|----------|-------------|-------------| +| `analyze_components` | Analysis of component usage | You want insights about your component selections | +| `cost_estimation` | Help estimating project costs | You need to budget for your PCB project | +| `bom_export_help` | Assistance with exporting BOMs | You need help creating or customizing BOMs | +| `component_sourcing` | Guidance for finding components | You need to purchase components | +| `bom_comparison` | Compare BOMs between revisions | You want to understand changes between versions | + +## Using templates + +In MCP clients that support prompts (like Claude Desktop), you can access these through the prompt templates interface. Select a template, fill in any required fields (like project path), and the AI will have the right context to assist you. + +You can also reference the templates by name in conversation: + +``` +Use the debug_pcb_issues template to help me with my power supply board at /path/to/project.kicad_pro +``` + +## Design review workflow + +Combine several templates for a thorough design review: + +1. Start with `analyze_components` to understand your component choices +2. Use `debug_pcb_issues` to identify potential problems +3. Run `pcb_manufacturing_checklist` before sending to fab +4. Follow up with `cost_estimation` for budgeting + +## Adding custom templates + +See [Adding Tools](/development/adding-tools/) for the general pattern. Prompt templates follow the same module structure as tools and resources. diff --git a/docs-site/src/content/docs/reference/batch.md b/docs-site/src/content/docs/reference/batch.md new file mode 100644 index 0000000..23e9bf0 --- /dev/null +++ b/docs-site/src/content/docs/reference/batch.md @@ -0,0 +1,264 @@ +--- +title: "Batch Operations" +description: "JSON schema and usage for atomic multi-operation schematic modifications" +--- + +The `apply_batch` tool applies multiple schematic modifications atomically from a JSON file. All operations share a single load-save cycle for performance and consistency. + +## Overview + +Batch files live in the `.mckicad/` sidecar directory by default (next to the schematic). The schema supports six operation types, processed in dependency order: + +1. **components** -- placed first so pin-reference wires can find them +2. **power_symbols** -- attached to component pins +3. **wires** -- connect components by coordinates or pin references +4. **labels** -- local or global net labels, by coordinates or pin references +5. **label_connections** -- place the same net label on multiple pins simultaneously +6. **no_connects** -- no-connect flags by coordinates or pin references + +## Usage + +``` +Apply the batch file circuit.json to my schematic at /path/to/project.kicad_sch +``` + +### Dry run + +Validate the batch without modifying the schematic: + +``` +Apply the batch file circuit.json to my schematic with dry_run=True +``` + +Returns validation results and a preview of what would be applied. + +### Hierarchy context + +For sub-sheets in a hierarchical design, pass `parent_uuid` and `sheet_uuid` (both returned by `add_hierarchical_sheet`). This sets the instance path so that kicad-cli correctly resolves power symbol nets during netlist export. + +Without hierarchy context, power symbols (GND, +3V3, etc.) may be silently dropped from the netlist. + +## JSON schema + +```json +{ + "components": [ + { + "lib_id": "Device:C", + "reference": "C1", + "value": "100nF", + "x": 100, + "y": 200, + "rotation": 0, + "unit": 1 + } + ], + "power_symbols": [ + { + "net": "GND", + "pin_ref": "C1", + "pin_number": "2", + "lib_id": "power:GND", + "stub_length": 2.54 + } + ], + "wires": [ + { + "start_x": 100, + "start_y": 200, + "end_x": 200, + "end_y": 200 + }, + { + "from_ref": "R1", + "from_pin": "1", + "to_ref": "R2", + "to_pin": "2" + } + ], + "labels": [ + { + "text": "SPI_CLK", + "x": 150, + "y": 100, + "global": false, + "rotation": 0 + }, + { + "text": "GPIO5", + "pin_ref": "U8", + "pin_number": "15", + "global": true, + "shape": "bidirectional", + "direction": "left", + "stub_length": 2.54 + } + ], + "label_connections": [ + { + "net": "BOOT_MODE", + "global": true, + "shape": "bidirectional", + "stub_length": 2.54, + "connections": [ + {"ref": "U8", "pin": "48"}, + {"ref": "R42", "pin": "1", "direction": "right", "stub_length": 5.08} + ] + } + ], + "no_connects": [ + {"x": 300, "y": 300}, + {"pin_ref": "U8", "pin_number": "33"} + ] +} +``` + +## Field reference + +### components + +| Field | Required | Type | Description | +|-------|----------|------|-------------| +| `lib_id` | yes | string | Library symbol ID (e.g., `"Device:C"`, `"MCU_Microchip:ATmega328P-PU"`) | +| `reference` | no | string | Reference designator (e.g., `"C1"`, `"U3"`) | +| `value` | no | string | Component value (e.g., `"100nF"`, `"10k"`) | +| `x` | yes | number | X position in schematic units (mm) | +| `y` | yes | number | Y position in schematic units (mm) | +| `rotation` | no | number | Rotation angle in degrees (default: 0) | +| `unit` | no | integer | Unit number for multi-unit components (default: 1) | + +### power_symbols + +| Field | Required | Type | Description | +|-------|----------|------|-------------| +| `net` | yes | string | Power net name (e.g., `"GND"`, `"+3V3"`, `"VCC"`) | +| `pin_ref` | yes | string | Reference of the component to attach to | +| `pin_number` | yes | string | Pin number on that component | +| `lib_id` | no | string | Override the power symbol library ID | +| `stub_length` | no | number | Wire stub length in mm | + +### wires + +Wires accept either **coordinate mode** or **pin-reference mode**: + +**Coordinate mode:** + +| Field | Required | Type | Description | +|-------|----------|------|-------------| +| `start_x` | yes | number | Wire start X | +| `start_y` | yes | number | Wire start Y | +| `end_x` | yes | number | Wire end X | +| `end_y` | yes | number | Wire end Y | + +**Pin-reference mode:** + +| Field | Required | Type | Description | +|-------|----------|------|-------------| +| `from_ref` | yes | string | Source component reference | +| `from_pin` | yes | string | Source pin number | +| `to_ref` | yes | string | Destination component reference | +| `to_pin` | yes | string | Destination pin number | + +### labels + +Labels accept either **coordinate placement** or **pin-reference placement** (with automatic wire stub): + +| Field | Required | Type | Description | +|-------|----------|------|-------------| +| `text` | yes | string | Label text (net name) | +| `x` | coord mode | number | X position | +| `y` | coord mode | number | Y position | +| `pin_ref` | pin mode | string | Component reference to attach to | +| `pin_number` | pin mode | string | Pin number on that component | +| `global` | no | boolean | True for global label, false for local (default: false) | +| `rotation` | no | number | Rotation in degrees (default: auto-calculated for pin mode) | +| `shape` | no | string | Global label shape: `"bidirectional"`, `"input"`, `"output"`, etc. | +| `direction` | no | string | Override label direction: `"left"`, `"right"`, `"up"`, `"down"` | +| `stub_length` | no | number | Wire stub length in mm | + +### label_connections + +Place the same net label on multiple pins simultaneously: + +| Field | Required | Type | Description | +|-------|----------|------|-------------| +| `net` | yes | string | Net name for all labels | +| `global` | no | boolean | True for global labels (default: false) | +| `shape` | no | string | Global label shape | +| `stub_length` | no | number | Default stub length for all connections | +| `connections` | yes | array | List of pin connections | + +Each connection in the `connections` array: + +| Field | Required | Type | Description | +|-------|----------|------|-------------| +| `ref` | yes | string | Component reference | +| `pin` | yes | string | Pin number | +| `direction` | no | string | Override label direction for this pin | +| `stub_length` | no | number | Override stub length for this pin | + +### no_connects + +No-connect flags accept either **coordinate** or **pin-reference** placement: + +| Field | Required | Type | Description | +|-------|----------|------|-------------| +| `x` | coord mode | number | X position | +| `y` | coord mode | number | Y position | +| `pin_ref` | pin mode | string | Component reference | +| `pin_number` | pin mode | string | Pin number | + +## Batch limits + +The following limits are enforced during validation: + +| Limit | Value | +|-------|-------| +| Max components per batch | Configured in `BATCH_LIMITS` | +| Max wires per batch | Configured in `BATCH_LIMITS` | +| Max labels per batch | Configured in `BATCH_LIMITS` (includes label_connections) | +| Max total operations | Configured in `BATCH_LIMITS` | + +## Validation + +Before applying, the batch tool validates: + +- All required fields are present +- No unknown top-level keys +- Component `lib_id` values reference valid libraries +- Pin references (`pin_ref`, `from_ref`, `to_ref`) exist in the schematic or are declared in the same batch +- Operation counts are within limits + +Project-local symbol libraries (referenced in `sym-lib-table`) are automatically registered with the kicad-sch-api cache so that non-standard `lib_id` values resolve correctly. + +## Collision detection + +When placing pin-referenced labels, the batch tool: + +1. **Clamps stub length** to avoid bridging adjacent pins +2. **Resolves label collisions** -- shifts labels that would overlap existing ones +3. **Resolves wire collisions** -- adjusts wire stubs that would overlap existing wire segments + +The summary reports how many collisions were resolved. + +## Return value + +On success: + +```json +{ + "success": true, + "components_placed": 5, + "component_refs": ["C1", "C2", "R1", "R2", "U1"], + "power_symbols_placed": 3, + "wires_placed": 4, + "labels_placed": 6, + "no_connects_placed": 2, + "collisions_resolved": 1, + "wire_collisions_resolved": 0, + "total_operations": 20, + "batch_file": "/path/to/.mckicad/circuit.json", + "schematic_path": "/path/to/project.kicad_sch", + "engine": "kicad-sch-api" +} +``` diff --git a/docs-site/src/content/docs/reference/environment.md b/docs-site/src/content/docs/reference/environment.md new file mode 100644 index 0000000..707b3fb --- /dev/null +++ b/docs-site/src/content/docs/reference/environment.md @@ -0,0 +1,134 @@ +--- +title: "Environment Variables" +description: "Complete reference for all mckicad environment variables" +--- + +All environment variables are read at runtime through lazy config functions in `config.py`. Static constants (file extensions, timeout values, common library names) are module-level and do not read environment variables. + +The `.env` file in the project root is loaded by `main.py` before any mckicad imports, ensuring all config functions see the correct values. + +## Variable reference + +### KICAD_SEARCH_PATHS + +Comma-separated list of directories to search for KiCad projects. + +``` +KICAD_SEARCH_PATHS=~/Documents/KiCad,~/Electronics,~/Projects/KiCad +``` + +The server searches these directories recursively for `.kicad_pro` files. In addition to these paths, the server checks the KiCad user directory and common auto-detected locations. + +**Default:** None (only auto-detected paths are searched) + +### KICAD_USER_DIR + +The KiCad user documents directory. This is the primary directory searched for projects and is used for various KiCad-related path resolutions. + +``` +KICAD_USER_DIR=~/Documents/KiCad +``` + +**Default:** +- macOS/Windows: `~/Documents/KiCad` +- Linux: `~/kicad` + +### KICAD_CLI_PATH + +Explicit path to the `kicad-cli` executable. Set this if `kicad-cli` is not in your system PATH or is installed in a non-standard location. + +``` +KICAD_CLI_PATH=/usr/bin/kicad-cli +``` + +**Default:** Auto-detected from standard installation paths and system PATH + +Used by: DRC checks, BOM export, netlist export, Gerber/drill/PDF/SVG export, ERC, autowire netlist extraction. + +### KICAD_APP_PATH + +Path to the KiCad application installation. Used for opening projects and locating KiCad's bundled tools. + +``` +KICAD_APP_PATH=/Applications/KiCad/KiCad.app +``` + +**Default:** +- macOS: `/Applications/KiCad/KiCad.app` +- Windows: `C:\Program Files\KiCad` +- Linux: `/usr/share/kicad` + +### FREEROUTING_JAR_PATH + +Path to the FreeRouting JAR file for automated PCB routing. + +``` +FREEROUTING_JAR_PATH=~/freerouting.jar +``` + +**Default:** Auto-detected at these locations: +- `~/freerouting.jar` +- `/usr/local/bin/freerouting.jar` +- `/opt/freerouting/freerouting.jar` + +Requires a Java runtime (`java` must be on PATH). + +### LOG_LEVEL + +Logging verbosity. Logs are written to `mckicad.log` in the project root, overwritten on each server start. + +``` +LOG_LEVEL=DEBUG +``` + +**Default:** `INFO` + +**Valid values:** `DEBUG`, `INFO`, `WARNING`, `ERROR` + +Never use `print()` in mckicad code -- MCP uses stdin/stdout for JSON-RPC transport, so any print output would corrupt the protocol. + +## Example .env file + +```bash +# mckicad Configuration + +# Project search directories +KICAD_SEARCH_PATHS=~/Documents/KiCad,~/Electronics + +# KiCad user directory +KICAD_USER_DIR=~/Documents/KiCad + +# Explicit kicad-cli path (if not in PATH) +# KICAD_CLI_PATH=/usr/bin/kicad-cli + +# KiCad application path +# KICAD_APP_PATH=/usr/share/kicad + +# FreeRouting JAR for autorouting +# FREEROUTING_JAR_PATH=~/freerouting.jar + +# Logging level +# LOG_LEVEL=INFO +``` + +## Setting variables via MCP client config + +You can pass environment variables directly in the Claude Desktop configuration instead of using a `.env` file: + +```json +{ + "mcpServers": { + "kicad": { + "command": "/path/to/kicad-mcp/.venv/bin/python", + "args": ["/path/to/kicad-mcp/main.py"], + "env": { + "KICAD_SEARCH_PATHS": "/home/user/Electronics,/home/user/PCB", + "KICAD_CLI_PATH": "/usr/bin/kicad-cli", + "LOG_LEVEL": "DEBUG" + } + } + } +} +``` + +Variables set in the client config take precedence over those in the `.env` file. diff --git a/docs-site/src/content/docs/reference/tools.md b/docs-site/src/content/docs/reference/tools.md new file mode 100644 index 0000000..c68cc25 --- /dev/null +++ b/docs-site/src/content/docs/reference/tools.md @@ -0,0 +1,176 @@ +--- +title: "Tool Reference" +description: "Complete list of all mckicad MCP tools organized by module" +--- + +Every tool returns a dict with at least `success: bool`. On failure, an `error: str` field is included. On success, relevant data fields are added. + +## Project tools + +`tools/project.py` -- Project discovery and management. + +| Tool | Description | +|------|-------------| +| `list_projects` | Find and list all KiCad projects in configured search paths | +| `get_project_structure` | Get the file structure and metadata of a KiCad project | +| `open_project` | Open a KiCad project in the KiCad application | + +## Schematic tools + +`tools/schematic.py` -- Create and edit schematics via kicad-sch-api. + +| Tool | Description | +|------|-------------| +| `create_schematic` | Create a new empty KiCad schematic file | +| `add_component` | Add a component to a schematic from a symbol library | +| `search_components` | Search KiCad symbol libraries for components matching a query | +| `add_wire` | Add a wire segment between two coordinate points | +| `connect_pins` | Add a wire between two component pins by reference and pin number | +| `add_label` | Add a local or global net label to a schematic | +| `add_hierarchical_sheet` | Add a hierarchical sheet reference to a schematic | +| `list_components` | List components in a schematic, or look up a single component | +| `get_schematic_info` | Get a compact overview of a schematic (stats and validation summary) | +| `get_component_detail` | Get full details for a single component: properties, footprint, pins, position | +| `get_schematic_hierarchy` | Get the hierarchical sheet tree of a schematic | + +## Schematic editing tools + +`tools/schematic_edit.py` -- Modify and remove schematic elements. + +| Tool | Description | +|------|-------------| +| `modify_component` | Move, rotate, or change the value/footprint of an existing component | +| `remove_component` | Remove a component by its reference designator | +| `remove_wire` | Remove a wire segment by its UUID | +| `remove_label` | Remove a net label (local or global) by its UUID | +| `set_title_block` | Set title block fields (title, author, date, revision, company) | +| `add_text_annotation` | Add a text annotation to a schematic at specified coordinates | +| `add_no_connect` | Add a no-connect flag at specified coordinates | +| `backup_schematic` | Create a timestamped backup of a schematic file | +| `remove_wires_by_criteria` | Remove wire segments matching coordinate or bounding-box criteria | + +## Schematic pattern tools + +`tools/schematic_patterns.py` -- Place common circuit building blocks. + +| Tool | Description | +|------|-------------| +| `place_decoupling_bank_pattern` | Place a bank of decoupling capacitors with power and ground connections | +| `place_pull_resistor_pattern` | Place a pull-up or pull-down resistor connected to a signal pin | +| `place_crystal_pattern` | Place a crystal oscillator with load capacitors | + +## Batch tools + +`tools/batch.py` -- Atomic multi-operation schematic modifications. + +| Tool | Description | +|------|-------------| +| `apply_batch` | Apply a batch of schematic modifications from a JSON file (components, power symbols, wires, labels, no-connects) | + +See [Batch Operations](/reference/batch/) for the full JSON schema. + +## Power symbol tools + +`tools/power_symbols.py` -- Add power symbols to schematics. + +| Tool | Description | +|------|-------------| +| `add_power_symbol` | Add a power symbol (GND, VCC, +3V3, etc.) connected to a component pin | + +## Autowire tools + +`tools/autowire.py` -- Automated wiring strategy selection. + +| Tool | Description | +|------|-------------| +| `autowire_schematic` | Analyze unconnected nets and automatically wire them using optimal strategies | + +See [Autowiring guide](/guides/autowire/) for details on the decision tree. + +## Schematic analysis tools + +`tools/schematic_analysis.py` -- Connectivity analysis, ERC, and netlist operations. + +| Tool | Description | +|------|-------------| +| `run_schematic_erc` | Run Electrical Rules Check on a schematic via kicad-cli | +| `analyze_connectivity` | Analyze the net connectivity graph of a schematic | +| `check_pin_connection` | Check whether a specific pin is connected and to what | +| `verify_pins_connected` | Verify that two specific pins share the same net | +| `get_component_pins` | List all pins for a specific component | +| `export_netlist` | Export a netlist from a schematic using kicad-cli | +| `export_schematic_pdf` | Export a schematic to PDF with options for B&W and background | +| `audit_wiring` | Audit all wiring connections for a component | +| `verify_connectivity` | Compare actual wiring against an expected net-to-pin mapping | +| `validate_schematic` | Run a comprehensive health check (ERC + connectivity + optional baseline) | + +## Netlist tools + +`tools/netlist.py` -- External netlist import and conversion. + +| Tool | Description | +|------|-------------| +| `import_netlist` | Import an external netlist (KiCad, OrcadPCB2, Allegro) and convert to batch JSON | + +## Analysis tools + +`tools/analysis.py` -- Project validation and live board analysis. + +| Tool | Description | +|------|-------------| +| `validate_project` | Validate a KiCad project's structure and essential files | +| `analyze_board_real_time` | Live board analysis via KiCad IPC (requires running KiCad) | +| `get_component_details` | Retrieve component details from a live KiCad board via IPC | + +## BOM tools + +`tools/bom.py` -- Bill of Materials analysis and export. + +| Tool | Description | +|------|-------------| +| `analyze_bom` | Analyze the BOM for a KiCad project | +| `export_bom` | Export a BOM CSV from a schematic using kicad-cli | + +## DRC tools + +`tools/drc.py` -- Design Rule Check and manufacturing constraints. + +| Tool | Description | +|------|-------------| +| `run_drc_check` | Run a DRC check on a PCB using kicad-cli | +| `create_drc_rule_set` | Generate a technology-specific DRC rule set | +| `export_kicad_drc_rules` | Export DRC rules in KiCad-compatible text format | +| `get_manufacturing_constraints` | Get manufacturing constraints for a PCB technology | + +## Export tools + +`tools/export.py` -- Manufacturing file generation. + +| Tool | Description | +|------|-------------| +| `generate_pcb_svg` | Generate an SVG render of a PCB layout | +| `export_gerbers` | Export Gerber manufacturing files | +| `export_drill` | Export drill files | +| `export_pdf` | Export a PDF from a PCB or schematic | + +## Routing tools + +`tools/routing.py` -- FreeRouting autorouter integration. + +| Tool | Description | +|------|-------------| +| `check_routing_capability` | Check whether automated PCB routing is available | +| `route_pcb_automatically` | Automatically route a PCB using FreeRouting | +| `analyze_routing_quality` | Analyze current PCB routing for quality and potential issues | + +## PCB tools (IPC) + +`tools/pcb.py` -- Live PCB manipulation via KiCad IPC API. + +| Tool | Description | +|------|-------------| +| `move_component` | Move a component on the PCB to new coordinates | +| `rotate_component` | Rotate a component on the PCB | +| `get_board_statistics` | Retrieve high-level board statistics from a live KiCad instance | +| `check_connectivity` | Check the routing connectivity status of the PCB | +| `refill_zones` | Refill all copper zones on the PCB | diff --git a/docs-site/src/styles/custom.css b/docs-site/src/styles/custom.css new file mode 100644 index 0000000..9c8ce0e --- /dev/null +++ b/docs-site/src/styles/custom.css @@ -0,0 +1,14 @@ +/* mckicad docs — accent theming */ +:root { + --sl-color-accent-low: #1a3a2a; + --sl-color-accent: #2d8659; + --sl-color-accent-high: #a8dbbe; + --sl-font-system-mono: "JetBrains Mono", ui-monospace, "Cascadia Code", + "Source Code Pro", Menlo, Consolas, "DejaVu Sans Mono", monospace; +} + +:root[data-theme="light"] { + --sl-color-accent-low: #d4eddf; + --sl-color-accent: #1d7042; + --sl-color-accent-high: #0e3d22; +} diff --git a/docs-site/tsconfig.json b/docs-site/tsconfig.json new file mode 100644 index 0000000..bcbf8b5 --- /dev/null +++ b/docs-site/tsconfig.json @@ -0,0 +1,3 @@ +{ + "extends": "astro/tsconfigs/strict" +}