Document power symbol direct-connection behavior in tool docstrings

Power symbols at a pin coordinate create a direct electrical connection
without a wire. Note this in audit_wiring (explains wire_count: 0 for
connected pins) and add_power_symbol (explains why it draws a stub).
This commit is contained in:
Ryan Malloy 2026-03-05 08:21:43 -07:00
parent 700ad29bdd
commit 9d6cbc452c
2 changed files with 11 additions and 0 deletions

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@ -71,6 +71,11 @@ def add_power_symbol(
name, assigns a ``#PWR`` reference, places the symbol above (supply) name, assigns a ``#PWR`` reference, places the symbol above (supply)
or below (ground) the pin, and draws a connecting wire stub. or below (ground) the pin, and draws a connecting wire stub.
KiCad's connectivity engine treats a power symbol at a pin coordinate
as a direct electrical connection no wire is required. This tool
places the symbol *offset* from the pin for visual clarity and draws
an explicit wire stub bridging the gap.
This is the recommended way to connect power rails to component pins -- This is the recommended way to connect power rails to component pins --
it handles direction, grid alignment, and reference numbering for you. it handles direction, grid alignment, and reference numbering for you.

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@ -1152,6 +1152,12 @@ def audit_wiring(
ICs. Each net entry lists which pins of the component belong to it, how ICs. Each net entry lists which pins of the component belong to it, how
many wire segments exist, and what other components are connected. many wire segments exist, and what other components are connected.
Note: a pin can be connected to a net with ``wire_count: 0`` when a power
symbol sits directly on the pin coordinate. KiCad treats a power symbol
at a pin position as a direct electrical connection no wire is needed.
The ``add_power_symbol`` tool draws an explicit wire stub for visual
clarity, but manually-placed power symbols may not have one.
By default, wire segment coordinates are omitted to keep the response By default, wire segment coordinates are omitted to keep the response
compact. Pass ``include_wires=True`` to get full ``{start, end, uuid}`` compact. Pass ``include_wires=True`` to get full ``{start, end, uuid}``
data for each wire (offloaded to a sidecar file when large). data for each wire (offloaded to a sidecar file when large).