6 Commits

Author SHA1 Message Date
995dfd57c1 Add comprehensive advanced KiCad features and fix MCP compatibility issues
- Implement 3D model analysis and mechanical constraints checking
- Add advanced DRC rule customization for HDI, RF, and automotive applications
- Create symbol library management with analysis and validation tools
- Implement PCB layer stack-up analysis with impedance calculations
- Fix Context parameter validation errors causing client failures
- Add enhanced tool annotations with examples for better LLM compatibility
- Include comprehensive test coverage improvements (22.21% coverage)
- Add CLAUDE.md documentation for development guidance

New Advanced Tools:
• 3D model analysis: analyze_3d_models, check_mechanical_constraints
• Advanced DRC: create_drc_rule_set, analyze_pcb_drc_violations
• Symbol management: analyze_symbol_library, validate_symbol_library
• Layer analysis: analyze_pcb_stackup, calculate_trace_impedance

🤖 Generated with [Claude Code](https://claude.ai/code)

Co-Authored-By: Claude <noreply@anthropic.com>
2025-08-11 15:57:46 -06:00
Lama
b1cb48ecf7 fix random import, etc issues 2025-03-21 13:08:15 -04:00
Lama
6953e5dc9a Add comprehensive BOM management functionality with analysis, export, and viewing features 2025-03-20 13:54:48 -04:00
Lama
100f64186d Add Design Rule Check (DRC) functionality to KiCad MCP server
This commit implements comprehensive DRC support including:
- DRC check tool integration with both pcbnew Python module and CLI fallback
- Detailed DRC reports as resources with violation categorization
- Historical tracking of DRC results with visual trend analysis
- Comparison between current and previous DRC runs
- New prompt templates for fixing violations and custom design rules
- Full documentation in drc_guide.md

The DRC system helps users track their progress over time, focusing on the
most critical design rule violations as they improve their PCB designs.
2025-03-20 02:41:52 -04:00
Lama
9fa890bf90 a lot 2025-03-20 02:01:30 -04:00
Lama
e4035bdcb1 create new dir structure 2025-03-20 01:47:29 -04:00