- Implement 3D model analysis and mechanical constraints checking - Add advanced DRC rule customization for HDI, RF, and automotive applications - Create symbol library management with analysis and validation tools - Implement PCB layer stack-up analysis with impedance calculations - Fix Context parameter validation errors causing client failures - Add enhanced tool annotations with examples for better LLM compatibility - Include comprehensive test coverage improvements (22.21% coverage) - Add CLAUDE.md documentation for development guidance New Advanced Tools: • 3D model analysis: analyze_3d_models, check_mechanical_constraints • Advanced DRC: create_drc_rule_set, analyze_pcb_drc_violations • Symbol management: analyze_symbol_library, validate_symbol_library • Layer analysis: analyze_pcb_stackup, calculate_trace_impedance 🤖 Generated with [Claude Code](https://claude.ai/code) Co-Authored-By: Claude <noreply@anthropic.com>
51 lines
1.8 KiB
Python
51 lines
1.8 KiB
Python
"""
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DRC prompt templates for KiCad PCB design.
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"""
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from mcp.server.fastmcp import FastMCP
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def register_drc_prompts(mcp: FastMCP) -> None:
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"""Register DRC prompt templates with the MCP server.
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Args:
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mcp: The FastMCP server instance
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"""
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@mcp.prompt()
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def fix_drc_violations() -> str:
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"""Prompt for assistance with fixing DRC violations."""
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return """
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I'm trying to fix DRC (Design Rule Check) violations in my KiCad PCB design. I need help with:
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1. Understanding what these DRC errors mean
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2. Knowing how to fix each type of violation
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3. Best practices for preventing DRC issues in future designs
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Here are the specific DRC errors I'm seeing (please list errors from your DRC report, or use the kicad://drc/path_to_project resource to see your full DRC report):
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[list your DRC errors here]
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Please help me understand these errors and provide step-by-step guidance on fixing them.
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"""
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@mcp.prompt()
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def custom_design_rules() -> str:
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"""Prompt for assistance with creating custom design rules."""
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return """
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I want to create custom design rules for my KiCad PCB. My project has the following requirements:
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1. [Describe your project's specific requirements]
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2. [List any special considerations like high voltage, high current, RF, etc.]
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3. [Mention any manufacturing constraints]
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Please help me set up appropriate design rules for my KiCad project, including:
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- Minimum trace width and clearance settings
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- Via size and drill constraints
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- Layer stack considerations
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- Other important design rules
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Explain how to configure these rules in KiCad and how to verify they're being applied correctly.
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"""
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