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Add intelligent analysis and recommendation tools for KiCad designs: ## New AI Tools (kicad_mcp/tools/ai_tools.py) - suggest_components_for_circuit: Smart component suggestions based on circuit analysis - recommend_design_rules: Automated design rule recommendations for different technologies - optimize_pcb_layout: PCB layout optimization for signal integrity, thermal, and cost - analyze_design_completeness: Comprehensive design completeness analysis ## Enhanced Utilities - component_utils.py: Add ComponentType enum and component classification functions - pattern_recognition.py: Enhanced circuit pattern analysis and recommendations - netlist_parser.py: Implement missing parse_netlist_file function for AI tools ## Key Features - Circuit pattern recognition for power supplies, amplifiers, microcontrollers - Technology-specific design rules (standard, HDI, RF, automotive) - Layout optimization suggestions with implementation steps - Component suggestion system with standard values and examples - Design completeness scoring with actionable recommendations ## Server Integration - Register AI tools in FastMCP server - Integrate with existing KiCad utilities and file parsers - Error handling and graceful fallbacks for missing data Fixes ImportError that prevented server startup and enables advanced AI-powered design assistance for KiCad projects. 🤖 Generated with [Claude Code](https://claude.ai/code) Co-Authored-By: Claude <noreply@anthropic.com>
135 lines
4.8 KiB
Python
135 lines
4.8 KiB
Python
"""
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Design Rule Check (DRC) tools for KiCad PCB files.
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"""
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import os
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# import logging # <-- Remove if no other logging exists
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from typing import Any
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from mcp.server.fastmcp import FastMCP
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# Import implementations
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from kicad_mcp.tools.drc_impl.cli_drc import run_drc_via_cli
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from kicad_mcp.utils.drc_history import compare_with_previous, get_drc_history, save_drc_result
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from kicad_mcp.utils.file_utils import get_project_files
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def register_drc_tools(mcp: FastMCP) -> None:
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"""Register DRC tools with the MCP server.
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Args:
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mcp: The FastMCP server instance
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"""
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@mcp.tool()
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def get_drc_history_tool(project_path: str) -> dict[str, Any]:
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"""Get the DRC check history for a KiCad project.
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Args:
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project_path: Path to the KiCad project file (.kicad_pro)
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Returns:
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Dictionary with DRC history entries
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"""
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print(f"Getting DRC history for project: {project_path}")
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if not os.path.exists(project_path):
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print(f"Project not found: {project_path}")
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return {"success": False, "error": f"Project not found: {project_path}"}
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# Get history entries
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history_entries = get_drc_history(project_path)
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# Calculate trend information
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trend = None
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if len(history_entries) >= 2:
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first = history_entries[-1] # Oldest entry
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last = history_entries[0] # Newest entry
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first_violations = first.get("total_violations", 0)
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last_violations = last.get("total_violations", 0)
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if first_violations > last_violations:
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trend = "improving"
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elif first_violations < last_violations:
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trend = "degrading"
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else:
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trend = "stable"
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return {
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"success": True,
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"project_path": project_path,
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"history_entries": history_entries,
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"entry_count": len(history_entries),
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"trend": trend,
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}
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@mcp.tool()
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def run_drc_check(project_path: str) -> dict[str, Any]:
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"""Run a Design Rule Check on a KiCad PCB file.
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Args:
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project_path: Path to the KiCad project file (.kicad_pro)
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Returns:
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Dictionary with DRC results and statistics
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"""
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print(f"Running DRC check for project: {project_path}")
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if not os.path.exists(project_path):
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print(f"Project not found: {project_path}")
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return {"success": False, "error": f"Project not found: {project_path}"}
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# Get PCB file from project
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files = get_project_files(project_path)
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if "pcb" not in files:
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print("PCB file not found in project")
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return {"success": False, "error": "PCB file not found in project"}
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pcb_file = files["pcb"]
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print(f"Found PCB file: {pcb_file}")
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# Run DRC using the appropriate approach
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drc_results = None
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print("Using kicad-cli for DRC")
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# Use synchronous DRC check
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try:
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from kicad_mcp.tools.drc_impl.cli_drc import run_drc_via_cli_sync
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drc_results = run_drc_via_cli_sync(pcb_file)
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except ImportError:
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# Fallback - call the async version but handle it differently
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import asyncio
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drc_results = asyncio.run(run_drc_via_cli(pcb_file, None))
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# Process and save results if successful
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if drc_results and drc_results.get("success", False):
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# logging.info(f"[DRC] DRC check successful for {pcb_file}. Saving results.") # <-- Remove log
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# Save results to history
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save_drc_result(project_path, drc_results)
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# Add comparison with previous run
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comparison = compare_with_previous(project_path, drc_results)
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if comparison:
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drc_results["comparison"] = comparison
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if comparison["change"] < 0:
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print(f"Great progress! You've fixed {abs(comparison['change'])} DRC violations since the last check.")
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elif comparison["change"] > 0:
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print(f"Found {comparison['change']} new DRC violations since the last check.")
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else:
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print("No change in the number of DRC violations since the last check.")
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elif drc_results:
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# logging.warning(f"[DRC] DRC check reported failure for {pcb_file}: {drc_results.get('error')}") # <-- Remove log
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# Pass or print a warning if needed
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pass
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else:
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# logging.error(f"[DRC] DRC check returned None for {pcb_file}") # <-- Remove log
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# Pass or print an error if needed
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pass
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# DRC check completed
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return drc_results or {"success": False, "error": "DRC check failed with an unknown error"}
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