Ryan Malloy
00fb40fbf4
KiCad 10's kicad-cli has no specctra subcommands, kipy has no Specctra support, and pcbnew.ImportSpecctraSES needs a GUI display. This adds a pure-Python applier that injects FreeRouting's routed wires and vias directly into a .kicad_pcb, reusing the existing sexp_tree engine. Reads the (resolution unit value) scope for scaling, applies the Specctra Y-up to KiCad Y-down flip, maps SES net names to board net numbers, and splices (segment)/(via) nodes in before the board's closing paren so the rest of the file is preserved byte-for-byte. Fixtures are a real Arduino_Mega template board and a FreeRouting-routed SES; the integration test applies 23 segments across GND and +5V.
263 lines
7.7 KiB
Python
263 lines
7.7 KiB
Python
"""Tests for the native SES -> .kicad_pcb applier."""
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from pathlib import Path
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import pytest
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from mckicad.utils.ses_apply import (
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SesApplyError,
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_fmt,
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_padstack_dims,
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_transform,
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apply_ses_to_board,
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build_net_map,
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resolution_scale,
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)
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from mckicad.utils.sexp_tree import find, parse, parse_file
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FIXTURES = Path(__file__).parent / "fixtures"
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BOARD = FIXTURES / "arduino_mega.kicad_pcb"
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ROUTED_SES = FIXTURES / "arduino_mega_routed.ses"
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# A hand-built SES with a single-segment wire and one via, in um/10 units.
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SMALL_SES = """\
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(session small
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(routes
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(resolution um 10)
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(library_out
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(padstack "Via[0-1]_600:300_um"
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(shape (circle F.Cu 6000 0 0))
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(shape (circle B.Cu 6000 0 0))
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(attach off)
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)
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)
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(network_out
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(net GND
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(wire
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(path F.Cu 2000
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1965200 -923800
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1939800 -923800
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)
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)
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(via "Via[0-1]_600:300_um" 1928283 -923800)
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)
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(net NO_SUCH_NET
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(wire
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(path B.Cu 2000
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100000 -100000
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200000 -100000
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)
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)
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)
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)
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)
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)
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"""
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# --------------------------------------------------------------------------
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# Resolution parsing / scaling
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# --------------------------------------------------------------------------
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@pytest.mark.unit
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def test_resolution_scale_um_10():
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# (resolution um 10): 1 SES unit = 0.1 um = 1/10000 mm
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assert resolution_scale("um", 10) == pytest.approx(1e-4)
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@pytest.mark.unit
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def test_resolution_scale_units():
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assert resolution_scale("mm", 1) == pytest.approx(1.0)
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assert resolution_scale("um", 1) == pytest.approx(0.001)
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assert resolution_scale("mil", 1) == pytest.approx(0.0254)
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assert resolution_scale("inch", 1) == pytest.approx(25.4)
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@pytest.mark.unit
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def test_resolution_scale_rejects_bad_unit():
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with pytest.raises(SesApplyError):
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resolution_scale("furlong", 10)
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@pytest.mark.unit
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def test_resolution_scale_rejects_zero():
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with pytest.raises(SesApplyError):
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resolution_scale("um", 0)
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# --------------------------------------------------------------------------
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# Coordinate transform (the de-risked J7 anchor)
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# --------------------------------------------------------------------------
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@pytest.mark.unit
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def test_transform_j7_anchor():
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# SES (place J7 1939800 -923800) <-> board (at 193.98 92.38)
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scale = resolution_scale("um", 10)
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x, y = _transform(1939800, -923800, scale)
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assert x == "193.98"
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assert y == "92.38"
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@pytest.mark.unit
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def test_transform_y_axis_flip():
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scale = resolution_scale("um", 10)
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# Positive SES y flips to negative KiCad y.
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_, y = _transform(0, 100000, scale)
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assert y == "-10"
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# Origin stays clean (no "-0").
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assert _transform(0, 0, scale) == ("0", "0")
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@pytest.mark.unit
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def test_fmt_trims_trailing_zeros():
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assert _fmt(0.2) == "0.2"
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assert _fmt(196.52) == "196.52"
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assert _fmt(-0.0) == "0"
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# --------------------------------------------------------------------------
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# Net-name -> number mapping
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# --------------------------------------------------------------------------
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@pytest.mark.unit
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def test_build_net_map():
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root = parse_file(str(BOARD))
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net_map = build_net_map(root)
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assert net_map["GND"] == 1
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assert net_map["+5V"] == 34
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assert net_map["VCC"] == 76
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# The empty net 0 is still present.
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assert net_map[""] == 0
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# --------------------------------------------------------------------------
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# Padstack -> via geometry
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# --------------------------------------------------------------------------
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@pytest.mark.unit
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def test_padstack_dims_from_name():
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# "600:300_um" -> 0.6 mm pad, 0.3 mm drill
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size, drill = _padstack_dims("Via[0-1]_600:300_um", shape_diameter_mm=0.6)
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assert size == pytest.approx(0.6)
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assert drill == pytest.approx(0.3)
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@pytest.mark.unit
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def test_padstack_dims_fallback_to_shape_and_default():
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size, drill = _padstack_dims("MysteryPad", shape_diameter_mm=0.8)
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assert size == pytest.approx(0.8)
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assert drill == pytest.approx(0.3) # default drill
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size, drill = _padstack_dims("MysteryPad", shape_diameter_mm=None)
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assert size == pytest.approx(0.6) # default size
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assert drill == pytest.approx(0.3)
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# --------------------------------------------------------------------------
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# Small hand-built SES -> expected segment/via s-expr
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# --------------------------------------------------------------------------
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@pytest.mark.unit
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def test_small_ses_emits_expected_segment_and_via(tmp_path):
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ses = tmp_path / "small.ses"
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ses.write_text(SMALL_SES)
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out = tmp_path / "out.kicad_pcb"
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result = apply_ses_to_board(str(BOARD), str(ses), str(out))
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# One GND wire (1 segment) + one via; NO_SUCH_NET skipped as unknown.
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assert result["segments_added"] == 1
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assert result["vias_added"] == 1
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assert result["nets_routed"] == 1
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assert result["unknown_nets"] == ["NO_SUCH_NET"]
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root = parse_file(str(out))
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segments = find(root, "segment")
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vias = find(root, "via")
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assert len(segments) == 1
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assert len(vias) == 1
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seg = segments[0]
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def child_vals(node, tag):
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for c in node.children:
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if c.tag == tag:
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return c.values
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return None
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assert child_vals(seg, "start") == ["196.52", "92.38"]
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assert child_vals(seg, "end") == ["193.98", "92.38"]
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assert child_vals(seg, "width") == ["0.2"]
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assert child_vals(seg, "layer") == ["F.Cu"]
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assert child_vals(seg, "net") == ["1"] # GND
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via = vias[0]
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assert child_vals(via, "at") == ["192.8283", "92.38"]
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assert child_vals(via, "size") == ["0.6"]
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assert child_vals(via, "drill") == ["0.3"]
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assert child_vals(via, "layers") == ["F.Cu", "B.Cu"]
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assert child_vals(via, "net") == ["1"]
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@pytest.mark.unit
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def test_apply_preserves_original_board_bytes(tmp_path):
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ses = tmp_path / "small.ses"
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ses.write_text(SMALL_SES)
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out = tmp_path / "out.kicad_pcb"
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apply_ses_to_board(str(BOARD), str(ses), str(out))
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original = BOARD.read_text()
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produced = out.read_text()
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# Everything up to the injected block is untouched.
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insert = produced.index("\t(segment")
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assert produced[:insert] == original[: len(produced[:insert])]
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# The board still closes cleanly.
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assert produced.rstrip().endswith(")")
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# --------------------------------------------------------------------------
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# Integration: real routed SES applied to real board
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# --------------------------------------------------------------------------
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@pytest.mark.integration
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def test_apply_real_routed_ses(tmp_path):
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out = tmp_path / "routed.kicad_pcb"
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result = apply_ses_to_board(str(BOARD), str(ROUTED_SES), str(out))
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# The oracle SES routes GND (11 segments) and +5V (12 segments), no vias.
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assert result["segments_added"] == 23
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assert result["vias_added"] == 0
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assert result["nets_routed"] == 2
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assert result["unknown_nets"] == []
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assert out.exists()
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@pytest.mark.integration
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def test_applied_segments_reference_valid_nets(tmp_path):
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out = tmp_path / "routed.kicad_pcb"
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apply_ses_to_board(str(BOARD), str(ROUTED_SES), str(out))
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root = parse_file(str(out))
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net_numbers = {int(n.values[0]) for n in find(root, "net") if n.values}
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segments = find(root, "segment")
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assert len(segments) > 0
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for seg in segments:
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net_child = next((c for c in seg.children if c.tag == "net"), None)
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assert net_child is not None
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assert int(net_child.values[0]) in net_numbers
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@pytest.mark.integration
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def test_applied_board_reparses(tmp_path):
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out = tmp_path / "routed.kicad_pcb"
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apply_ses_to_board(str(BOARD), str(ROUTED_SES), str(out))
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# The produced file must still be a single well-formed s-expression.
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root = parse(out.read_text())
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assert root.tag == "kicad_pcb"
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