diff --git a/.gitignore b/.gitignore index 3b2e2d2..e34cac3 100644 --- a/.gitignore +++ b/.gitignore @@ -5,3 +5,8 @@ __pycache__/ dist/ *.egg-info/ .ruff_cache/ + +# Docs site build artifacts +docs/node_modules/ +docs/dist/ +docs/.astro/ diff --git a/docs/.dockerignore b/docs/.dockerignore new file mode 100644 index 0000000..460f0c0 --- /dev/null +++ b/docs/.dockerignore @@ -0,0 +1,6 @@ +node_modules +dist +.astro +.env +.git +*.md diff --git a/docs/.env b/docs/.env new file mode 100644 index 0000000..5c3b321 --- /dev/null +++ b/docs/.env @@ -0,0 +1,10 @@ +# docs environment configuration +COMPOSE_PROJECT_NAME=mcltspice-docs + +# MODE: dev | prod +MODE=dev + +# Domain configuration +SITE_DOMAIN=mcltspice.l.warehack.ing +# Production: mcltspice.warehack.ing +# Dev (local): mcltspice.l.warehack.ing diff --git a/docs/Dockerfile b/docs/Dockerfile new file mode 100644 index 0000000..0e66d72 --- /dev/null +++ b/docs/Dockerfile @@ -0,0 +1,63 @@ +# ── Dev target ──────────────────────────────────────────────── +FROM node:22-slim AS dev + +WORKDIR /app + +COPY package*.json ./ +RUN npm ci + +COPY . . + +EXPOSE 4321 + +CMD ["npm", "run", "dev"] + +# ── Prod build stage ───────────────────────────────────────── +FROM node:22-slim AS build + +WORKDIR /app + +COPY package*.json ./ +RUN npm ci + +COPY . . +RUN npm run build + +# ── Prod serve stage ───────────────────────────────────────── +FROM caddy:2-alpine AS prod + +# Non-root user +RUN addgroup -g 1001 -S app && \ + adduser -S app -u 1001 -G app + +COPY --from=build /app/dist /srv +COPY <<'CADDYFILE' /etc/caddy/Caddyfile +:8080 { + root * /srv + file_server + encode gzip zstd + + header { + X-Content-Type-Options nosniff + X-Frame-Options DENY + Referrer-Policy strict-origin-when-cross-origin + Cache-Control "public, max-age=31536000, immutable" + } + + handle_errors { + rewrite * /404.html + file_server + } +} +CADDYFILE + +RUN chown -R app:app /srv + +USER app + +EXPOSE 8080 + +HEALTHCHECK --interval=30s --timeout=5s --start-period=10s --retries=3 \ + CMD wget -qO- http://127.0.0.1:8080/ || exit 1 + +CMD ["caddy", "run", "--config", "/etc/caddy/Caddyfile"] diff --git a/docs/Makefile b/docs/Makefile new file mode 100644 index 0000000..8b45b2d --- /dev/null +++ b/docs/Makefile @@ -0,0 +1,47 @@ +include .env +export + +COMPOSE_BASE := docker compose -f docker-compose.yml -f docker-compose.$(MODE).yml + +.PHONY: dev prod build logs stop clean restart status help + +## dev: start in dev mode with HMR and follow logs +dev: + @echo "Starting dev on $(SITE_DOMAIN) ..." + MODE=dev docker compose -f docker-compose.yml -f docker-compose.dev.yml up --build -d + MODE=dev docker compose -f docker-compose.yml -f docker-compose.dev.yml logs -f + +## prod: build and start in production mode +prod: + @echo "Deploying prod on $(SITE_DOMAIN) ..." + MODE=prod docker compose -f docker-compose.yml -f docker-compose.prod.yml up --build -d + MODE=prod docker compose -f docker-compose.yml -f docker-compose.prod.yml logs --tail=40 + +## build: build containers using current MODE from .env +build: + $(COMPOSE_BASE) build + +## logs: follow container logs +logs: + $(COMPOSE_BASE) logs -f + +## stop: stop containers +stop: + $(COMPOSE_BASE) down + +## restart: rebuild and restart +restart: stop + $(COMPOSE_BASE) up --build -d + $(COMPOSE_BASE) logs --tail=20 + +## clean: stop, remove volumes and local images +clean: + $(COMPOSE_BASE) down -v --rmi local + +## status: show running container status +status: + $(COMPOSE_BASE) ps + +## help: show available targets +help: + @grep '^## ' Makefile | sed 's/^## //' | column -t -s ':' diff --git a/docs/astro.config.mjs b/docs/astro.config.mjs new file mode 100644 index 0000000..dceda60 --- /dev/null +++ b/docs/astro.config.mjs @@ -0,0 +1,80 @@ +import { defineConfig } from 'astro/config'; +import starlight from '@astrojs/starlight'; +import tailwindcss from '@tailwindcss/vite'; + +export default defineConfig({ + site: 'https://mcltspice.warehack.ing', + telemetry: false, + devToolbar: { enabled: false }, + integrations: [ + starlight({ + title: 'mcltspice', + tagline: 'LTspice circuit simulation via MCP', + social: [ + { icon: 'external', label: 'Gitea', href: 'https://git.supported.systems/MCP/mcltspice' }, + { icon: 'external', label: 'PyPI', href: 'https://pypi.org/project/mcltspice/' }, + ], + editLink: { + baseUrl: 'https://git.supported.systems/MCP/mcltspice/_edit/main/docs/', + }, + customCss: ['./src/styles/custom.css'], + sidebar: [ + { + label: 'Getting Started', + items: [ + { label: 'Overview', slug: 'getting-started' }, + { label: 'Prerequisites', slug: 'getting-started/prerequisites' }, + { label: 'Claude Code Setup', slug: 'getting-started/claude-code' }, + { label: 'First Simulation', slug: 'getting-started/first-simulation' }, + ], + }, + { + label: 'Tutorials', + badge: { text: 'Learn', variant: 'tip' }, + items: [ + { label: 'Overview', slug: 'tutorials' }, + { label: 'Design a Filter', slug: 'tutorials/design-a-filter' }, + { label: 'Monte Carlo Yield', slug: 'tutorials/monte-carlo-yield' }, + ], + }, + { + label: 'Reference', + collapsed: false, + items: [ + { label: 'Overview', slug: 'reference' }, + { label: 'Simulation', slug: 'reference/simulation' }, + { label: 'Waveform', slug: 'reference/waveform' }, + { label: 'Signal Analysis', slug: 'reference/signal-analysis' }, + { label: 'Noise', slug: 'reference/noise' }, + { label: 'Stability & Power', slug: 'reference/stability-power' }, + { label: 'Schematic & Netlist', slug: 'reference/schematic-netlist' }, + { label: 'Library & Templates', slug: 'reference/library-templates' }, + { label: 'Resources', slug: 'reference/resources' }, + { label: 'Prompts', slug: 'reference/prompts' }, + ], + }, + { + label: 'Concepts', + collapsed: true, + items: [ + { label: 'LTspice on Linux', slug: 'concepts/ltspice-on-linux' }, + { label: 'Simulation Types', slug: 'concepts/simulation-types' }, + ], + }, + ], + }), + ], + vite: { + plugins: [tailwindcss()], + server: { + host: '0.0.0.0', + ...(process.env.VITE_HMR_HOST && { + hmr: { + host: process.env.VITE_HMR_HOST, + protocol: 'wss', + clientPort: 443, + }, + }), + }, + }, +}); diff --git a/docs/docker-compose.dev.yml b/docs/docker-compose.dev.yml new file mode 100644 index 0000000..6275575 --- /dev/null +++ b/docs/docker-compose.dev.yml @@ -0,0 +1,19 @@ +services: + docs: + environment: + - VITE_HMR_HOST=${SITE_DOMAIN} + volumes: + - ./src:/app/src + - ./public:/app/public + - ./astro.config.mjs:/app/astro.config.mjs + labels: + caddy.reverse_proxy: "{{upstreams 4321}}" + # HMR WebSocket support -- keeps Vite hot-reload alive through Caddy + caddy.reverse_proxy.flush_interval: "-1" + caddy.reverse_proxy.transport: http + caddy.reverse_proxy.transport.read_timeout: "0" + caddy.reverse_proxy.transport.write_timeout: "0" + caddy.reverse_proxy.transport.keepalive: "5m" + caddy.reverse_proxy.transport.keepalive_idle_conns: "10" + caddy.reverse_proxy.stream_timeout: "24h" + caddy.reverse_proxy.stream_close_delay: "5s" diff --git a/docs/docker-compose.prod.yml b/docs/docker-compose.prod.yml new file mode 100644 index 0000000..410ffec --- /dev/null +++ b/docs/docker-compose.prod.yml @@ -0,0 +1,15 @@ +services: + docs: + labels: + caddy.reverse_proxy: "{{upstreams 8080}}" + caddy.header.Cache-Control: "public, max-age=31536000, immutable" + caddy.header.X-Content-Type-Options: nosniff + caddy.header.X-Frame-Options: DENY + caddy.header.Referrer-Policy: strict-origin-when-cross-origin + security_opt: + - no-new-privileges:true + read_only: true + tmpfs: + - /tmp:noexec,nosuid,size=50m + - /config/caddy:size=10m + - /data/caddy:size=10m diff --git a/docs/docker-compose.yml b/docs/docker-compose.yml new file mode 100644 index 0000000..88d3d56 --- /dev/null +++ b/docs/docker-compose.yml @@ -0,0 +1,24 @@ +services: + docs: + build: + context: . + dockerfile: Dockerfile + target: ${MODE:-dev} + container_name: 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"typescript": "^4.9.4 || ^5.0.2", + "zod": "^3" + } + }, + "node_modules/zwitch": { + "version": "2.0.4", + "resolved": "https://registry.npmjs.org/zwitch/-/zwitch-2.0.4.tgz", + "integrity": "sha512-bXE4cR/kVZhKZX/RjPEflHaKVhUVl85noU3v6b8apfQEc1x4A+zBxjZ4lN8LqGd6WZ3dl98pY4o717VFmoPp+A==", + "license": "MIT", + "funding": { + "type": "github", + "url": "https://github.com/sponsors/wooorm" + } + } + } +} diff --git a/docs/package.json b/docs/package.json new file mode 100644 index 0000000..43e2ddd --- /dev/null +++ b/docs/package.json @@ -0,0 +1,20 @@ +{ + "name": "mcltspice-docs", + "type": "module", + "private": true, + "scripts": { + "postinstall": "node patches/fix-starlight-head.mjs", + "dev": "astro dev --host 0.0.0.0", + "build": "astro build", + "preview": "astro preview --host 0.0.0.0" + }, + "dependencies": { + "astro": "^5.17.2", + "@astrojs/starlight": "^0.37.6", + "@astrojs/starlight-tailwind": "^4.0.2", + "@tailwindcss/vite": "^4.1.0", + "tailwindcss": "^4.1.0", + "@lucide/astro": "^0.563.0", + "sharp": "^0.33.0" + } +} diff --git a/docs/patches/fix-starlight-head.mjs b/docs/patches/fix-starlight-head.mjs new file mode 100644 index 0000000..b153c85 --- /dev/null +++ b/docs/patches/fix-starlight-head.mjs @@ -0,0 +1,35 @@ +/** + * Patches @astrojs/starlight to handle undefined `data.head` in frontmatter. + * + * Starlight 0.37.x assumes docsSchema() defaults `head` to [] via Zod, but + * the content loader doesn't always apply this default, causing: + * "Cannot read properties of undefined (reading 'some')" + * + * This adds a nullish coalescing fallback: `data.head ?? []` + */ + +import { readFileSync, writeFileSync } from 'node:fs'; + +const file = 'node_modules/@astrojs/starlight/utils/head.ts'; + +try { + let src = readFileSync(file, 'utf8'); + const target = 'config.head, data.head)'; + const replacement = 'config.head, data.head ?? [])'; + + if (src.includes(replacement)) { + console.log('[patch] head.ts already patched, skipping.'); + process.exit(0); + } + + if (!src.includes(target)) { + console.warn('[patch] Could not find target string in head.ts — Starlight may have been updated.'); + process.exit(0); + } + + src = src.replace(target, replacement); + writeFileSync(file, src, 'utf8'); + console.log('[patch] Patched head.ts: data.head ?? []'); +} catch (err) { + console.warn('[patch] Could not patch head.ts:', err.message); +} diff --git a/docs/public/favicon.svg b/docs/public/favicon.svg new file mode 100644 index 0000000..f93f515 --- /dev/null +++ b/docs/public/favicon.svg @@ -0,0 +1,4 @@ + + + + diff --git a/docs/src/content.config.ts b/docs/src/content.config.ts new file mode 100644 index 0000000..6a7b7a0 --- /dev/null +++ b/docs/src/content.config.ts @@ -0,0 +1,7 @@ +import { defineCollection } from 'astro:content'; +import { docsLoader } from '@astrojs/starlight/loaders'; +import { docsSchema } from '@astrojs/starlight/schema'; + +export const collections = { + docs: defineCollection({ loader: docsLoader(), schema: docsSchema() }), +}; diff --git a/docs/src/content/docs/concepts/ltspice-on-linux.mdx b/docs/src/content/docs/concepts/ltspice-on-linux.mdx new file mode 100644 index 0000000..73c4175 --- /dev/null +++ b/docs/src/content/docs/concepts/ltspice-on-linux.mdx @@ -0,0 +1,92 @@ +--- +title: LTspice on Linux +description: How mcltspice drives a Windows application via Wine. +--- + +import { Aside } from '@astrojs/starlight/components'; + +LTspice is a Windows application. There is no official Linux build. mcltspice solves this by running LTspice through Wine in headless batch mode --- no GUI, no display server, no X11 forwarding required. This page explains the key pieces of the stack and how they fit together. + +## Wine and batch mode + +Wine is a compatibility layer that runs Windows executables on Linux. mcltspice invokes LTspice through Wine with the `-b` (batch) flag: + +```bash +wine XVIIx64.exe -b circuit.cir +``` + +The `-b` flag tells LTspice to run the simulation, write the results to a `.raw` file, and exit. No GUI window is created. This works in headless environments --- SSH sessions, containers, CI pipelines --- anywhere you can run a shell command. + + + +## The WINEPREFIX + +Every Wine installation operates within a "prefix" --- a directory that acts as a virtual Windows filesystem. It contains the registry, drive letter mappings (the `C:\` drive), and any DLLs the application needs. + +mcltspice auto-detects the Wine prefix from the `LTSPICE_DIR` path. If your LTspice files are at `/home/user/ltspice/extracted/ltspice`, the prefix is expected at `/home/user/ltspice/extracted/ltspice/.wine`. + +You create the prefix once during setup: + +```bash +export WINEPREFIX=/path/to/ltspice/.wine +export WINEARCH=win64 +wineboot --init +``` + +After that, mcltspice sets `WINEPREFIX` automatically before each simulation run. You do not need to manage it. + + + +## Binary .raw files + +LTspice writes simulation results to binary `.raw` files. These are not human-readable --- they use a compact binary format specific to LTspice. + +mcltspice's `raw_parser` module reads these files by parsing: + +1. **The header** --- plain text at the top of the file containing the title, simulation type, variable names, variable types (voltage, current, frequency), and the total number of data points. +2. **The binary data block** --- IEEE 754 double-precision floats packed contiguously after the header. The parser reads the correct number of bytes based on the variable count and point count from the header. + +For AC analysis, each data point is a complex number (real + imaginary parts stored as two consecutive doubles). The parser converts these to magnitude and phase automatically when you call `get_waveform`. + +For transient analysis, values are real-valued doubles. The independent variable (time) may use a compressed encoding where LTspice only stores points where the waveform changes significantly, but the parser handles this transparently. + + + +## Simulation types + +LTspice supports several simulation types, each producing different data in the `.raw` file: + +- **.tran** (transient) --- Time-domain simulation. The independent variable is time; dependent variables are instantaneous voltages and currents. Used for oscillators, step response, switching converters. + +- **.ac** (AC analysis) --- Small-signal frequency response. The independent variable is frequency; dependent variables are complex-valued (magnitude and phase). Used for filter design, amplifier bandwidth, stability analysis. + +- **.dc** (DC sweep) --- Sweeps a source value and records the DC operating point at each step. Used for transfer characteristics and I-V curves. + +- **.op** (operating point) --- A single DC bias calculation with no sweep. Returns one set of node voltages and branch currents. Used to verify quiescent conditions. + +- **.tf** (transfer function) --- Computes small-signal gain, input impedance, and output impedance at DC. Returns scalar values, not waveforms. + +- **.noise** (noise analysis) --- Computes noise spectral density at each frequency point. The independent variable is frequency; dependent variables are noise voltage or current densities (V/sqrt(Hz) or A/sqrt(Hz)). + +See [Simulation Types](/concepts/simulation-types/) for detailed coverage of each type, including directive syntax and which mcltspice tools work with each one. + +## Performance + +Typical simulation times: + +| Circuit complexity | Simulation type | Approximate time | +|---|---|---| +| Simple RC filter | .ac (800 points) | 0.1 -- 0.5 seconds | +| Op-amp circuit (10 components) | .tran (1ms) | 0.5 -- 2 seconds | +| Switching converter | .tran (10ms, 100k steps) | 2 -- 5 seconds | +| Monte Carlo (100 runs) | .tran or .ac | 10 -- 60 seconds | + +Wine overhead is minimal for batch mode. LTspice launches, runs the solver, writes the `.raw` file, and exits. The startup cost is roughly 50-100ms per invocation. For Monte Carlo or parameter sweeps, mcltspice runs LTspice once with stepped parameters rather than launching it repeatedly, which eliminates the startup overhead for multi-run analyses. + +The main bottleneck is always the SPICE solver itself --- the matrix factorization and Newton-Raphson iterations that compute circuit behavior at each time step or frequency point. diff --git a/docs/src/content/docs/concepts/simulation-types.mdx b/docs/src/content/docs/concepts/simulation-types.mdx new file mode 100644 index 0000000..40c7cff --- /dev/null +++ b/docs/src/content/docs/concepts/simulation-types.mdx @@ -0,0 +1,244 @@ +--- +title: Simulation Types +description: When to use .tran, .ac, .dc, .op, .noise, and .tf analyses. +--- + +import { Aside, Code } from '@astrojs/starlight/components'; + +LTspice supports six simulation types. Each one solves a different question about your circuit --- time-domain behavior, frequency response, DC characteristics, bias conditions, noise performance, or small-signal transfer function. This page covers what each type computes, its SPICE directive syntax, when to reach for it, and which mcltspice tools process its output. + +## Summary + + + + + + + + + + + + + +
TypeDirectiveIndependent variablePrimary mcltspice tools
.tran.tran 0 10m 0 1uTimeget_waveform, analyze_waveform, analyze_power
.ac.ac dec 100 1 1megFrequencyget_waveform, measure_bandwidth, analyze_stability
.dc.dc V1 0 5 0.1Swept source valueget_waveform
.op.opNone (single point)get_operating_point
.tf.tf V(out) V1None (single point)get_transfer_function
.noise.noise V(out) V1 dec 100 1 1megFrequencyanalyze_noise, get_spot_noise, get_total_noise
+ +--- + +## .tran --- Transient analysis + +**What it computes:** The circuit's behavior over time, solving the full nonlinear differential equations at each time step. Voltages and currents are recorded as functions of time. + +**Directive syntax:** + +``` +.tran [Tstart] [Tmaxstep] [options] +``` + +- `Tstep` -- Suggested output time step (LTspice may use smaller internal steps) +- `Tstop` -- End time of the simulation +- `Tstart` -- When to start saving data (default: 0) +- `Tmaxstep` -- Maximum internal time step (controls accuracy) + +**Examples:** + +``` +.tran 10m ; Run for 10ms, auto timestep +.tran 0 10m 0 1u ; 10ms, max 1us steps +.tran 0 1 0 10u startup ; 1 second, include startup transients +``` + +**When to use it:** +- Oscillator startup and steady-state waveforms +- Step response and settling time +- Switching converter operation (duty cycle, ripple) +- Any circuit where time-domain behavior matters + +**mcltspice tools for .tran data:** +- `get_waveform` -- Extract voltage/current traces vs. time +- `analyze_waveform` -- Compute RMS, peak-to-peak, rise time, settling time, FFT, THD +- `analyze_power` -- Power dissipation and efficiency from V(t) and I(t) products +- `plot_waveform` -- Generate time-domain SVG plots + + + +--- + +## .ac --- AC analysis + +**What it computes:** The small-signal frequency response. LTspice linearizes the circuit around its DC operating point, then sweeps frequency and computes the complex transfer function. Results are complex-valued: magnitude and phase at each frequency point. + +**Directive syntax:** + +``` +.ac +``` + +- `variation` -- `dec` (points per decade), `oct` (per octave), or `lin` (linear) +- `Npoints` -- Number of points per decade/octave, or total for linear +- `Fstart` -- Starting frequency (Hz) +- `Fstop` -- Ending frequency (Hz) + +**Examples:** + +``` +.ac dec 100 1 1meg ; 100 pts/decade, 1 Hz to 1 MHz +.ac dec 50 10 10G ; 50 pts/decade, 10 Hz to 10 GHz +.ac lin 1000 1k 100k ; 1000 linear points, 1 kHz to 100 kHz +``` + +**When to use it:** +- Filter design (frequency response, cutoff, rolloff) +- Amplifier bandwidth and gain +- Stability analysis (loop gain, gain and phase margins) +- Impedance vs. frequency + +**mcltspice tools for .ac data:** +- `get_waveform` -- Returns magnitude (dB) and phase (degrees) vs. frequency +- `measure_bandwidth` -- Finds the -3dB cutoff frequency +- `analyze_stability` -- Computes gain margin and phase margin from loop gain +- `plot_waveform` -- Generates Bode plots (magnitude + phase) + + + +--- + +## .dc --- DC sweep + +**What it computes:** The DC operating point of the circuit at each value of a swept source. The independent variable is the source value (voltage or current), and the dependent variables are node voltages and branch currents at each sweep step. + +**Directive syntax:** + +``` +.dc [Source2 Start2 Stop2 Step2] +``` + +A second source can be swept as a nested loop for 2D parameter exploration. + +**Examples:** + +``` +.dc V1 0 5 0.1 ; Sweep V1 from 0 to 5V in 0.1V steps +.dc I1 0 10m 100u ; Sweep I1 from 0 to 10mA in 100uA steps +.dc V1 0 5 0.1 V2 0 3 1 ; 2D sweep: V1 and V2 +``` + +**When to use it:** +- Transfer characteristics (Vout vs. Vin) +- I-V curves of transistors and diodes +- Voltage regulator load/line regulation +- Finding threshold voltages + +**mcltspice tools for .dc data:** +- `get_waveform` -- Extract output voltage/current vs. swept source value + +--- + +## .op --- Operating point + +**What it computes:** A single DC operating point. LTspice solves the circuit with all capacitors open and all inductors shorted, finding the steady-state DC voltages and currents. No sweep, no time variation --- just one set of numbers. + +**Directive syntax:** + +``` +.op +``` + +No parameters. The result is a single snapshot of every node voltage and branch current. + +**When to use it:** +- Verifying bias conditions before running .ac or .tran +- Checking quiescent power dissipation +- Debugging: confirming that DC voltages are where you expect + +**mcltspice tools for .op data:** +- `get_operating_point` -- Returns all node voltages and branch currents as a flat dictionary + + + +--- + +## .tf --- Transfer function + +**What it computes:** The small-signal DC transfer function: voltage gain (or transconductance), input resistance, and output resistance. This is a single-point linearization at DC --- no frequency sweep. + +**Directive syntax:** + +``` +.tf +``` + +- `output` -- An output voltage expression, e.g. `V(out)` or `V(out, in)` +- `input_source` -- The input source name, e.g. `V1` or `I1` + +**Examples:** + +``` +.tf V(out) V1 ; Voltage gain from V1 to V(out) +.tf I(R_load) V1 ; Transconductance +``` + +**When to use it:** +- Quick gain check without running a full AC sweep +- Input and output impedance measurement +- Verifying amplifier topology before detailed analysis + +**mcltspice tools for .tf data:** +- `get_transfer_function` -- Returns gain, input resistance, and output resistance + +--- + +## .noise --- Noise analysis + +**What it computes:** The noise spectral density at an output node, referred to an input source. LTspice computes the noise contribution of every component (resistor thermal noise, transistor shot noise, 1/f noise) and sums them. The result is noise voltage (or current) spectral density in V/sqrt(Hz) at each frequency point. + +**Directive syntax:** + +``` +.noise V() +``` + +The frequency sweep parameters follow the same format as `.ac`. + +**Examples:** + +``` +.noise V(out) V1 dec 100 1 1meg ; Noise at V(out), referred to V1 +.noise V(out,inn) V1 dec 50 10 100k ; Differential output noise +``` + +**When to use it:** +- Amplifier noise floor characterization +- Noise figure calculation +- Identifying dominant noise sources (1/f corner frequency) +- Signal-to-noise ratio estimation + +**mcltspice tools for .noise data:** +- `analyze_noise` -- Full noise analysis: spectral density, RMS, noise figure, 1/f corner, per-component breakdown +- `get_spot_noise` -- Noise spectral density at a single frequency +- `get_total_noise` -- Integrated RMS noise over a frequency band + + + +--- + +## Choosing the right analysis + +A practical decision tree: + +- **"What does the output look like over time?"** --- Use `.tran` +- **"What is the frequency response?"** --- Use `.ac` +- **"How does the output change as I vary an input?"** --- Use `.dc` +- **"Are the DC bias voltages correct?"** --- Use `.op` +- **"What is the gain and impedance at DC?"** --- Use `.tf` +- **"What is the noise floor?"** --- Use `.noise` + +For a thorough characterization, run them in this order: `.op` first (verify bias), then `.tf` (quick gain check), then `.ac` (full frequency response), then `.tran` (time-domain behavior), and `.noise` if noise matters. Each analysis builds confidence that the circuit is behaving correctly before moving to the next. diff --git a/docs/src/content/docs/getting-started/claude-code.mdx b/docs/src/content/docs/getting-started/claude-code.mdx new file mode 100644 index 0000000..a60b920 --- /dev/null +++ b/docs/src/content/docs/getting-started/claude-code.mdx @@ -0,0 +1,102 @@ +--- +title: Claude Code Setup +description: Add mcltspice to Claude Code or other MCP clients. +--- + +import { Tabs, TabItem, Aside, Code } from '@astrojs/starlight/components'; + +mcltspice communicates over standard MCP stdio transport. The examples below show the three main ways to configure it. + +## Add to Claude Code + + + + The quickest option. This pulls the latest published version from PyPI and runs it with `uvx`: + + ```bash + claude mcp add mcltspice -- uvx mcltspice + ``` + + If you need to pin a specific version: + + ```bash + claude mcp add mcltspice -- uvx mcltspice==2026.2.10 + ``` + + + For working on mcltspice itself, point at your local checkout: + + ```bash + claude mcp add mcltspice -- uv run --directory /path/to/mcltspice mcltspice + ``` + + This uses `uv run` to resolve dependencies from the local `pyproject.toml` and run the entry point. Changes to the source take effect on the next server restart. + + + Create or edit `.mcp.json` in your project root (or `~/.mcp.json` for global scope): + + ```json + { + "mcpServers": { + "mcltspice": { + "command": "uvx", + "args": ["mcltspice"], + "env": { + "LTSPICE_DIR": "/home/you/ltspice/extracted/ltspice" + } + } + } + } + ``` + + The `env` block is optional. Include it only if your LTspice files are not at the default path. + + For local development, swap the command: + + ```json + { + "mcpServers": { + "mcltspice": { + "command": "uv", + "args": ["run", "--directory", "/path/to/mcltspice", "mcltspice"] + } + } + } + ``` + + + +## Other MCP clients + +Any MCP client that supports stdio transport can use mcltspice. The generic configuration is: + +| Field | Value | +|-------|-------| +| **Transport** | stdio | +| **Command** | `uvx` | +| **Arguments** | `["mcltspice"]` | +| **Environment** | `LTSPICE_DIR` (optional) | + +The server reads from stdin and writes to stdout using JSON-RPC over the MCP protocol. No HTTP server, no ports to configure. + + + +## Passing environment variables + +If your LTspice installation is not at the default path, set `LTSPICE_DIR` in whichever way your client supports: + +- **Claude Code CLI**: Pass it through the `env` field in `.mcp.json` (shown above). +- **Shell**: `export LTSPICE_DIR=/path/to/ltspice` before launching the client. +- **Docker**: Add `-e LTSPICE_DIR=/path/to/ltspice` to your `docker run` command. + +## Verify the connection + +After adding the server, ask your MCP client to call the `check_installation` tool: + +``` +check_installation() +``` + +If the server is connected and LTspice is found, you will get a status report confirming the Wine version, LTspice binary path, and library availability. If anything is missing, see [Prerequisites](/getting-started/prerequisites/). diff --git a/docs/src/content/docs/getting-started/first-simulation.mdx b/docs/src/content/docs/getting-started/first-simulation.mdx new file mode 100644 index 0000000..e838add --- /dev/null +++ b/docs/src/content/docs/getting-started/first-simulation.mdx @@ -0,0 +1,141 @@ +--- +title: First Simulation +description: Run an end-to-end circuit simulation in under a minute. +--- + +import { Steps, Aside } from '@astrojs/starlight/components'; + +This walkthrough takes you from zero to a plotted frequency response using five tool calls. We will create an RC low-pass filter from a built-in template, simulate it, extract the output waveform, measure the bandwidth, and generate a plot. + + + + + +1. **Create a circuit from a template** + + The `create_from_template` tool generates a ready-to-simulate netlist from one of the built-in circuit templates. + + ``` + create_from_template("rc_lowpass") + ``` + + This writes an RC low-pass filter netlist to `/tmp/rc_lowpass.cir` with default component values (R=1k, C=100n) and an AC analysis directive. + + ```json + // Response + { + "netlist_path": "/tmp/rc_lowpass.cir", + "template": "rc_lowpass", + "parameters": { "R1": "1k", "C1": "100n" }, + "description": "RC low-pass filter, fc ~ 1.59 kHz" + } + ``` + +2. **Run the simulation** + + Pass the netlist to `simulate_netlist`. LTspice runs via Wine in batch mode and produces a binary `.raw` file with the results. + + ``` + simulate_netlist("/tmp/rc_lowpass.cir") + ``` + + ```json + // Response + { + "raw_file": "/tmp/rc_lowpass.raw", + "log_file": "/tmp/rc_lowpass.log", + "simulation_type": "AC Analysis", + "variables": ["frequency", "V(out)", "V(in)", "I(R1)"], + "points": 801, + "elapsed_seconds": 0.42 + } + ``` + +3. **Extract the output waveform** + + Use `get_waveform` to pull signal data out of the `.raw` file. For AC analysis, this returns complex-valued data (magnitude and phase at each frequency point). + + ``` + get_waveform("/tmp/rc_lowpass.raw", ["V(out)"]) + ``` + + ```json + // Response (truncated) + { + "variables": { + "frequency": [1.0, 1.26, 1.58, "...801 points..."], + "V(out)": { + "magnitude": [1.0, 0.9999, 0.9998, "..."], + "phase_deg": [-0.036, -0.045, -0.057, "..."] + } + }, + "simulation_type": "AC Analysis", + "num_points": 801 + } + ``` + +4. **Measure the bandwidth** + + The `measure_bandwidth` tool finds the -3dB cutoff frequency from the AC analysis results. + + ``` + measure_bandwidth("/tmp/rc_lowpass.raw", "V(out)") + ``` + + ```json + // Response + { + "f_3dB_hz": 1591.5, + "dc_gain_dB": 0.0, + "gain_at_cutoff_dB": -3.01, + "signal": "V(out)" + } + ``` + + The measured cutoff of 1591.5 Hz matches the theoretical value of 1/(2 * pi * R * C) = 1/(2 * pi * 1000 * 100e-9) = 1592 Hz. + +5. **Plot the results** + + Generate an SVG plot of the frequency response with `plot_waveform`. + + ``` + plot_waveform("/tmp/rc_lowpass.raw", "V(out)") + ``` + + ```json + // Response + { + "svg_path": "/tmp/rc_lowpass_V(out).svg", + "plot_type": "bode", + "signals": ["V(out)"], + "format": "SVG" + } + ``` + + The SVG contains a Bode plot with magnitude and phase traces --- suitable for embedding in reports or viewing in a browser. + + + +## What just happened + +In five tool calls, you: + +- Generated a complete SPICE netlist from a template +- Ran an AC analysis through LTspice (via Wine, in batch mode, with no GUI) +- Extracted complex-valued frequency-domain data from the binary `.raw` file +- Measured the -3dB bandwidth automatically +- Produced a publication-ready Bode plot + +All of this happened without writing a single line of SPICE, opening a GUI, or parsing binary files manually. + +## Next steps + +Try modifying the circuit. You can change component values with the template parameters: + +``` +create_from_template("rc_lowpass", parameters={"R1": "10k", "C1": "10n"}) +``` + +This shifts the cutoff frequency to ~1.59 kHz (same frequency, different impedance) --- or pick entirely different values to explore the design space. See the [tool reference](/reference/) for the full list of available operations. diff --git a/docs/src/content/docs/getting-started/index.mdx b/docs/src/content/docs/getting-started/index.mdx new file mode 100644 index 0000000..fea7ab2 --- /dev/null +++ b/docs/src/content/docs/getting-started/index.mdx @@ -0,0 +1,69 @@ +--- +title: Getting Started +description: Install mcltspice and run your first circuit simulation. +--- + +import { Steps, Card, CardGrid, LinkCard } from '@astrojs/starlight/components'; + +mcltspice is an MCP server that drives LTspice on Linux via Wine. It exposes 37 tools for circuit simulation, waveform extraction, signal analysis, and design automation --- all accessible from Claude Code or any MCP client. + +## Setup at a glance + + + +1. **Install prerequisites** + + You need Wine and an extracted copy of LTspice. Wine runs the LTspice binary in batch mode; no GUI required. + + [Prerequisites details](/getting-started/prerequisites/) + +2. **Install mcltspice** + + ```bash + uvx mcltspice + ``` + + Or install from source with `uv pip install -e .` for development. + +3. **Add to your MCP client** + + ```bash + claude mcp add mcltspice -- uvx mcltspice + ``` + + Works with Claude Code out of the box. Other MCP clients use standard stdio transport. + + [Claude Code setup details](/getting-started/claude-code/) + +4. **Run your first simulation** + + Create a circuit from a template, simulate it, and extract waveforms --- all through tool calls. + + [First simulation walkthrough](/getting-started/first-simulation/) + + + +## What you can do + +Once installed, mcltspice gives your MCP client the ability to: + + + + Run `.asc` schematics and `.cir` netlists through LTspice. Sweep parameters, vary temperature, run Monte Carlo. + + + Extract waveforms, measure bandwidth, compute FFT and THD, analyze noise, check stability margins. + + + Read and modify schematics, build netlists from scratch, generate circuits from templates, run design rule checks. + + + Search 6500+ component symbols, 4000+ example circuits, and SPICE model/subcircuit definitions. + + + +## Next steps + + + + diff --git a/docs/src/content/docs/getting-started/prerequisites.mdx b/docs/src/content/docs/getting-started/prerequisites.mdx new file mode 100644 index 0000000..e954e3b --- /dev/null +++ b/docs/src/content/docs/getting-started/prerequisites.mdx @@ -0,0 +1,109 @@ +--- +title: Prerequisites +description: Set up LTspice and Wine on Linux. +--- + +import { Steps, Tabs, TabItem, Aside, Code } from '@astrojs/starlight/components'; + +mcltspice drives LTspice through Wine in headless batch mode. You need two things: a working Wine installation and the LTspice application files extracted from the Windows installer. + +## Install Wine + + + + ```bash + sudo pacman -S wine + ``` + + + ```bash + sudo dpkg --add-architecture i386 + sudo apt update + sudo apt install wine64 + ``` + + + ```bash + sudo dnf install wine + ``` + + + +Verify the installation: + +```bash +wine --version +``` + + + +## Extract LTspice + +LTspice is distributed as a Windows `.msi` installer. Rather than running it through Wine's installer, extract the files directly with `7z`. + + + +1. **Download LTspice** + + Get `LTspice64.msi` from [analog.com/ltspice](https://www.analog.com/en/resources/design-tools-and-calculators/ltspice-simulator-software.html). + +2. **Extract the MSI** + + ```bash + 7z x LTspice64.msi -oltspice + cd ltspice + 7z x disk1.cab + ``` + +3. **Initialize a Wine prefix** + + ```bash + export WINEPREFIX=$PWD/.wine + export WINEARCH=win64 + wineboot --init + ``` + + This creates a minimal Wine prefix in the same directory. LTspice does not need a full Windows environment --- the prefix just provides the runtime. + + + + + +## Set the LTspice directory + +mcltspice looks for LTspice in this order: + +1. The `LTSPICE_DIR` environment variable +2. The default path: `~/claude/ltspice/extracted/ltspice` + +If your extracted files are elsewhere, set the environment variable: + +```bash +export LTSPICE_DIR=/path/to/your/extracted/ltspice +``` + +For persistent configuration, add it to your shell profile (`~/.bashrc`, `~/.zshrc`, etc.) or pass it through your MCP client configuration. + + + +## Verify the setup + +Once Wine and LTspice are in place, use the `check_installation` tool to confirm everything is working: + +``` +check_installation() +``` + +This checks for: +- Wine availability and version +- LTspice binary presence +- Library and symbol directories +- Write permissions for output files + +If any check fails, the tool reports exactly what is missing and how to fix it. diff --git a/docs/src/content/docs/index.mdx b/docs/src/content/docs/index.mdx new file mode 100644 index 0000000..981b9fa --- /dev/null +++ b/docs/src/content/docs/index.mdx @@ -0,0 +1,63 @@ +--- +title: mcltspice +description: Drive LTspice from any MCP client. 37 tools for circuit simulation, analysis, and design automation. +template: splash +hero: + tagline: Drive LTspice from any MCP client. 37 tools for circuit simulation, analysis, and design automation. + actions: + - text: Get Started + link: /getting-started/ + icon: right-arrow + - text: Tool Reference + link: /reference/ + variant: minimal +--- + +import { Card, CardGrid } from '@astrojs/starlight/components'; + +## Documentation + + + + Install mcltspice and run your first simulation in under a minute. + [Start here](/getting-started/) + + + Step-by-step circuit design walkthroughs, from filters to Monte Carlo yield analysis. + [Browse tutorials](/tutorials/) + + + Task-specific walkthroughs --- filter design, Monte Carlo yield, parameter sweeps. + [Browse tutorials](/tutorials/) + + + Every tool, resource, and prompt documented with parameters, types, and examples. + [Full reference](/reference/) + + + +## What's inside + + + + 7 tools --- run schematics and netlists, sweep parameters, Monte Carlo analysis, optimization, and tuning. + + + 5 tools --- extract signals from `.raw` files, evaluate expressions, export to CSV, and generate SVG plots. + + + 4 tools --- FFT, THD, bandwidth measurement, operating point extraction, and transfer functions. + + + 3 tools --- full noise analysis, spot noise at a frequency, and integrated RMS noise over a band. + + + 3 tools --- gain and phase margin, power dissipation metrics, and efficiency calculations. + + + 8 tools --- read, edit, diff, and DRC schematics. Build netlists, generate from templates, parse Touchstone files. + + + 7 tools --- browse 6500+ symbols, 4000+ examples, search SPICE models and subcircuits, verify installation. + + diff --git a/docs/src/content/docs/reference/index.mdx b/docs/src/content/docs/reference/index.mdx new file mode 100644 index 0000000..33ddf48 --- /dev/null +++ b/docs/src/content/docs/reference/index.mdx @@ -0,0 +1,66 @@ +--- +title: Reference +description: Complete reference for all mcltspice tools, resources, and prompts. +--- + +import { LinkCard } from '@astrojs/starlight/components'; + +mcltspice exposes 37 tools, 5 resources, and 7 prompts. This section documents every one of them with parameter types, defaults, return values, and usage notes. + +## Tools by category + + + + + + + + + + + + + + + +## Resources and prompts + + + + diff --git a/docs/src/content/docs/reference/library-templates.mdx b/docs/src/content/docs/reference/library-templates.mdx new file mode 100644 index 0000000..240fcee --- /dev/null +++ b/docs/src/content/docs/reference/library-templates.mdx @@ -0,0 +1,249 @@ +--- +title: Library and Template Tools +description: Browse components, search models, and use circuit templates. +--- + +import { Aside } from '@astrojs/starlight/components'; + +mcltspice ships 7 tools for browsing LTspice's component library, searching SPICE model and subcircuit definitions, managing circuit templates, and verifying your installation. These tools never modify anything on disk --- they are read-only queries against the LTspice library files. + + + +--- + +## list_templates + +List all available circuit templates with their parameters and default values. + + + + + + + + +
ParameterTypeDefaultDescription
No parameters.
+ +**Returns:** `dict` with `templates` (list of name, description, and params for each) and `total_count`. + +```json +// Example response +{ + "templates": [ + { + "name": "rc_lowpass", + "description": "RC low-pass filter, fc ~ 1.59 kHz", + "params": { "r": "1k", "c": "100n", "f_start": "1", "f_stop": "1meg" } + }, + { + "name": "voltage_divider", + "description": "Resistive voltage divider", + "params": { "v_in": "5", "r1": "10k", "r2": "10k", "sim_type": "dc" } + } + ], + "total_count": 15 +} +``` + +--- + +## list_symbols + +Browse LTspice's 6500+ component symbols. Filter by category or search by name. + + + + + + + + + + +
ParameterTypeDefaultDescription
categorystr | NoneNoneFilter by category folder (e.g. "Opamps", "Comparators", "Misc").
searchstr | NoneNoneCase-insensitive search term matched against symbol name.
limitint50Maximum number of results to return.
+ +**Returns:** `dict` with `symbols` (list of name, category, path), `total_count`, and `returned_count`. + +```json +// Example response (search='LT1') +{ + "symbols": [ + { "name": "LT1001", "category": "Opamps", "path": "/home/user/ltspice/lib/sym/Opamps/LT1001.asy" }, + { "name": "LT1006", "category": "Opamps", "path": "/home/user/ltspice/lib/sym/Opamps/LT1006.asy" }, + { "name": "LT1010", "category": "Misc", "path": "/home/user/ltspice/lib/sym/Misc/LT1010.asy" } + ], + "total_count": 342, + "returned_count": 50 +} +``` + +--- + +## list_examples + +Browse 4000+ example circuits from the LTspice installation. Filter by category folder or search by name. + + + + + + + + + + +
ParameterTypeDefaultDescription
categorystr | NoneNoneFilter by category folder name.
searchstr | NoneNoneCase-insensitive search term matched against example name.
limitint50Maximum number of results to return.
+ +**Returns:** `dict` with `examples` (list of name, category, path), `total_count`, and `returned_count`. + +```json +// Example response (search='buck') +{ + "examples": [ + { "name": "Buck", "category": "Educational", "path": "/home/user/ltspice/examples/Educational/Buck.asc" }, + { "name": "LT3800_Buck", "category": "jigs", "path": "/home/user/ltspice/examples/jigs/LT3800_Buck.asc" } + ], + "total_count": 37, + "returned_count": 37 +} +``` + +--- + +## get_symbol_info + +Get pin names, attributes, and description from a `.asy` symbol file. + + + + + + + + +
ParameterTypeDefaultDescription
symbol_pathstrrequiredAbsolute path to a .asy symbol file.
+ +**Returns:** `dict` with `name`, `pins` (list of pin names), `attributes` (key-value pairs), `description`, `prefix`, and `spice_prefix`. + +```json +// Example response +{ + "name": "LT1001", + "pins": ["IN+", "IN-", "V+", "V-", "OUT"], + "attributes": { + "Prefix": "X", + "SpiceModel": "LT1001", + "Value": "LT1001" + }, + "description": "Low Offset, Low Drift Op Amp", + "prefix": "X", + "spice_prefix": "X" +} +``` + +--- + +## search_spice_models + +Search `.model` definitions in the LTspice library. These are discrete devices: transistors, diodes, JFETs. + + + + + + + + + + +
ParameterTypeDefaultDescription
searchstr | NoneNoneCase-insensitive search term for model name.
model_typestr | NoneNoneFilter by type: NPN, PNP, NMOS, PMOS, D, NJF, PJF.
limitint50Maximum number of results.
+ +**Returns:** `dict` with `models` (list of name, type, source_file, parameters) and `total_count`. + +```json +// Example response (model_type='NPN', search='2N') +{ + "models": [ + { + "name": "2N2222", + "type": "NPN", + "source_file": "standard.bjt", + "parameters": "Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 ..." + } + ], + "total_count": 18 +} +``` + +--- + +## search_spice_subcircuits + +Search `.subckt` definitions in the library. These are complex components like op-amps, voltage regulators, and other ICs. + + + + + + + + + +
ParameterTypeDefaultDescription
searchstr | NoneNoneCase-insensitive search term for subcircuit name.
limitint50Maximum number of results.
+ +**Returns:** `dict` with `subcircuits` (list of name, pins, pin_names, description, source_file, n_components) and `total_count`. + +```json +// Example response (search='LT1') +{ + "subcircuits": [ + { + "name": "LT1001", + "pins": 5, + "pin_names": ["1", "2", "3", "4", "5"], + "description": "Low Offset, Low Drift Op Amp", + "source_file": "LT1001.sub", + "n_components": 42 + } + ], + "total_count": 156 +} +``` + +--- + +## check_installation + +Verify that LTspice and Wine are properly installed and accessible. + + + + + + + + +
ParameterTypeDefaultDescription
No parameters.
+ +**Returns:** `dict` with `valid` (boolean), `message`, `paths` (ltspice_dir, ltspice_exe, wine_prefix, lib_dir, examples_dir), `lib_exists`, and `examples_exist`. + +```json +// Example response (healthy installation) +{ + "valid": true, + "message": "LTspice installation OK", + "paths": { + "ltspice_dir": "/home/user/ltspice/extracted/ltspice", + "ltspice_exe": "/home/user/ltspice/extracted/ltspice/XVIIx64.exe", + "wine_prefix": "/home/user/ltspice/extracted/ltspice/.wine", + "lib_dir": "/home/user/ltspice/extracted/ltspice/lib", + "examples_dir": "/home/user/ltspice/extracted/ltspice/examples" + }, + "lib_exists": true, + "examples_exist": true +} +``` + +If `valid` is `false`, the `message` field explains what is missing and how to fix it. See [Prerequisites](/getting-started/prerequisites/) for setup instructions. diff --git a/docs/src/content/docs/reference/noise.mdx b/docs/src/content/docs/reference/noise.mdx new file mode 100644 index 0000000..62003c0 --- /dev/null +++ b/docs/src/content/docs/reference/noise.mdx @@ -0,0 +1,137 @@ +--- +title: Noise Analysis Tools +description: Spectral density, spot noise, and integrated RMS noise. +--- + +import { Tabs, TabItem, Aside, Code } from '@astrojs/starlight/components'; + +These tools analyze output from LTspice `.noise` simulations. Run a noise simulation first with a directive like `.noise V(out) V1 dec 100 1 1meg`, then pass the resulting `.raw` file to any of the tools below. + + + +--- + +### analyze_noise + +Comprehensive noise analysis from a `.noise` simulation. Parses the `.raw` file and returns spectral density across all simulated frequencies, spot noise at five standard frequencies (10 Hz, 100 Hz, 1 kHz, 10 kHz, 100 kHz), total integrated RMS noise over the full bandwidth, noise figure relative to the source resistance, and an estimate of the 1/f (flicker) corner frequency. + +The noise figure calculation uses the formula NF(f) = 10 log10(|noise(f)|^2 / (4 k T R)), referenced to the IEEE standard temperature of 290 K. + + + + + + + + +
ParameterTypeDefaultDescription
raw_file_path`str`---Path to `.raw` file from a `.noise` simulation.
noise_signal`str``"onoise"`Which noise variable to analyze. `"onoise"` for output-referred, `"inoise"` for input-referred.
source_resistance`float``50.0`Source impedance in ohms, used for noise figure calculation.
+ +**Returns:** A dict with five top-level keys: + +- `spectral_density` -- arrays of `frequency_hz`, `noise_density_v_per_sqrt_hz`, and `noise_density_db`. +- `spot_noise` -- a dict keyed by frequency label (`"10Hz"`, `"100Hz"`, `"1kHz"`, `"10kHz"`, `"100kHz"`), each containing `spot_noise_v_per_sqrt_hz`, `spot_noise_db`, and `actual_freq_hz`. Only includes frequencies within the simulation range. +- `total_noise` -- `total_rms_v`, `integration_range_hz` (two-element array), and `equivalent_noise_bandwidth_hz`. +- `noise_figure` -- arrays of `noise_figure_db` and `frequency_hz`, plus `min_nf_db` and `nf_at_1khz`. +- `flicker_corner_hz` -- estimated 1/f corner frequency in Hz, or `null` if not detectable. + +
+Example + +```json +{ + "spectral_density": { + "frequency_hz": [1.0, 1.26, 1.58, "..."], + "noise_density_v_per_sqrt_hz": [4.2e-7, 3.9e-7, 3.5e-7, "..."], + "noise_density_db": [-127.5, -128.2, -129.1, "..."] + }, + "spot_noise": { + "10Hz": { + "spot_noise_v_per_sqrt_hz": 3.1e-7, + "spot_noise_db": -130.2, + "actual_freq_hz": 10.0 + }, + "1kHz": { + "spot_noise_v_per_sqrt_hz": 1.2e-7, + "spot_noise_db": -138.4, + "actual_freq_hz": 1000.0 + } + }, + "total_noise": { + "total_rms_v": 4.7e-5, + "integration_range_hz": [1.0, 1000000.0], + "equivalent_noise_bandwidth_hz": 156000.0 + }, + "noise_figure": { + "noise_figure_db": [12.3, 11.8, "..."], + "frequency_hz": [1.0, 1.26, "..."], + "min_nf_db": 3.2, + "nf_at_1khz": 5.1 + }, + "flicker_corner_hz": 850.0 +} +``` + +
+ +--- + +### get_spot_noise + +Get noise spectral density at a specific frequency. Interpolates linearly between adjacent simulation data points. If the target frequency falls outside the simulated range, the nearest boundary value is returned. + + + + + + + + +
ParameterTypeDefaultDescription
raw_file_path`str`---Path to `.raw` file from a `.noise` simulation.
target_freq`float`---Frequency in Hz at which to measure noise density.
noise_signal`str``"onoise"``"onoise"` for output-referred or `"inoise"` for input-referred.
+ +**Returns:** A dict with `spot_noise_v_per_sqrt_hz` (noise density in V/sqrt(Hz)), `spot_noise_db` (20 log10 of the density), and `actual_freq_hz` (the frequency actually used --- equals `target_freq` when interpolation succeeds, or the clamped boundary frequency otherwise). + +
+Example + +```json +{ + "spot_noise_v_per_sqrt_hz": 1.2e-7, + "spot_noise_db": -138.4, + "actual_freq_hz": 1000.0 +} +``` + +
+ +--- + +### get_total_noise + +Integrate noise spectral density over a frequency band to get total RMS noise. Computes `total_rms = sqrt(integral(|noise|^2 * df))` using trapezoidal integration. This is the value you would read on an RMS voltmeter with a bandwidth equal to the integration range. + + + + + + + + + +
ParameterTypeDefaultDescription
raw_file_path`str`---Path to `.raw` file from a `.noise` simulation.
noise_signal`str``"onoise"``"onoise"` or `"inoise"`.
f_low`float | None``None`Lower integration bound in Hz. Defaults to the minimum frequency in the simulation data.
f_high`float | None``None`Upper integration bound in Hz. Defaults to the maximum frequency in the simulation data.
+ +**Returns:** A dict with `total_rms_v` (integrated RMS noise in volts), `integration_range_hz` (two-element array `[f_low, f_high]`), and `equivalent_noise_bandwidth_hz` (the bandwidth of a brick-wall filter with the same peak density that would pass the same total noise power). + +
+Example + +```json +{ + "total_rms_v": 4.7e-5, + "integration_range_hz": [100.0, 100000.0], + "equivalent_noise_bandwidth_hz": 42000.0 +} +``` + +
diff --git a/docs/src/content/docs/reference/prompts.mdx b/docs/src/content/docs/reference/prompts.mdx new file mode 100644 index 0000000..cb99c13 --- /dev/null +++ b/docs/src/content/docs/reference/prompts.mdx @@ -0,0 +1,227 @@ +--- +title: MCP Prompts +description: Guided workflows for common circuit design tasks. +--- + +import { Aside, Code } from '@astrojs/starlight/components'; + +MCP prompts are conversation starters. Each prompt generates an initial message that guides the LLM through a multi-step workflow, telling it which tools to call and in what order. Think of them as runbooks --- they encode best practices so the LLM does not have to figure out the workflow from scratch. + +mcltspice provides 7 prompts covering filter design, power supply analysis, debugging, optimization, Monte Carlo yield analysis, building circuits from descriptions, and troubleshooting simulation failures. + + + +--- + +## design_filter + +Walks through designing a filter circuit: selecting a topology, creating the netlist, simulating with AC analysis, measuring bandwidth, and iterating on component values. + + + + + + + + + + +
ParameterTypeDefaultDescription
filter_typestr"lowpass"Filter response: lowpass, highpass, bandpass, or notch.
topologystr"rc"Circuit topology: rc (1st order), rlc (2nd order), or sallen-key (active).
cutoff_freqstr"1kHz"Target cutoff frequency with units.
+ +**Workflow steps:** + +1. Use `create_netlist` to build the filter circuit +2. Add `.ac` analysis directive for a frequency sweep +3. Add `.meas` directive for -3dB bandwidth +4. Simulate with `simulate_netlist` +5. Use `measure_bandwidth` to verify the cutoff frequency +6. Use `get_waveform` to inspect the full frequency response +7. Adjust component values and re-simulate if needed + +**Design tips included in the prompt:** +- For RC lowpass: f_c = 1 / (2 * pi * R * C) +- For 2nd-order filters: Q controls peaking; Butterworth uses Q = 0.707 +- Use `search_spice_models` to find op-amp models for active topologies + +--- + +## analyze_power_supply + +Guides through measuring the key performance metrics of a power supply: regulation, ripple, transient response, and efficiency. + + + + + + + + +
ParameterTypeDefaultDescription
schematic_pathstr""Path to the power supply schematic. If empty, the prompt asks the LLM to identify or create one first.
+ +**Workflow steps:** + +1. Use `read_schematic` to understand the circuit topology +2. Use `run_drc` to check for design issues +3. Simulate with `.tran` analysis, including a load step if applicable +4. Use `analyze_waveform` to measure: + - Peak-to-peak output ripple + - Settling time after load transients + - FFT of the output to identify noise frequencies +5. If AC analysis is available, use `measure_bandwidth` for loop gain + +**Key metrics extracted:** output voltage regulation (DC accuracy), ripple voltage, load transient settling time, efficiency. + +--- + +## debug_circuit + +A systematic debugging workflow: validate the schematic, check models, run the simulation, inspect node voltages, and isolate problems by simplifying the circuit. + + + + + + + + +
ParameterTypeDefaultDescription
schematic_pathstr""Path to the problematic schematic. If empty, the prompt asks the LLM to identify it first.
+ +**Workflow steps:** + +1. **Validate** -- Run `run_drc` to catch missing ground, floating nodes, duplicate component names +2. **Check setup** -- Use `read_schematic` to review component values and connections +3. **Verify models** -- Use `search_spice_models` to confirm all referenced models exist +4. **Run and analyze** -- Simulate, then use `get_waveform` to inspect key node voltages and compare against expected values +5. **Isolate** -- Use `edit_component` to simplify (replace active devices with ideal sources), then `diff_schematics` to track which change fixed the issue + +**Common issues surfaced:** wrong node connections, missing bias voltages, component values off by orders of magnitude, model name mismatches. + +--- + +## optimize_design + +An iterative optimization workflow that uses `optimize_circuit` and Monte Carlo analysis to tune a circuit toward a target specification. + + + + + + + + + +
ParameterTypeDefaultDescription
circuit_typestr"filter"Type of circuit: filter, amplifier, regulator, oscillator.
target_specstr"1kHz bandwidth"Target specification to achieve.
+ +**Workflow steps:** + +1. Use `list_templates` to find a suitable starting point +2. Create the initial circuit with `create_from_template` +3. Simulate and measure current performance +4. Use `optimize_circuit` to automatically tune component values: + - Define target metrics (bandwidth, gain, settling time) + - Specify component ranges with preferred E-series values + - The optimizer iterates (typically 10-20 simulations) +5. Verify the optimized design with a full simulation +6. Run Monte Carlo with the `monte_carlo` tool to check yield under tolerances + +**Metric targets by circuit type:** +- Filters: `bandwidth_hz` +- Amplifiers: `gain_db` and `phase_margin_deg` +- Regulators: `settling_time` and `peak_to_peak` (ripple) + +--- + +## monte_carlo_analysis + +Walks through a statistical yield analysis: running many simulations with randomized component tolerances, extracting metrics from each run, and computing pass/fail statistics. + + + + + + + + + +
ParameterTypeDefaultDescription
circuit_descriptionstr"RC filter"Description of the circuit to analyze.
n_runsstr"100"Number of Monte Carlo iterations.
+ +**Workflow steps:** + +1. Create or identify the netlist +2. Use the `monte_carlo` tool with component tolerances: + - Resistors: 1% (0.01) or 5% (0.05) + - Capacitors: 10% (0.1) or 20% (0.2) + - Inductors: 10% (0.1) +3. For each run, extract key metrics using `get_waveform`, `analyze_waveform`, and `measure_bandwidth` +4. Compute statistics across all runs: mean, standard deviation, min/max, and yield percentage + +**Tips included in the prompt:** +- Use `list_simulation_runs` to understand stepped data +- Start with 10-20 runs to verify the setup, then scale up +- Set a seed for reproducible results during development +- Typical tolerances: metal film resistors 1%, ceramic caps 10-20%, electrolytics 20% + +--- + +## circuit_from_scratch + +Builds a complete circuit from a text description, offering three approaches: using a template, building from individual components, or generating a graphical schematic. + + + + + + + + +
ParameterTypeDefaultDescription
descriptionstr"audio amplifier"Plain-text description of what circuit to build.
+ +**Three approaches offered:** + +1. **Template** (recommended for common circuits) -- `list_templates` then `create_from_template` +2. **Component-level** -- `create_netlist` with `search_spice_models` and `search_spice_subcircuits` for model lookup +3. **Graphical schematic** -- `generate_schematic` to produce an `.asc` file that can also be opened in the LTspice GUI + +**Verification workflow:** + +1. `run_drc` to catch design issues +2. `.op` analysis to verify DC bias point +3. `.tf` analysis for gain and impedance +4. `.ac` analysis for frequency response +5. `.tran` analysis for time-domain behavior +6. `diff_schematics` to compare design iterations + +--- + +## troubleshoot_simulation + +A diagnostic checklist for simulation failures and convergence issues. Works through the problem systematically: DRC, installation check, model verification, directive inspection, node analysis, and progressive simplification. + + + + + + + + + +
ParameterTypeDefaultDescription
error_descriptionstr""What went wrong --- error message, unexpected results, etc. If empty, the prompt runs a full diagnostic.
schematic_pathstr""Path to the problematic schematic or netlist.
+ +**Diagnostic checklist (in order):** + +1. **Design Rule Check** -- `run_drc` for missing ground, floating nodes, duplicate names, missing simulation directive +2. **Installation** -- `check_installation` to verify Wine and LTspice +3. **Model availability** -- `search_spice_models` and `search_spice_subcircuits` to confirm all referenced models exist +4. **Simulation directive** -- `read_schematic` to inspect the directive; verify analysis type, stop time, frequency range +5. **Node connections** -- `read_schematic` to list all components and nets; check for disconnected nodes +6. **Run and inspect** -- Simulate, check the log file for convergence warnings, use `get_waveform` to inspect node voltages +7. **Simplify and isolate** -- `edit_component` to swap active devices for ideal ones; remove non-essential subcircuits; test each stage independently + +**Common failure modes addressed:** +- Convergence failure: reduce timestep, add initial conditions +- All-zeros output: check ground connections and source polarity +- Unexpected clipping: check supply voltages and headroom +- Oscillation in DC circuits: add small feedback capacitors +- Model not found: verify `.lib` / `.include` paths diff --git a/docs/src/content/docs/reference/resources.mdx b/docs/src/content/docs/reference/resources.mdx new file mode 100644 index 0000000..3b7765d --- /dev/null +++ b/docs/src/content/docs/reference/resources.mdx @@ -0,0 +1,153 @@ +--- +title: MCP Resources +description: Read-only data sources exposed via MCP resource URIs. +--- + +import { Aside } from '@astrojs/starlight/components'; + +MCP resources are read-only data sources that clients can attach to conversations for context. Unlike tools, resources are not invoked with parameters --- they are referenced by URI and return structured data. A client might attach `ltspice://status` at the start of a session so the LLM knows what is available without making a tool call. + +mcltspice exposes 5 resources. + + + +--- + +## ltspice://symbols + +All component symbols from the LTspice library, organized by category. This is equivalent to calling `list_symbols(limit=10000)`. + +```json +// Response structure +{ + "symbols": [ + { "name": "LT1001", "category": "Opamps", "path": "/home/user/ltspice/lib/sym/Opamps/LT1001.asy" }, + { "name": "1N4148", "category": "Misc", "path": "/home/user/ltspice/lib/sym/Misc/1N4148.asy" } + ], + "total_count": 6523, + "returned_count": 6523 +} +``` + +Use this when you need a complete inventory of available components. For targeted searches, the `list_symbols` tool with `category` or `search` parameters is more efficient. + +--- + +## ltspice://examples + +All example circuits from the LTspice installation. Equivalent to `list_examples(limit=10000)`. + +```json +// Response structure +{ + "examples": [ + { "name": "Buck", "category": "Educational", "path": "/home/user/ltspice/examples/Educational/Buck.asc" }, + { "name": "LT1001", "category": "jigs", "path": "/home/user/ltspice/examples/jigs/LT1001.asc" } + ], + "total_count": 4102, + "returned_count": 4102 +} +``` + +Examples are organized by category folder. Categories like `Educational` contain teaching circuits; `jigs` contains test and evaluation schematics for specific ICs. + +--- + +## ltspice://status + +Current installation status as JSON. Equivalent to calling `check_installation()`. + +```json +// Response structure +{ + "valid": true, + "message": "LTspice installation OK", + "paths": { + "ltspice_dir": "/home/user/ltspice/extracted/ltspice", + "ltspice_exe": "/home/user/ltspice/extracted/ltspice/XVIIx64.exe", + "wine_prefix": "/home/user/ltspice/extracted/ltspice/.wine", + "lib_dir": "/home/user/ltspice/extracted/ltspice/lib", + "examples_dir": "/home/user/ltspice/extracted/ltspice/examples" + }, + "lib_exists": true, + "examples_exist": true +} +``` + +Attaching this resource at session start lets the LLM immediately know whether LTspice is ready and where files are located, without needing a tool call. + +--- + +## ltspice://templates + +All available circuit templates (both netlist and schematic formats) with their parameters and default values. + +```json +// Response structure +{ + "netlist_templates": [ + { + "name": "rc_lowpass", + "description": "RC low-pass filter, fc ~ 1.59 kHz", + "params": { "r": "1k", "c": "100n", "f_start": "1", "f_stop": "1meg" } + }, + { + "name": "buck_converter", + "description": "Synchronous buck converter", + "params": { "ind": "10u", "c_out": "100u", "r_load": "10", "v_in": "12", "duty_cycle": "0.5", "freq": "100k", "mosfet_model": "Si7336ADP", "diode_model": "CMDSH2-3" } + } + ], + "schematic_templates": [ + { + "name": "rc_lowpass", + "description": "RC low-pass filter (.asc schematic)", + "params": { "r": "1k", "c": "100n" } + } + ] +} +``` + +The response separates netlist templates (`.cir` files created by `create_from_template`) from schematic templates (`.asc` files created by `generate_schematic`). Some templates appear in both lists with slightly different parameter sets. + +--- + +## ltspice://template/\{name\} + +Detail for a specific template by name. This is a URI template --- replace `{name}` with the template name. + +**Example URIs:** +- `ltspice://template/rc_lowpass` +- `ltspice://template/buck_converter` +- `ltspice://template/sallen_key_lowpass` + +```json +// Response for ltspice://template/rc_lowpass +{ + "name": "rc_lowpass", + "netlist": { + "description": "RC low-pass filter, fc ~ 1.59 kHz", + "params": { "r": "1k", "c": "100n", "f_start": "1", "f_stop": "1meg" }, + "type": "netlist (.cir)" + }, + "schematic": { + "description": "RC low-pass filter (.asc schematic)", + "params": { "r": "1k", "c": "100n" }, + "type": "schematic (.asc)" + } +} +``` + +If the template exists in only one format (netlist or schematic), only that key is present. If the template name is not found, the response contains an `error` field: + +```json +// Response for unknown template +{ + "error": "Template 'nonexistent' not found" +} +``` + + diff --git a/docs/src/content/docs/reference/schematic-netlist.mdx b/docs/src/content/docs/reference/schematic-netlist.mdx new file mode 100644 index 0000000..47aacde --- /dev/null +++ b/docs/src/content/docs/reference/schematic-netlist.mdx @@ -0,0 +1,416 @@ +--- +title: Schematic and Netlist Tools +description: Read, edit, compare, and create circuit files. +--- + +import { Tabs, TabItem, Aside, Code } from '@astrojs/starlight/components'; + +Eight tools for working with LTspice `.asc` schematics, SPICE `.cir` netlists, and Touchstone S-parameter files. These cover the full lifecycle: read an existing circuit, edit component values, compare revisions, run design rule checks, build new circuits from scratch or from templates, and parse RF measurement data. + +--- + +### read_schematic + +Read and parse an LTspice `.asc` schematic file. Extracts all component instances with their symbols, values, positions, and attributes; net flag names; SPICE directives (simulation commands, `.param`, `.lib`, etc.); and wire count. + + + + + + +
ParameterTypeDefaultDescription
schematic_path`str`---Path to the `.asc` schematic file.
+ +**Returns:** A dict with `version` (schematic format version), `components` (array of objects each containing `name`, `symbol`, `value`, `x`, `y`, and `attributes`), `nets` (array of net flag names), `directives` (array of SPICE directive strings), and `wire_count`. + +
+Example + +```json +{ + "version": 4, + "components": [ + { + "name": "R1", + "symbol": "res", + "value": "10k", + "x": 192, + "y": 128, + "attributes": {"Value": "10k"} + }, + { + "name": "C1", + "symbol": "cap", + "value": "100n", + "x": 320, + "y": 128, + "attributes": {"Value": "100n"} + }, + { + "name": "V1", + "symbol": "voltage", + "value": "AC 1", + "x": 64, + "y": 128, + "attributes": {"Value": "AC 1"} + } + ], + "nets": ["0", "in", "out"], + "directives": [".ac dec 100 1 1meg"], + "wire_count": 8 +} +``` + +
+ +--- + +### edit_component + +Modify a component's value in a schematic. Parses the `.asc` file, finds the component by instance name (case-insensitive), updates its value, and writes the result. Can overwrite the original file or save to a new path. + + + + + + + + + +
ParameterTypeDefaultDescription
schematic_path`str`---Path to the `.asc` schematic file.
component_name`str`---Instance name of the component to modify, e.g. `"R1"`, `"C2"`, `"M1"`.
new_value`str`---New value string, e.g. `"10k"`, `"100n"`, `"2N7000"`.
output_path`str | None``None`Where to save the modified schematic. `None` overwrites the original.
+ +**Returns:** A dict with `success` (boolean), `component` (the component name), `new_value`, `output_path` (path written to), and `symbol` (the component's symbol type). On failure, returns `success: false` with an `error` message listing available component names. + +
+Example + +```json +{ + "success": true, + "component": "R1", + "new_value": "22k", + "output_path": "/tmp/filter_modified.asc", + "symbol": "res" +} +``` + +
+ +--- + +### diff_schematics + +Compare two schematics and produce a structured diff. Reports component additions, removals, and value changes; directive additions, removals, and modifications; net flag additions and removals; and wire count changes. Components are matched by instance name, so renaming a component shows up as a removal plus an addition. + + + + + + + +
ParameterTypeDefaultDescription
schematic_a`str`---Path to the "before" `.asc` file.
schematic_b`str`---Path to the "after" `.asc` file.
+ +**Returns:** A dict with `has_changes` (boolean), `component_changes` (array of objects with `name`, `change_type` of `"added"` / `"removed"` / `"modified"`, `symbol`, `old_value`, `new_value`, `old_attributes`, `new_attributes`, and `moved`), `directive_changes` (array with `change_type`, `old_text`, `new_text`), `nets_added`, `nets_removed`, `wires_added`, `wires_removed`, and a human-readable `summary` string. + +
+Example + +```json +{ + "has_changes": true, + "component_changes": [ + { + "name": "R1", + "change_type": "modified", + "symbol": "res", + "old_value": "10k", + "new_value": "22k", + "old_attributes": {"Value": "10k"}, + "new_attributes": {"Value": "22k"}, + "moved": false + }, + { + "name": "C3", + "change_type": "added", + "symbol": "cap", + "old_value": null, + "new_value": "47n", + "old_attributes": {}, + "new_attributes": {"Value": "47n"}, + "moved": false + } + ], + "directive_changes": [ + { + "change_type": "modified", + "old_text": ".tran 1m", + "new_text": ".tran 10m" + } + ], + "nets_added": ["feedback"], + "nets_removed": [], + "wires_added": 3, + "wires_removed": 0, + "summary": "1 component modified:\n R1: 10k -> 22k\n1 component added: C3 (cap) = 47n\n1 directive changed: .tran 1m -> .tran 10m\n1 net added: feedback\n3 wires added" +} +``` + +
+ +--- + +### run_drc + +Run design rule checks on a schematic. Parses the `.asc` file and runs seven checks against common issues that cause simulation failures or unexpected behavior. Each violation is classified as `error` (will likely prevent simulation), `warning` (may produce unexpected results), or `info` (suggestion). + +Checks performed: + +1. **NO_GROUND** -- Missing ground (node `0`) connection. +2. **FLOATING_NODE** -- Wire endpoint with only one connection and no flag or component nearby. +3. **NO_SIM_DIRECTIVE** -- No simulation command (`.tran`, `.ac`, `.dc`, `.op`, `.noise`, `.tf`). +4. **VSOURCE_LOOP** -- Two voltage sources connected in parallel (short circuit). +5. **MISSING_VALUE** -- Resistor, capacitor, inductor, or source with no value set. +6. **DUPLICATE_NAME** -- Two components sharing the same instance name. +7. **UNCONNECTED_COMPONENT** -- Component with no wire endpoints within one grid step of its origin. + + + + + + +
ParameterTypeDefaultDescription
schematic_path`str`---Path to the `.asc` schematic file.
+ +**Returns:** A dict with `passed` (boolean --- `true` if zero errors), `checks_run` (number of checks executed), `summary` (human-readable string), `error_count`, `warning_count`, and `violations` (array of objects each containing `rule`, `severity`, `message`, `component`, and `location`). + +
+Example + +```json +{ + "passed": false, + "checks_run": 7, + "summary": "DRC FAILED: 7 checks run, 1 error, 1 warning.", + "error_count": 1, + "warning_count": 1, + "violations": [ + { + "rule": "NO_GROUND", + "severity": "error", + "message": "No ground node found. Every circuit needs at least one ground (0) connection.", + "component": null, + "location": null + }, + { + "rule": "MISSING_VALUE", + "severity": "warning", + "message": "Resistor 'R3' has no value set.", + "component": "R3", + "location": [320, 256] + } + ] +} +``` + +
+ +--- + +### create_netlist + +Create a SPICE netlist programmatically and save it as a `.cir` file. Build circuits from scratch without needing the LTspice graphical editor. The resulting file can be passed directly to `simulate_netlist`. + + + + + + + + + +
ParameterTypeDefaultDescription
title`str`---Circuit title/description (appears as the first line of the `.cir` file).
components`list[dict]`---List of component dicts. Each must have `name` (e.g. `"R1"`, `"V1"`, `"X1"`), `nodes` (list of node name strings, use `"0"` for ground), and `value` (value or model name). Optional `params` key for extra parameters.
directives`list[str]`---List of SPICE directive strings, e.g. `[".tran 10m", ".meas tran vmax MAX V(out)"]`.
output_path`str | None``None`Where to save the `.cir` file. `None` saves to a temp directory with a name derived from the title.
+ +**Returns:** A dict with `success` (boolean), `output_path` (where the file was written), `netlist_preview` (full rendered netlist text), and `component_count`. + +
+Example -- RC lowpass filter + +Calling `create_netlist` with these arguments: + +```json +{ + "title": "RC Lowpass Filter", + "components": [ + {"name": "V1", "nodes": ["in", "0"], "value": "AC 1"}, + {"name": "R1", "nodes": ["in", "out"], "value": "1k"}, + {"name": "C1", "nodes": ["out", "0"], "value": "100n"} + ], + "directives": [".ac dec 100 1 1meg"] +} +``` + +Produces this netlist: + +```text +* RC Lowpass Filter + +V1 in 0 AC 1 +R1 in out 1k +C1 out 0 100n + +.ac dec 100 1 1meg +.backanno +.end +``` + +And returns: + +```json +{ + "success": true, + "output_path": "/tmp/RC_Lowpass_Filter.cir", + "netlist_preview": "* RC Lowpass Filter\n\nV1 in 0 AC 1\nR1 in out 1k\nC1 out 0 100n\n\n.ac dec 100 1 1meg\n.backanno\n.end\n", + "component_count": 3 +} +``` + +
+ +--- + +### create_from_template + +Create a circuit netlist from a pre-built template. Each template generates a complete, ready-to-simulate `.cir` file with default component values that can be selectively overridden. All parameter values are passed as strings. + +Available templates: + +| Template | Description | +|---|---| +| `voltage_divider` | Resistive voltage divider with `.op` or custom analysis | +| `rc_lowpass` | RC lowpass filter with AC sweep | +| `inverting_amplifier` | Inverting op-amp (gain = -Rf/Rin), +/-15V supply | +| `non_inverting_amplifier` | Non-inverting op-amp (gain = 1 + Rf/Rin), +/-15V supply | +| `differential_amplifier` | Diff amp: Vout = (R2/R1)(V2-V1), +/-15V supply | +| `common_emitter_amplifier` | BJT common-emitter with voltage divider bias | +| `buck_converter` | Step-down DC-DC converter with MOSFET switch | +| `ldo_regulator` | LDO regulator: Vout = Vref * (1 + R1/R2) | +| `colpitts_oscillator` | LC oscillator: f ~ 1/(2 pi sqrt(L Cseries)) | +| `h_bridge` | 4-MOSFET H-bridge motor driver with dead time | +| `sallen_key_lowpass` | Sallen-Key lowpass (unity gain, 2nd order) | +| `boost_converter` | Step-up DC-DC converter with MOSFET switch | +| `instrumentation_amplifier` | 3-opamp instrumentation amp: gain = (1 + 2R1/Rgain)(R3/R2) | +| `current_mirror` | BJT current mirror with reference resistor | +| `transimpedance_amplifier` | TIA: Vout = -Iin * Rf | + + + + + + + + +
ParameterTypeDefaultDescription
template_name`str`---Template name from the table above.
params`dict[str, str] | None``None`Optional parameter overrides as key-value string pairs. Use `list_templates` to see available parameters and defaults for each template.
output_path`str | None``None`Where to save the `.cir` file. `None` saves to `/tmp/.cir`.
+ +**Returns:** A dict with `success` (boolean), `template` (name used), `description`, `output_path`, `netlist_preview` (full rendered netlist text), `component_count`, and `params_used` (merged defaults and overrides). + +
+Example + +```json +{ + "success": true, + "template": "rc_lowpass", + "description": "RC lowpass filter with AC sweep", + "output_path": "/tmp/rc_lowpass.cir", + "netlist_preview": "* RC Lowpass Filter\n\nV1 in 0 AC 1\nR1 in out 4.7k\nC1 out 0 10n\n\n.ac dec 100 1 1meg\n.backanno\n.end\n", + "component_count": 3, + "params_used": { + "r": "4.7k", + "c": "10n", + "f_start": "1", + "f_stop": "1meg" + } +} +``` + +
+ +--- + +### generate_schematic + +Generate an LTspice `.asc` graphical schematic file from a template. Unlike `create_from_template` which produces a text-based `.cir` netlist, this tool creates a ready-to-open `.asc` file with proper component placement, wire routing, net labels, and simulation directives. The output can be loaded directly into the LTspice GUI. + +Uses the same template names and parameters as `create_from_template`. + + + + + + +
ParameterTypeDefaultDescription
template`str`---Template name (same set as `create_from_template`).
params`dict[str, str] | None``None`Optional parameter overrides as key-value string pairs.
output_path`str | None``None`Where to save the `.asc` file. `None` saves to `/tmp/