Ryan Malloy
9b418a06c5
- SVG waveform plots (svg_plot.py): pure-SVG timeseries, Bode, spectrum
generation with plot_waveform MCP tool — no matplotlib dependency
- Circuit tuning tool (tune_circuit): single-shot simulate → measure →
compare targets → suggest adjustments workflow for iterative design
- 5 new circuit templates: Sallen-Key lowpass, boost converter,
instrumentation amplifier, current mirror, transimpedance amplifier
(both netlist and .asc schematic generators, 15 total templates)
- Fix all 6 prompts to return list[Message] per FastMCP 2.x spec
- Add ltspice://templates and ltspice://template/{name} resources
- Add troubleshoot_simulation prompt
- Integration tests for RC lowpass and non-inverting amp (2/4 pass;
CE amp and Colpitts oscillator have pre-existing schematic bugs)
- 360 unit tests passing, ruff clean
337 lines
9.6 KiB
Python
337 lines
9.6 KiB
Python
"""Shared fixtures for mcp-ltspice test suite.
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All fixtures produce synthetic data -- no LTspice or Wine required.
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"""
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from pathlib import Path
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import numpy as np
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import pytest
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from mcp_ltspice.raw_parser import RawFile, Variable
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from mcp_ltspice.schematic import Component, Flag, Schematic, Text, Wire
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# ---------------------------------------------------------------------------
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# Time-domain fixtures
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# ---------------------------------------------------------------------------
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@pytest.fixture
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def sample_rate() -> float:
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"""Default sample rate: 100 kHz."""
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return 100_000.0
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@pytest.fixture
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def duration() -> float:
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"""Default signal duration: 10 ms (enough for 1 kHz signals)."""
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return 0.01
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@pytest.fixture
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def time_array(sample_rate, duration) -> np.ndarray:
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"""Uniformly spaced time array."""
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n = int(sample_rate * duration)
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return np.linspace(0, duration, n, endpoint=False)
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@pytest.fixture
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def sine_1khz(time_array) -> np.ndarray:
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"""1 kHz sine wave, 1 V peak."""
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return np.sin(2 * np.pi * 1000 * time_array)
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@pytest.fixture
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def dc_signal() -> np.ndarray:
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"""Constant 3.3 V DC signal (1000 samples)."""
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return np.full(1000, 3.3)
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@pytest.fixture
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def step_signal(time_array) -> np.ndarray:
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"""Unit step at t = duration/2 with exponential rise (tau = duration/10)."""
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t = time_array
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mid = t[-1] / 2
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tau = t[-1] / 10
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sig = np.where(t >= mid, 1.0 - np.exp(-(t - mid) / tau), 0.0)
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return sig
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# ---------------------------------------------------------------------------
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# Frequency-domain / AC fixtures
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# ---------------------------------------------------------------------------
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@pytest.fixture
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def ac_frequency() -> np.ndarray:
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"""Log-spaced frequency array: 1 Hz to 10 MHz, 500 points."""
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return np.logspace(0, 7, 500)
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@pytest.fixture
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def lowpass_response(ac_frequency) -> np.ndarray:
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"""First-order lowpass magnitude in dB (fc ~ 1 kHz)."""
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fc = 1000.0
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mag = 1.0 / np.sqrt(1.0 + (ac_frequency / fc) ** 2)
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return 20.0 * np.log10(mag)
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@pytest.fixture
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def lowpass_complex(ac_frequency) -> np.ndarray:
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"""First-order lowpass as complex transfer function (fc ~ 1 kHz)."""
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fc = 1000.0
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s = 1j * ac_frequency / fc
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return 1.0 / (1.0 + s)
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# ---------------------------------------------------------------------------
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# Stepped / multi-run fixtures
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# ---------------------------------------------------------------------------
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@pytest.fixture
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def stepped_time() -> np.ndarray:
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"""Time axis for 3 runs, each 0..1 ms with 100 points per run."""
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runs = []
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for _ in range(3):
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runs.append(np.linspace(0, 1e-3, 100, endpoint=False))
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return np.concatenate(runs)
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@pytest.fixture
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def stepped_data(stepped_time) -> np.ndarray:
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"""Two variables (time + V(out)) across 3 runs."""
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n = len(stepped_time)
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data = np.zeros((2, n))
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data[0] = stepped_time
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# Each run has a different amplitude sine wave
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for run_idx in range(3):
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start = run_idx * 100
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end = start + 100
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t_run = data[0, start:end]
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data[1, start:end] = (run_idx + 1) * np.sin(2 * np.pi * 1000 * t_run)
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return data
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# ---------------------------------------------------------------------------
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# Mock RawFile fixtures
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# ---------------------------------------------------------------------------
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@pytest.fixture
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def mock_rawfile(time_array, sine_1khz) -> RawFile:
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"""A simple transient-analysis RawFile with time and V(out)."""
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n = len(time_array)
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data = np.zeros((2, n))
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data[0] = time_array
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data[1] = sine_1khz
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return RawFile(
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title="Test Circuit",
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date="2026-01-01",
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plotname="Transient Analysis",
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flags=["real"],
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variables=[
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Variable(0, "time", "time"),
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Variable(1, "V(out)", "voltage"),
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],
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points=n,
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data=data,
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)
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@pytest.fixture
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def mock_rawfile_stepped(stepped_data) -> RawFile:
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"""A stepped RawFile with 3 runs."""
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n = stepped_data.shape[1]
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return RawFile(
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title="Stepped Sim",
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date="2026-01-01",
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plotname="Transient Analysis",
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flags=["real", "stepped"],
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variables=[
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Variable(0, "time", "time"),
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Variable(1, "V(out)", "voltage"),
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],
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points=n,
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data=stepped_data,
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n_runs=3,
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run_boundaries=[0, 100, 200],
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)
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@pytest.fixture
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def mock_rawfile_ac(ac_frequency, lowpass_complex) -> RawFile:
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"""An AC-analysis RawFile with complex frequency-domain data."""
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n = len(ac_frequency)
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data = np.zeros((2, n), dtype=np.complex128)
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data[0] = ac_frequency.astype(np.complex128)
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data[1] = lowpass_complex
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return RawFile(
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title="AC Sim",
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date="2026-01-01",
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plotname="AC Analysis",
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flags=["complex"],
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variables=[
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Variable(0, "frequency", "frequency"),
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Variable(1, "V(out)", "voltage"),
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],
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points=n,
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data=data,
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)
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# ---------------------------------------------------------------------------
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# Netlist / Schematic string fixtures
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# ---------------------------------------------------------------------------
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@pytest.fixture
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def sample_netlist_str() -> str:
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"""A basic SPICE netlist string for an RC lowpass."""
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return (
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"* RC Lowpass Filter\n"
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"V1 in 0 AC 1\n"
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"R1 in out 1k\n"
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"C1 out 0 100n\n"
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".ac dec 100 1 1meg\n"
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".backanno\n"
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".end\n"
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)
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@pytest.fixture
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def sample_asc_str() -> str:
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"""A minimal .asc schematic string for an RC lowpass."""
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return (
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"Version 4\n"
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"SHEET 1 880 680\n"
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"WIRE 80 96 176 96\n"
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"WIRE 176 176 272 176\n"
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"FLAG 80 176 0\n"
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"FLAG 272 240 0\n"
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"FLAG 176 176 out\n"
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"SYMBOL voltage 80 80 R0\n"
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"SYMATTR InstName V1\n"
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"SYMATTR Value AC 1\n"
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"SYMBOL res 160 80 R0\n"
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"SYMATTR InstName R1\n"
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"SYMATTR Value 1k\n"
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"SYMBOL cap 256 176 R0\n"
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"SYMATTR InstName C1\n"
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"SYMATTR Value 100n\n"
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"TEXT 80 296 Left 2 !.ac dec 100 1 1meg\n"
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)
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# ---------------------------------------------------------------------------
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# Touchstone fixtures
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# ---------------------------------------------------------------------------
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@pytest.fixture
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def sample_s2p_content() -> str:
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"""Synthetic .s2p file content (MA format, GHz)."""
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lines = [
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"! Two-port S-parameter data",
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"! Freq S11(mag) S11(ang) S21(mag) S21(ang) S12(mag) S12(ang) S22(mag) S22(ang)",
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"# GHZ S MA R 50",
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"1.0 0.5 -30 0.9 -10 0.1 170 0.4 -40",
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"2.0 0.6 -50 0.8 -20 0.12 160 0.5 -60",
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"3.0 0.7 -70 0.7 -30 0.15 150 0.55 -80",
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]
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return "\n".join(lines) + "\n"
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@pytest.fixture
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def tmp_s2p_file(sample_s2p_content, tmp_path) -> Path:
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"""Write synthetic .s2p content to a temp file and return path."""
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p = tmp_path / "test.s2p"
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p.write_text(sample_s2p_content)
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return p
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# ---------------------------------------------------------------------------
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# Schematic object fixtures (for DRC and diff tests)
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# ---------------------------------------------------------------------------
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@pytest.fixture
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def valid_schematic() -> Schematic:
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"""A schematic with ground, components, wires, and sim directive."""
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sch = Schematic()
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sch.flags = [
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Flag(80, 176, "0"),
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Flag(272, 240, "0"),
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Flag(176, 176, "out"),
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]
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sch.wires = [
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Wire(80, 96, 176, 96),
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Wire(176, 176, 272, 176),
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]
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sch.components = [
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Component(name="V1", symbol="voltage", x=80, y=80, rotation=0, mirror=False,
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attributes={"Value": "AC 1"}),
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Component(name="R1", symbol="res", x=160, y=80, rotation=0, mirror=False,
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attributes={"Value": "1k"}),
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Component(name="C1", symbol="cap", x=256, y=176, rotation=0, mirror=False,
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attributes={"Value": "100n"}),
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]
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sch.texts = [
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Text(80, 296, ".ac dec 100 1 1meg", type="spice"),
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]
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return sch
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@pytest.fixture
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def schematic_no_ground() -> Schematic:
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"""A schematic missing a ground node."""
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sch = Schematic()
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sch.flags = [Flag(176, 176, "out")]
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sch.wires = [Wire(80, 96, 176, 96)]
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sch.components = [
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Component(name="R1", symbol="res", x=160, y=80, rotation=0, mirror=False,
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attributes={"Value": "1k"}),
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]
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sch.texts = [Text(80, 296, ".tran 10m", type="spice")]
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return sch
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@pytest.fixture
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def schematic_no_sim() -> Schematic:
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"""A schematic missing a simulation directive."""
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sch = Schematic()
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sch.flags = [Flag(80, 176, "0")]
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sch.wires = [Wire(80, 96, 176, 96)]
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sch.components = [
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Component(name="R1", symbol="res", x=160, y=80, rotation=0, mirror=False,
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attributes={"Value": "1k"}),
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]
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sch.texts = []
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return sch
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@pytest.fixture
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def schematic_duplicate_names() -> Schematic:
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"""A schematic with duplicate component names."""
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sch = Schematic()
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sch.flags = [Flag(80, 176, "0")]
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sch.wires = [Wire(80, 96, 176, 96)]
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sch.components = [
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Component(name="R1", symbol="res", x=160, y=80, rotation=0, mirror=False,
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attributes={"Value": "1k"}),
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Component(name="R1", symbol="res", x=320, y=80, rotation=0, mirror=False,
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attributes={"Value": "2.2k"}),
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]
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sch.texts = [Text(80, 296, ".tran 10m", type="spice")]
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return sch
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@pytest.fixture
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def ltspice_available():
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"""Skip test if LTspice is not available."""
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from mcp_ltspice.config import validate_installation
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ok, msg = validate_installation()
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if not ok:
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pytest.skip(f"LTspice not available: {msg}")
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return True
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