diff --git a/src/output/output.dot b/src/output/output.dot index 06a9729..65d4d93 100644 --- a/src/output/output.dot +++ b/src/output/output.dot @@ -5,7 +5,13 @@ digraph G { X1[label="X1 | {{DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI} | {1|2|3|4|5|6|7|8|9}}}"] + X2[label="X2 | {{1|2|3|4|5|6} | {|||||}}}"] + +{edge[style=bold] +X2:p5:w -> X2:p6:w +} + W1[label="W1 | {{1|2|3|4} | {WH|BN|GN|Shield} | {1|2|3|4}}}"] {edge[style=bold] diff --git a/src/test.py b/src/test.py index 3427366..d4af6a6 100644 --- a/src/test.py +++ b/src/test.py @@ -3,13 +3,12 @@ import wireviz PINOUT_SERIAL = ('DCD','RX','TX','DTR','GND','DSR','RTS','CTS','RI') COLORS_WEIRD = ("infrared","ultraviolet","transparent","invisible") +# example 1 X1 = wireviz.Node("X1", pinout=PINOUT_SERIAL, ports_right=True) X2 = wireviz.Node("X2", num_pins=6, ports_left=True) - W1 = wireviz.Cable("W1", num_wires=3, color_code="DIN", shield=True) - W1.connect(X1,(2,3,5),(1,2,3),X2,(1,3,2)) - +X2.loop(5,6) objects = [X1, X2, W1] with open('output/output.dot','w') as f: diff --git a/src/wireviz.py b/src/wireviz.py index 4a64e4a..852e611 100644 --- a/src/wireviz.py +++ b/src/wireviz.py @@ -22,6 +22,7 @@ class Node: self.name = name self.ports_left = ports_left self.ports_right = ports_right + self.loops = [] if pinout is None: self.pinout = ("",) * num_pins @@ -32,6 +33,18 @@ class Node: else: self.pinout = pinout + def loop(self, from_pin, to_pin, side=None): + if self.ports_left == True and self.ports_right == False: + loop_side = 'w' # west = left + elif self.ports_left == False and self.ports_right == True: + loop_side = 'e' # east = right + elif self.ports_left == True and self.ports_right == True: + if side == None: + raise Exception("Must specify side of loop") + else: + loop_side = side + self.loops.append((from_pin, to_pin, loop_side)) + def __repr__(self): return "{} = {} {}".format(self.name, len(self.pinout), self.pinout) @@ -65,6 +78,14 @@ class Node: s = s + '}}"]' + # print loops + if len(self.loops) > 0: + s = s + '\n\n{edge[style=bold]\n' + for x in self.loops: + s = s + '{name}:p{port_from}:{loop_side} -> {name}:p{port_to}:{loop_side}\n'.format(name=self.name, port_from=x[0], port_to=x[1], loop_side=x[2]) + s = s + '}' + + s = s + '\n' return s class Cable: