Update idea examples
This commit is contained in:
Daniel Rojas
parent
719ddd1e0d
commit
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@ -1,18 +1,29 @@
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// Graph generated by WireViz
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// https://github.com/formatc1702/WireViz
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// Daniel Rojas - 2020
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digraph G {
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digraph G {
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graph [rankdir = LR, ranksep=2, fontname = "arial"];
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graph [rankdir = LR, ranksep=2, fontname = "arial"];
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edge [arrowhead=none, fontname = "arial"];
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edge [arrowhead=none, fontname = "arial"];
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node [shape=record, style=rounded, fontname = "arial"];
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node [shape=record, style=rounded, fontname = "arial"];
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X1[label="X1 | D-Sub DE-9 | female | {{DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9}} "];
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X2[label="X2 | Molex KK 254 6-pin | female | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6} | {GND|RX|TX|NC|OUT|IN}}"];
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W1[label="W1 | 3x 0,25 mm² shielded | 0.2 m | {{<w1i>1|<w2i>2|<w3i>3|<wsi>}|{WH|BN|GN|Shield}|{<w1o>1|<w2o>2|<w3o>3|<wsi>}}}"];
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X1[label="X1 | {D-Sub|female|9-pin} | {{DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9}}}"]
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X2[label="X2 | {Molex KK 254|female|6-pin} | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6} | {GND|RX|TX|NC|OUT|IN}}}"]
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{edge[style=bold]
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X2:p5:w -> X2:p6:w
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}
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W1[label="W1 | {3x|0.25 mm²| + S|0.2 m} | {{<w1i>1|<w2i>2|<w3i>3|<wsi>} | {WH|BN|GN|Shield} | {<w1o>1|<w2o>2|<w3o>3|<wso>}}}"]
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{edge[style=bold]
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{edge[color="#000000:#ffffff:#000000"] X1:p5 -> W1:w1i; W1:w1o -> X2:p1}
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{edge[color="#000000:#666600:#000000"] X1:p2 -> W1:w2i; W1:w2o -> X2:p3}
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{edge[color="#000000:#00ff00:#000000"] X1:p3 -> W1:w3i; W1:w3o -> X2:p2}
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{X1:p5 -> W1:wsi; }
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}
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{edge[style=bold]
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{edge[color="#000000:#ffffff:#000000"] X1:p5 -> W1:w1i; W1:w1o -> X2:p1; }
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{edge[color="#000000:#666600:#000000"] X1:p2 -> W1:w2i; W1:w2o -> X2:p3; }
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{edge[color="#000000:#00ff00:#000000"] X1:p3 -> W1:w3i; W1:w3o -> X2:p2; }
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X1:p5 -> W1:wsi;
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X2:p5:w -> X2:p6:w;
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}
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}
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}
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Binary file not shown.
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Before Width: | Height: | Size: 66 KiB After Width: | Height: | Size: 151 KiB |
@ -1,27 +1,23 @@
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// define connectors
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// define connectors
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X1[type="D-Sub DE-9",
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X1 [type="D-Sub",
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subtype="female",
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gender="female",
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num_pins=9,
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pin_labels="DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI",
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pin_labels="DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI",
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]
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position=L
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]
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X2[type="Molex KK 254 6-pin",
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X2 [type="Molex KK 254",
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subtype="female",
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gender="female",
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num_pins=6,
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pin_labels="GND|RX|TX|NC|OUT|IN",
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pin_labels="GND|RX|TX|NC|OUT|IN",
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]
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position=R
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]
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// define wire
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// define wire
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W1[type="3x 0,25 mm² shielded",
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W1 [mm2=0.25,
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length="0.2m",
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length=0.2,
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num_wires=3,
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num_wires=3,
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colors="din47100",
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colors="din47100",
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shield=true
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shield=true
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]
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]
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// define connections
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// define connections
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@ -1,54 +1,53 @@
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graph G {
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// Graph generated by WireViz
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// https://github.com/formatc1702/WireViz
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// Daniel Rojas - 2020
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digraph G {
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graph [rankdir = LR, ranksep=2, fontname = "arial"];
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graph [rankdir = LR, ranksep=2, fontname = "arial"];
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edge [arrowhead=none, fontname = "arial"];
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edge [arrowhead=none, fontname = "arial"];
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node [shape=record, style=rounded, fontname = "arial"];
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node [shape=record, style=rounded, fontname = "arial"];
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X1[label="X1 | Molex KK 254 8-pin | female | {{GND|+5V|SCL|SDA|MISO|MOSI|SCK|N/C} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8}} "];
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X2[label="X2 | Molex KK 254 4-pin | female | {{<p1>1|<p2>2|<p3>3|<p4>4} | {GND|+5V|SCL|SDA}}"];
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X3[label="X3 | Molex KK 254 4-pin | female | {{<p1>1|<p2>2|<p3>3|<p4>4} | {GND|+5V|SCL|SDA}}"];
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X4[label="X4 | Molex KK 254 5-pin | female | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5} | {GND|+12V|MISO|MOSI|SCK}}"];
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X5[label="X5 | Molex Micro-Fit 2-pin | male | {{GND|+12V} | {<p1>1|<p2>2}} "];
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W1[label="{4x | 0,14 mm² | 0.2 m} | <w1>BK|<w2>RD|<w3>YE|<w4>GN"];
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X1[label="X1 | {Molex KK 254|female|8-pin} | {{GND|+5V|SCL|SDA|MISO|MOSI|SCK|N/C} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8}}}"]
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W2[label="{4x | 0,14 mm² | 0.2 m} | <w1>BK|<w2>RD|<w3>YE|<w4>GN"];
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W3[label="{4x | 0,14 mm² | 0.2 m} | <w1>BK|<w2>BU|<w3>OG|<w4>VT}"];
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W4[label="{2x | 0,5 mm² | 0.35 m} | <w1>BK|<w2>RD"];
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{edge[style=bold]
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X2[label="X2 | {Molex KK 254|female|4-pin} | {{<p1>1|<p2>2|<p3>3|<p4>4} | {GND|+5V|SCL|SDA}}}"]
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// GND
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{edge[color="#000000:#000000:#000000"]
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X1:p1 -- W1:w1 -- X2:p1;
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X1:p1 -- W2:w1 -- X3:p1;
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X1:p1 -- W3:w1 -- X4:p1;
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X5:p1 -- W4:W1 -- X4:p1;
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}
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// +5V
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X3[label="X3 | {Molex KK 254|female|4-pin} | {{<p1>1|<p2>2|<p3>3|<p4>4} | {GND|+5V|SCL|SDA}}}"]
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{edge[color="#000000:#ff0000:#000000"]
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X1:p2 -- W1:w2 -- X2:p2;
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X1:p2 -- W2:w2 -- X3:p2;
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}
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// +12V
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X4[label="X4 | {Molex KK 254|female|5-pin} | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5} | {GND|+12V|MISO|MOSI|SCK}}}"]
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{edge[color="#000000:#ff0000:#000000"] X5:p2 -- W4:w2 -- X4:p2; }
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// SCL
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X5[label="X5 | {Molex Micro-Fit|male|2-pin} | {{GND|+12V} | {<p1>1|<p2>2}}}"]
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{edge[color="#000000:#ffff00:#000000"]
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X1:p3 -- W1:w3 -- X2:p3;
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W1[label="{4x|0.14 mm²|0.2 m} | {{<w1>BK|<w2>RD|<w3>YE|<w4>GN}}}"]
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X1:p3 -- W2:w3 -- X3:p3;
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}
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{edge[style=bold]
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{edge[color="#000000:#000000:#000000"] X1:p1 -> W1:w1; W1:w1 -> X2:p1}
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{edge[color="#000000:#ff0000:#000000"] X1:p2 -> W1:w2; W1:w2 -> X2:p2}
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{edge[color="#000000:#ffff00:#000000"] X1:p3 -> W1:w3; W1:w3 -> X2:p3}
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{edge[color="#000000:#00ff00:#000000"] X1:p4 -> W1:w4; W1:w4 -> X2:p4}
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}
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W2[label="{4x|0.14 mm²|0.2 m} | {{<w1>BK|<w2>RD|<w3>YE|<w4>GN}}}"]
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{edge[style=bold]
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{edge[color="#000000:#000000:#000000"] X1:p1 -> W2:w1; W2:w1 -> X3:p1}
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{edge[color="#000000:#ff0000:#000000"] X1:p2 -> W2:w2; W2:w2 -> X3:p2}
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{edge[color="#000000:#ffff00:#000000"] X1:p3 -> W2:w3; W2:w3 -> X3:p3}
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{edge[color="#000000:#00ff00:#000000"] X1:p4 -> W2:w4; W2:w4 -> X3:p4}
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}
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W3[label="{4x|0.14 mm²|0.2 m} | {{<w1>BK|<w2>BU|<w3>OG|<w4>VT}}}"]
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{edge[style=bold]
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{edge[color="#000000:#000000:#000000"] X1:p1 -> W3:w1; W3:w1 -> X4:p1}
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{edge[color="#000000:#0000ff:#000000"] X1:p5 -> W3:w2; W3:w2 -> X4:p3}
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{edge[color="#000000:#ff8000:#000000"] X1:p6 -> W3:w3; W3:w3 -> X4:p4}
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{edge[color="#000000:#8000ff:#000000"] X1:p7 -> W3:w4; W3:w4 -> X4:p5}
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}
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W4[label="{2x|0.5 mm²|0.35 m} | {{<w1>BK|<w2>RD}}}"]
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{edge[style=bold]
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{edge[color="#000000:#000000:#000000"] X5:p1 -> W4:w1; W4:w1 -> X4:p1}
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{edge[color="#000000:#ff0000:#000000"] X5:p2 -> W4:w2; W4:w2 -> X4:p2}
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}
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// SDA
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{edge[color="#000000:#008000:#000000"]
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X1:p4 -- W1:w4 -- X2:p4;
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X1:p4 -- W2:w4 -- X3:p4;
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}
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// SPI
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{edge[color="#000000:#0080ff:#000000"] X1:p5 -- W3:w2 -- X4:p3; }
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{edge[color="#000000:#ff8000:#000000"] X1:p6 -- W3:w3 -- X4:p4; }
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{edge[color="#000000:#8000ff:#000000"] X1:p7 -- W3:w4 -- X4:p5; }
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// +12V
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}
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}
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}
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Binary file not shown.
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Before Width: | Height: | Size: 173 KiB After Width: | Height: | Size: 382 KiB |
42
readme.md
42
readme.md
@ -26,24 +26,20 @@ WireViz input file:
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// define connectors
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// define connectors
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X1 [type="D-Sub DE-9",
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X1 [type="D-Sub",
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subtype="female",
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gender="female",
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num_pins=9,
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pin_labels="DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI",
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pin_labels="DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI",
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position=L
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]
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]
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X2 [type="Molex KK 254 6-pin",
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X2 [type="Molex KK 254",
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subtype="female",
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gender="female",
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num_pins=6,
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pin_labels="GND|RX|TX|NC|OUT|IN",
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pin_labels="GND|RX|TX|NC|OUT|IN",
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position=R
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]
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]
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// define wire
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// define wire
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W1 [type="3x 0,25 mm² shielded",
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W1 [mm2=0.25,
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length="0.2m",
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length=0.2,
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num_wires=3,
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num_wires=3,
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colors="din47100",
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colors="din47100",
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shield=true
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shield=true
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@ -68,18 +64,24 @@ GraphViz code generated by parser:
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edge [arrowhead=none, fontname = "arial"];
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edge [arrowhead=none, fontname = "arial"];
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node [shape=record, style=rounded, fontname = "arial"];
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node [shape=record, style=rounded, fontname = "arial"];
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X1[label="X1 | D-Sub DE-9 | female | {{DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9}} "];
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X1[label="X1 | {D-Sub DE-9|female|9-pin} | {{DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9}}}"]
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X2[label="X2 | Molex KK 254 6-pin | female | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6} | {GND|RX|TX|NC|OUT|IN}}"];
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X2[label="X2 | {Molex KK 254|female|6-pin} | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6} | {|||||}}}"]
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{edge[style=bold]
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X2:p5:w -> X2:p6:w
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}
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W1[label="W1 | {3x|0.25 mm²| + S|0.2 m} | {{<w1i>1|<w2i>2|<w3i>3|<wsi>} | {WH|BN|GN|Shield} | {<w1o>1|<w2o>2|<w3o>3|<wso>}}}"]
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{edge[style=bold]
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{edge[color="#000000:#ffffff:#000000"] X1:p5 -> W1:w1i; W1:w1o -> X2:p1}
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{edge[color="#000000:#666600:#000000"] X1:p2 -> W1:w2i; W1:w2o -> X2:p3}
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{edge[color="#000000:#00ff00:#000000"] X1:p3 -> W1:w3i; W1:w3o -> X2:p2}
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{X1:p5 -> W1:wsi; }
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}
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W1[label="W1 | 3x 0,25 mm² shielded | 0.2 m | {{<w1i>1|<w2i>2|<w3i>3|<wsi>}|{WH|BN|GN|Shield}|{<w1o>1|<w2o>2|<w3o>3|<wsi>}}}"];
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{edge[style=bold]
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{edge[color="#000000:#ffffff:#000000"] X1:p5 -> W1:w1i; W1:w1o -> X2:p1; }
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{edge[color="#000000:#666600:#000000"] X1:p2 -> W1:w2i; W1:w2o -> X2:p3; }
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{edge[color="#000000:#00ff00:#000000"] X1:p3 -> W1:w3i; W1:w3o -> X2:p2; }
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X1:p5 -> W1:wsi;
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X2:p5:w -> X2:p6:w;
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}
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}
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}
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[Example 2](idea/example2.dot)
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[Example 2](idea/example2.dot)
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