diff --git a/idea/example1.dot b/idea/example1.dot
index 5467348..fc388f5 100644
--- a/idea/example1.dot
+++ b/idea/example1.dot
@@ -1,18 +1,29 @@
+// Graph generated by WireViz
+// https://github.com/formatc1702/WireViz
+// Daniel Rojas - 2020
+
 digraph G {
     graph [rankdir = LR, ranksep=2, fontname = "arial"];
     edge [arrowhead=none, fontname = "arial"];
     node [shape=record, style=rounded, fontname = "arial"];
 
-    X1[label="X1 | D-Sub DE-9 | female | {{DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9}} "];
-    X2[label="X2 | Molex KK 254 6-pin | female | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6} | {GND|RX|TX|NC|OUT|IN}}"];
 
-    W1[label="W1 | 3x 0,25 mm² shielded | 0.2 m | {{<w1i>1|<w2i>2|<w3i>3|<wsi>}|{WH|BN|GN|Shield}|{<w1o>1|<w2o>2|<w3o>3|<wsi>}}}"];
+X1[label="X1 | {D-Sub|female|9-pin} | {{DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9}}}"]
+
+X2[label="X2 | {Molex KK 254|female|6-pin} | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6} | {GND|RX|TX|NC|OUT|IN}}}"]
+
+{edge[style=bold]
+X2:p5:w -> X2:p6:w
+}
+
+W1[label="W1 | {3x|0.25 mm²| + S|0.2 m} | {{<w1i>1|<w2i>2|<w3i>3|<wsi>} | {WH|BN|GN|Shield} | {<w1o>1|<w2o>2|<w3o>3|<wso>}}}"]
+
+{edge[style=bold]
+{edge[color="#000000:#ffffff:#000000"] X1:p5 -> W1:w1i; W1:w1o -> X2:p1}
+{edge[color="#000000:#666600:#000000"] X1:p2 -> W1:w2i; W1:w2o -> X2:p3}
+{edge[color="#000000:#00ff00:#000000"] X1:p3 -> W1:w3i; W1:w3o -> X2:p2}
+{X1:p5 -> W1:wsi; }
+}
+
 
-    {edge[style=bold]
-        {edge[color="#000000:#ffffff:#000000"] X1:p5 -> W1:w1i; W1:w1o -> X2:p1; }
-        {edge[color="#000000:#666600:#000000"] X1:p2 -> W1:w2i; W1:w2o -> X2:p3; }
-        {edge[color="#000000:#00ff00:#000000"] X1:p3 -> W1:w3i; W1:w3o -> X2:p2; }
-        X1:p5 -> W1:wsi;
-        X2:p5:w -> X2:p6:w;
-    }
 }
diff --git a/idea/example1.png b/idea/example1.png
index 13db19a..f8ecb55 100644
Binary files a/idea/example1.png and b/idea/example1.png differ
diff --git a/idea/example1.wire b/idea/example1.wire
index 9a90895..5cdb78e 100644
--- a/idea/example1.wire
+++ b/idea/example1.wire
@@ -1,27 +1,23 @@
 // define connectors
 
-X1[type="D-Sub DE-9",
-   subtype="female",
-   num_pins=9,
-   pin_labels="DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI",
-   position=L
-  ]
+X1 [type="D-Sub",
+    gender="female",
+    pin_labels="DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI",
+   ]
 
-X2[type="Molex KK 254 6-pin",
-   subtype="female",
-   num_pins=6,
-   pin_labels="GND|RX|TX|NC|OUT|IN",
-   position=R
-  ]
+X2 [type="Molex KK 254",
+    gender="female",
+    pin_labels="GND|RX|TX|NC|OUT|IN",
+   ]
 
 // define wire
 
-W1[type="3x 0,25 mm² shielded",
-   length="0.2m",
-   num_wires=3,
-   colors="din47100",
-   shield=true
-  ]
+W1 [mm2=0.25,
+    length=0.2,
+    num_wires=3,
+    colors="din47100",
+    shield=true
+   ]
 
 // define connections
 
diff --git a/idea/example2.dot b/idea/example2.dot
index 01665cb..fa191bd 100644
--- a/idea/example2.dot
+++ b/idea/example2.dot
@@ -1,54 +1,53 @@
-graph G {
+// Graph generated by WireViz
+// https://github.com/formatc1702/WireViz
+// Daniel Rojas - 2020
+
+digraph G {
     graph [rankdir = LR, ranksep=2, fontname = "arial"];
     edge [arrowhead=none, fontname = "arial"];
     node [shape=record, style=rounded, fontname = "arial"];
 
-    X1[label="X1 | Molex KK 254 8-pin | female | {{GND|+5V|SCL|SDA|MISO|MOSI|SCK|N/C} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8}} "];
-    X2[label="X2 | Molex KK 254 4-pin | female | {{<p1>1|<p2>2|<p3>3|<p4>4} | {GND|+5V|SCL|SDA}}"];
-    X3[label="X3 | Molex KK 254 4-pin | female | {{<p1>1|<p2>2|<p3>3|<p4>4} | {GND|+5V|SCL|SDA}}"];
-    X4[label="X4 | Molex KK 254 5-pin | female | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5} | {GND|+12V|MISO|MOSI|SCK}}"];
-    X5[label="X5 | Molex Micro-Fit 2-pin | male | {{GND|+12V} | {<p1>1|<p2>2}} "];
 
-    W1[label="{4x | 0,14 mm² | 0.2 m} | <w1>BK|<w2>RD|<w3>YE|<w4>GN"];
-    W2[label="{4x | 0,14 mm² | 0.2 m} | <w1>BK|<w2>RD|<w3>YE|<w4>GN"];
-    W3[label="{4x | 0,14 mm² | 0.2 m} | <w1>BK|<w2>BU|<w3>OG|<w4>VT}"];
-    W4[label="{2x | 0,5 mm² | 0.35 m} | <w1>BK|<w2>RD"];
+X1[label="X1 | {Molex KK 254|female|8-pin} | {{GND|+5V|SCL|SDA|MISO|MOSI|SCK|N/C} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8}}}"]
 
-    {edge[style=bold]
-        // GND
-        {edge[color="#000000:#000000:#000000"]
-            X1:p1 -- W1:w1 -- X2:p1;
-            X1:p1 -- W2:w1 -- X3:p1;
-            X1:p1 -- W3:w1 -- X4:p1;
-            X5:p1 -- W4:W1 -- X4:p1;
-        }
+X2[label="X2 | {Molex KK 254|female|4-pin} | {{<p1>1|<p2>2|<p3>3|<p4>4} | {GND|+5V|SCL|SDA}}}"]
 
-        // +5V
-        {edge[color="#000000:#ff0000:#000000"]
-            X1:p2 -- W1:w2 -- X2:p2;
-            X1:p2 -- W2:w2 -- X3:p2;
-        }
+X3[label="X3 | {Molex KK 254|female|4-pin} | {{<p1>1|<p2>2|<p3>3|<p4>4} | {GND|+5V|SCL|SDA}}}"]
 
-        // +12V
-        {edge[color="#000000:#ff0000:#000000"] X5:p2 -- W4:w2 -- X4:p2; }
+X4[label="X4 | {Molex KK 254|female|5-pin} | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5} | {GND|+12V|MISO|MOSI|SCK}}}"]
 
-        // SCL
-        {edge[color="#000000:#ffff00:#000000"]
-            X1:p3 -- W1:w3 -- X2:p3;
-            X1:p3 -- W2:w3 -- X3:p3;
-        }
+X5[label="X5 | {Molex Micro-Fit|male|2-pin} | {{GND|+12V} | {<p1>1|<p2>2}}}"]
+
+W1[label="{4x|0.14 mm²|0.2 m} | {{<w1>BK|<w2>RD|<w3>YE|<w4>GN}}}"]
+
+{edge[style=bold]
+{edge[color="#000000:#000000:#000000"] X1:p1 -> W1:w1; W1:w1 -> X2:p1}
+{edge[color="#000000:#ff0000:#000000"] X1:p2 -> W1:w2; W1:w2 -> X2:p2}
+{edge[color="#000000:#ffff00:#000000"] X1:p3 -> W1:w3; W1:w3 -> X2:p3}
+{edge[color="#000000:#00ff00:#000000"] X1:p4 -> W1:w4; W1:w4 -> X2:p4}
+}
+W2[label="{4x|0.14 mm²|0.2 m} | {{<w1>BK|<w2>RD|<w3>YE|<w4>GN}}}"]
+
+{edge[style=bold]
+{edge[color="#000000:#000000:#000000"] X1:p1 -> W2:w1; W2:w1 -> X3:p1}
+{edge[color="#000000:#ff0000:#000000"] X1:p2 -> W2:w2; W2:w2 -> X3:p2}
+{edge[color="#000000:#ffff00:#000000"] X1:p3 -> W2:w3; W2:w3 -> X3:p3}
+{edge[color="#000000:#00ff00:#000000"] X1:p4 -> W2:w4; W2:w4 -> X3:p4}
+}
+W3[label="{4x|0.14 mm²|0.2 m} | {{<w1>BK|<w2>BU|<w3>OG|<w4>VT}}}"]
+
+{edge[style=bold]
+{edge[color="#000000:#000000:#000000"] X1:p1 -> W3:w1; W3:w1 -> X4:p1}
+{edge[color="#000000:#0000ff:#000000"] X1:p5 -> W3:w2; W3:w2 -> X4:p3}
+{edge[color="#000000:#ff8000:#000000"] X1:p6 -> W3:w3; W3:w3 -> X4:p4}
+{edge[color="#000000:#8000ff:#000000"] X1:p7 -> W3:w4; W3:w4 -> X4:p5}
+}
+W4[label="{2x|0.5 mm²|0.35 m} | {{<w1>BK|<w2>RD}}}"]
+
+{edge[style=bold]
+{edge[color="#000000:#000000:#000000"] X5:p1 -> W4:w1; W4:w1 -> X4:p1}
+{edge[color="#000000:#ff0000:#000000"] X5:p2 -> W4:w2; W4:w2 -> X4:p2}
+}
 
-        // SDA
-        {edge[color="#000000:#008000:#000000"]
-            X1:p4 -- W1:w4 -- X2:p4;
-            X1:p4 -- W2:w4 -- X3:p4;
-        }
 
-        // SPI
-        {edge[color="#000000:#0080ff:#000000"] X1:p5 -- W3:w2 -- X4:p3; }
-        {edge[color="#000000:#ff8000:#000000"] X1:p6 -- W3:w3 -- X4:p4; }
-        {edge[color="#000000:#8000ff:#000000"] X1:p7 -- W3:w4 -- X4:p5; }
-
-        // +12V
-    }
 }
diff --git a/idea/example2.png b/idea/example2.png
index 22885a4..79d9131 100644
Binary files a/idea/example2.png and b/idea/example2.png differ
diff --git a/readme.md b/readme.md
index 6cb0dfa..3f9e46a 100644
--- a/readme.md
+++ b/readme.md
@@ -26,24 +26,20 @@ WireViz input file:
 
     // define connectors
 
-    X1 [type="D-Sub DE-9",
-        subtype="female",
-        num_pins=9,
+    X1 [type="D-Sub",
+        gender="female",
         pin_labels="DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI",
-        position=L
        ]
 
-    X2 [type="Molex KK 254 6-pin",
-        subtype="female",
-        num_pins=6,
+    X2 [type="Molex KK 254",
+        gender="female",
         pin_labels="GND|RX|TX|NC|OUT|IN",
-        position=R
        ]
 
     // define wire
 
-    W1 [type="3x 0,25 mm² shielded",
-        length="0.2m",
+    W1 [mm2=0.25,
+        length=0.2,
         num_wires=3,
         colors="din47100",
         shield=true
@@ -68,18 +64,24 @@ GraphViz code generated by parser:
         edge [arrowhead=none, fontname = "arial"];
         node [shape=record, style=rounded, fontname = "arial"];
 
-        X1[label="X1 | D-Sub DE-9 | female | {{DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9}} "];
-        X2[label="X2 | Molex KK 254 6-pin | female | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6} | {GND|RX|TX|NC|OUT|IN}}"];
+    X1[label="X1 | {D-Sub DE-9|female|9-pin} | {{DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9}}}"]
+
+    X2[label="X2 | {Molex KK 254|female|6-pin} | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6} | {|||||}}}"]
+
+    {edge[style=bold]
+    X2:p5:w -> X2:p6:w
+    }
+
+    W1[label="W1 | {3x|0.25 mm²| + S|0.2 m} | {{<w1i>1|<w2i>2|<w3i>3|<wsi>} | {WH|BN|GN|Shield} | {<w1o>1|<w2o>2|<w3o>3|<wso>}}}"]
+
+    {edge[style=bold]
+    {edge[color="#000000:#ffffff:#000000"] X1:p5 -> W1:w1i; W1:w1o -> X2:p1}
+    {edge[color="#000000:#666600:#000000"] X1:p2 -> W1:w2i; W1:w2o -> X2:p3}
+    {edge[color="#000000:#00ff00:#000000"] X1:p3 -> W1:w3i; W1:w3o -> X2:p2}
+    {X1:p5 -> W1:wsi; }
+    }
 
-        W1[label="W1 | 3x 0,25 mm² shielded | 0.2 m | {{<w1i>1|<w2i>2|<w3i>3|<wsi>}|{WH|BN|GN|Shield}|{<w1o>1|<w2o>2|<w3o>3|<wsi>}}}"];
 
-        {edge[style=bold]
-            {edge[color="#000000:#ffffff:#000000"] X1:p5 -> W1:w1i; W1:w1o -> X2:p1; }
-            {edge[color="#000000:#666600:#000000"] X1:p2 -> W1:w2i; W1:w2o -> X2:p3; }
-            {edge[color="#000000:#00ff00:#000000"] X1:p3 -> W1:w3i; W1:w3o -> X2:p2; }
-            X1:p5 -> W1:wsi;
-            X2:p5:w -> X2:p6:w;
-        }
     }
 
 [Example 2](idea/example2.dot)
diff --git a/src/input/header.dot b/src/input/header.dot
index e3f1a79..294d5b4 100644
--- a/src/input/header.dot
+++ b/src/input/header.dot
@@ -1,3 +1,7 @@
+// Graph generated by WireViz
+// https://github.com/formatc1702/WireViz
+// Daniel Rojas - 2020
+
 digraph G {
     graph [rankdir = LR, ranksep=2, fontname = "arial"];
     edge [arrowhead=none, fontname = "arial"];
diff --git a/src/output/output_ex1.dot b/src/output/output_ex1.dot
index 65d4d93..da0ab50 100644
--- a/src/output/output_ex1.dot
+++ b/src/output/output_ex1.dot
@@ -1,23 +1,28 @@
+// Graph generated by WireViz
+// https://github.com/formatc1702/WireViz
+// Daniel Rojas - 2020
+
 digraph G {
     graph [rankdir = LR, ranksep=2, fontname = "arial"];
     edge [arrowhead=none, fontname = "arial"];
     node [shape=record, style=rounded, fontname = "arial"];
 
 
-X1[label="X1 | {{DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9}}}"]
+X1[label="X1 | {D-Sub DE-9|female|9-pin} | {{DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9}}}"]
 
-X2[label="X2 | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6} | {|||||}}}"]
+X2[label="X2 | {Molex KK 254|female|6-pin} | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6} | {|||||}}}"]
 
 {edge[style=bold]
 X2:p5:w -> X2:p6:w
 }
 
-W1[label="W1 | {{<w1i>1|<w2i>2|<w3i>3|<w4i>4} | {WH|BN|GN|Shield} | {<w1o>1|<w2o>2|<w3o>3|<w4o>4}}}"]
+W1[label="W1 | {3x|0.25 mm²| + S|0.2 m} | {{<w1i>1|<w2i>2|<w3i>3|<wsi>} | {WH|BN|GN|Shield} | {<w1o>1|<w2o>2|<w3o>3|<wso>}}}"]
 
 {edge[style=bold]
-{edge[color="#000000:#ffffff:#000000"] X1:p2 -> W1:w1i; W1:w1o -> X2:p1}
-{edge[color="#000000:#808000:#000000"] X1:p3 -> W1:w2i; W1:w2o -> X2:p3}
-{edge[color="#000000:#00ff00:#000000"] X1:p5 -> W1:w3i; W1:w3o -> X2:p2}
+{edge[color="#000000:#ffffff:#000000"] X1:p5 -> W1:w1i; W1:w1o -> X2:p1}
+{edge[color="#000000:#666600:#000000"] X1:p2 -> W1:w2i; W1:w2o -> X2:p3}
+{edge[color="#000000:#00ff00:#000000"] X1:p3 -> W1:w3i; W1:w3o -> X2:p2}
+{X1:p5 -> W1:wsi; }
 }
 
 
diff --git a/src/output/output_ex2.dot b/src/output/output_ex2.dot
index 0c25722..fa191bd 100644
--- a/src/output/output_ex2.dot
+++ b/src/output/output_ex2.dot
@@ -1,48 +1,52 @@
+// Graph generated by WireViz
+// https://github.com/formatc1702/WireViz
+// Daniel Rojas - 2020
+
 digraph G {
     graph [rankdir = LR, ranksep=2, fontname = "arial"];
     edge [arrowhead=none, fontname = "arial"];
     node [shape=record, style=rounded, fontname = "arial"];
 
 
-X1[label="X1 | {{GND|+5V|SCL|SDA|MISO|MOSI|SCK|N/C} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8}}}"]
+X1[label="X1 | {Molex KK 254|female|8-pin} | {{GND|+5V|SCL|SDA|MISO|MOSI|SCK|N/C} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8}}}"]
 
-X2[label="X2 | {{<p1>1|<p2>2|<p3>3|<p4>4} | {GND|+5V|SCL|SDA}}}"]
+X2[label="X2 | {Molex KK 254|female|4-pin} | {{<p1>1|<p2>2|<p3>3|<p4>4} | {GND|+5V|SCL|SDA}}}"]
 
-X3[label="X3 | {{<p1>1|<p2>2|<p3>3|<p4>4} | {GND|+5V|SCL|SDA}}}"]
+X3[label="X3 | {Molex KK 254|female|4-pin} | {{<p1>1|<p2>2|<p3>3|<p4>4} | {GND|+5V|SCL|SDA}}}"]
 
-X4[label="X4 | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5} | {GND|+12V|MISO|MOSI|SCK}}}"]
+X4[label="X4 | {Molex KK 254|female|5-pin} | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5} | {GND|+12V|MISO|MOSI|SCK}}}"]
 
-X5[label="X5 | {{GND|+12V} | {<p1>1|<p2>2}}}"]
+X5[label="X5 | {Molex Micro-Fit|male|2-pin} | {{GND|+12V} | {<p1>1|<p2>2}}}"]
 
-W1[label="{{<w1i>1|<w2i>2|<w3i>3|<w4i>4} | {BK|RD|YE|GN} | {<w1o>1|<w2o>2|<w3o>3|<w4o>4}}}"]
+W1[label="{4x|0.14 mm²|0.2 m} | {{<w1>BK|<w2>RD|<w3>YE|<w4>GN}}}"]
 
 {edge[style=bold]
-{edge[color="#000000:#000000:#000000"] X1:p1 -> W1:w1i; W1:w1o -> X2:p1}
-{edge[color="#000000:#ff0000:#000000"] X1:p2 -> W1:w2i; W1:w2o -> X2:p2}
-{edge[color="#000000:#ffff00:#000000"] X1:p3 -> W1:w3i; W1:w3o -> X2:p3}
-{edge[color="#000000:#00ff00:#000000"] X1:p4 -> W1:w4i; W1:w4o -> X2:p4}
+{edge[color="#000000:#000000:#000000"] X1:p1 -> W1:w1; W1:w1 -> X2:p1}
+{edge[color="#000000:#ff0000:#000000"] X1:p2 -> W1:w2; W1:w2 -> X2:p2}
+{edge[color="#000000:#ffff00:#000000"] X1:p3 -> W1:w3; W1:w3 -> X2:p3}
+{edge[color="#000000:#00ff00:#000000"] X1:p4 -> W1:w4; W1:w4 -> X2:p4}
 }
-W2[label="{{<w1i>1|<w2i>2|<w3i>3|<w4i>4} | {BK|RD|YE|GN} | {<w1o>1|<w2o>2|<w3o>3|<w4o>4}}}"]
+W2[label="{4x|0.14 mm²|0.2 m} | {{<w1>BK|<w2>RD|<w3>YE|<w4>GN}}}"]
 
 {edge[style=bold]
-{edge[color="#000000:#000000:#000000"] X1:p1 -> W2:w1i; W2:w1o -> X3:p1}
-{edge[color="#000000:#ff0000:#000000"] X1:p2 -> W2:w2i; W2:w2o -> X3:p2}
-{edge[color="#000000:#ffff00:#000000"] X1:p3 -> W2:w3i; W2:w3o -> X3:p3}
-{edge[color="#000000:#00ff00:#000000"] X1:p4 -> W2:w4i; W2:w4o -> X3:p4}
+{edge[color="#000000:#000000:#000000"] X1:p1 -> W2:w1; W2:w1 -> X3:p1}
+{edge[color="#000000:#ff0000:#000000"] X1:p2 -> W2:w2; W2:w2 -> X3:p2}
+{edge[color="#000000:#ffff00:#000000"] X1:p3 -> W2:w3; W2:w3 -> X3:p3}
+{edge[color="#000000:#00ff00:#000000"] X1:p4 -> W2:w4; W2:w4 -> X3:p4}
 }
-W3[label="{{<w1i>1|<w2i>2|<w3i>3|<w4i>4} | {BK|BU|OG|VT} | {<w1o>1|<w2o>2|<w3o>3|<w4o>4}}}"]
+W3[label="{4x|0.14 mm²|0.2 m} | {{<w1>BK|<w2>BU|<w3>OG|<w4>VT}}}"]
 
 {edge[style=bold]
-{edge[color="#000000:#000000:#000000"] X1:p1 -> W3:w1i; W3:w1o -> X4:p1}
-{edge[color="#000000:#0000ff:#000000"] X1:p5 -> W3:w2i; W3:w2o -> X4:p3}
-{edge[color="#000000:#ff8000:#000000"] X1:p6 -> W3:w3i; W3:w3o -> X4:p4}
-{edge[color="#000000:#8000ff:#000000"] X1:p7 -> W3:w4i; W3:w4o -> X4:p5}
+{edge[color="#000000:#000000:#000000"] X1:p1 -> W3:w1; W3:w1 -> X4:p1}
+{edge[color="#000000:#0000ff:#000000"] X1:p5 -> W3:w2; W3:w2 -> X4:p3}
+{edge[color="#000000:#ff8000:#000000"] X1:p6 -> W3:w3; W3:w3 -> X4:p4}
+{edge[color="#000000:#8000ff:#000000"] X1:p7 -> W3:w4; W3:w4 -> X4:p5}
 }
-W4[label="{{<w1i>1|<w2i>2} | {BK|RD} | {<w1o>1|<w2o>2}}}"]
+W4[label="{2x|0.5 mm²|0.35 m} | {{<w1>BK|<w2>RD}}}"]
 
 {edge[style=bold]
-{edge[color="#000000:#000000:#000000"] X5:p1 -> W4:w1i; W4:w1o -> X4:p1}
-{edge[color="#000000:#ff0000:#000000"] X5:p2 -> W4:w2i; W4:w2o -> X4:p2}
+{edge[color="#000000:#000000:#000000"] X5:p1 -> W4:w1; W4:w1 -> X4:p1}
+{edge[color="#000000:#ff0000:#000000"] X5:p2 -> W4:w2; W4:w2 -> X4:p2}
 }
 
 
diff --git a/src/output/output_ex3.dot b/src/output/output_ex3.dot
index 2c5ec43..263bb47 100644
--- a/src/output/output_ex3.dot
+++ b/src/output/output_ex3.dot
@@ -1,44 +1,48 @@
+// Graph generated by WireViz
+// https://github.com/formatc1702/WireViz
+// Daniel Rojas - 2020
+
 digraph G {
     graph [rankdir = LR, ranksep=2, fontname = "arial"];
     edge [arrowhead=none, fontname = "arial"];
     node [shape=record, style=rounded, fontname = "arial"];
 
 
-X1[label="X1 | {{|||||||||} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9|<p10>10}}}"]
+X1[label="X1 | {10-pin} | {{|||||||||} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9|<p10>10}}}"]
 
-X2[label="X2 | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9|<p10>10} | {|||||||||}}}"]
+X2[label="X2 | {10-pin} | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9|<p10>10} | {|||||||||}}}"]
 
-W1[label="{{<w1i>1|<w2i>2|<w3i>3|<w4i>4|<w5i>5|<w6i>6|<w7i>7|<w8i>8|<w9i>9|<w10i>10} | {BN|RD|OG|YE|GN|BU|VT|GY|WH|BK} | {<w1o>1|<w2o>2|<w3o>3|<w4o>4|<w5o>5|<w6o>6|<w7o>7|<w8o>8|<w9o>9|<w10o>10}}}"]
+W1[label="{10x} | {{<w1>BN|<w2>RD|<w3>OG|<w4>YE|<w5>GN|<w6>BU|<w7>VT|<w8>GY|<w9>WH|<w10>BK}}}"]
 
 {edge[style=bold]
-{edge[color="#000000:#808000:#000000"] X1:p1 -> W1:w1i; W1:w1o -> X2:p1}
-{edge[color="#000000:#ff0000:#000000"] X1:p2 -> W1:w2i; W1:w2o -> X2:p2}
-{edge[color="#000000:#ff8000:#000000"] X1:p3 -> W1:w3i; W1:w3o -> X2:p3}
-{edge[color="#000000:#ffff00:#000000"] X1:p4 -> W1:w4i; W1:w4o -> X2:p4}
-{edge[color="#000000:#00ff00:#000000"] X1:p5 -> W1:w5i; W1:w5o -> X2:p5}
-{edge[color="#000000:#0000ff:#000000"] X1:p6 -> W1:w6i; W1:w6o -> X2:p6}
-{edge[color="#000000:#8000ff:#000000"] X1:p7 -> W1:w7i; W1:w7o -> X2:p7}
-{edge[color="#000000:#808080:#000000"] X1:p8 -> W1:w8i; W1:w8o -> X2:p8}
-{edge[color="#000000:#ffffff:#000000"] X1:p9 -> W1:w9i; W1:w9o -> X2:p9}
-{edge[color="#000000:#000000:#000000"] X1:p10 -> W1:w10i; W1:w10o -> X2:p10}
+{edge[color="#000000:#666600:#000000"] X1:p1 -> W1:w1; W1:w1 -> X2:p1}
+{edge[color="#000000:#ff0000:#000000"] X1:p2 -> W1:w2; W1:w2 -> X2:p2}
+{edge[color="#000000:#ff8000:#000000"] X1:p3 -> W1:w3; W1:w3 -> X2:p3}
+{edge[color="#000000:#ffff00:#000000"] X1:p4 -> W1:w4; W1:w4 -> X2:p4}
+{edge[color="#000000:#00ff00:#000000"] X1:p5 -> W1:w5; W1:w5 -> X2:p5}
+{edge[color="#000000:#0000ff:#000000"] X1:p6 -> W1:w6; W1:w6 -> X2:p6}
+{edge[color="#000000:#8000ff:#000000"] X1:p7 -> W1:w7; W1:w7 -> X2:p7}
+{edge[color="#000000:#808080:#000000"] X1:p8 -> W1:w8; W1:w8 -> X2:p8}
+{edge[color="#000000:#ffffff:#000000"] X1:p9 -> W1:w9; W1:w9 -> X2:p9}
+{edge[color="#000000:#000000:#000000"] X1:p10 -> W1:w10; W1:w10 -> X2:p10}
 }
-X3[label="X3 | {{|||||||||} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9|<p10>10}}}"]
+X3[label="X3 | {10-pin} | {{|||||||||} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9|<p10>10}}}"]
 
-X4[label="X4 | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9|<p10>10} | {|||||||||}}}"]
+X4[label="X4 | {10-pin} | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9|<p10>10} | {|||||||||}}}"]
 
-W2[label="{{<w1i>1|<w2i>2|<w3i>3|<w4i>4|<w5i>5|<w6i>6|<w7i>7|<w8i>8|<w9i>9|<w10i>10} | {WH|BN|GN|YE|GY|PK|BU|RD|BK|VT} | {<w1o>1|<w2o>2|<w3o>3|<w4o>4|<w5o>5|<w6o>6|<w7o>7|<w8o>8|<w9o>9|<w10o>10}}}"]
+W2[label="{10x} | {{<w1>WH|<w2>BN|<w3>GN|<w4>YE|<w5>GY|<w6>PK|<w7>BU|<w8>RD|<w9>BK|<w10>VT}}}"]
 
 {edge[style=bold]
-{edge[color="#000000:#ffffff:#000000"] X3:p1 -> W2:w1i; W2:w1o -> X4:p1}
-{edge[color="#000000:#808000:#000000"] X3:p2 -> W2:w2i; W2:w2o -> X4:p2}
-{edge[color="#000000:#00ff00:#000000"] X3:p3 -> W2:w3i; W2:w3o -> X4:p3}
-{edge[color="#000000:#ffff00:#000000"] X3:p4 -> W2:w4i; W2:w4o -> X4:p4}
-{edge[color="#000000:#808080:#000000"] X3:p5 -> W2:w5i; W2:w5o -> X4:p5}
-{edge[color="#000000:#ff80c0:#000000"] X3:p6 -> W2:w6i; W2:w6o -> X4:p6}
-{edge[color="#000000:#0000ff:#000000"] X3:p7 -> W2:w7i; W2:w7o -> X4:p7}
-{edge[color="#000000:#ff0000:#000000"] X3:p8 -> W2:w8i; W2:w8o -> X4:p8}
-{edge[color="#000000:#000000:#000000"] X3:p9 -> W2:w9i; W2:w9o -> X4:p9}
-{edge[color="#000000:#8000ff:#000000"] X3:p10 -> W2:w10i; W2:w10o -> X4:p10}
+{edge[color="#000000:#ffffff:#000000"] X3:p1 -> W2:w1; W2:w1 -> X4:p1}
+{edge[color="#000000:#666600:#000000"] X3:p2 -> W2:w2; W2:w2 -> X4:p2}
+{edge[color="#000000:#00ff00:#000000"] X3:p3 -> W2:w3; W2:w3 -> X4:p3}
+{edge[color="#000000:#ffff00:#000000"] X3:p4 -> W2:w4; W2:w4 -> X4:p4}
+{edge[color="#000000:#808080:#000000"] X3:p5 -> W2:w5; W2:w5 -> X4:p5}
+{edge[color="#000000:#ff80c0:#000000"] X3:p6 -> W2:w6; W2:w6 -> X4:p6}
+{edge[color="#000000:#0000ff:#000000"] X3:p7 -> W2:w7; W2:w7 -> X4:p7}
+{edge[color="#000000:#ff0000:#000000"] X3:p8 -> W2:w8; W2:w8 -> X4:p8}
+{edge[color="#000000:#000000:#000000"] X3:p9 -> W2:w9; W2:w9 -> X4:p9}
+{edge[color="#000000:#8000ff:#000000"] X3:p10 -> W2:w10; W2:w10 -> X4:p10}
 }
 
 
diff --git a/src/test.py b/src/test.py
index ee2b8da..2752bda 100644
--- a/src/test.py
+++ b/src/test.py
@@ -1,16 +1,17 @@
 import wireviz
 
-PINOUT_SERIAL = ('DCD','RX','TX','DTR','GND','DSR','RTS','CTS','RI')
 
 PINOUT_I2C = ('GND','+5V','SCL','SDA')
 COLORS_I2C = ('BK', 'RD', 'YE', 'GN')
 
 PINOUT_SPI_DATAONLY = ('MISO','MOSI','SCK')
 
+wireviz.color_mode = 'SHORT' # short/SHORT/full/FULL/hex/HEX
+
 # example 1
-X1 = wireviz.Node("X1", pinout=PINOUT_SERIAL, ports_right=True)
-X2 = wireviz.Node("X2", num_pins=6, ports_left=True)
-W1 = wireviz.Cable("W1", show_name=True, num_wires=3, color_code="DIN", shield=True)
+X1 = wireviz.Node('X1', type='D-Sub', gender='female', pinout=('DCD','RX','TX','DTR','GND','DSR','RTS','CTS','RI'), ports_right=True)
+X2 = wireviz.Node('X2', type='Molex KK 254', gender='female', pinout=('GND','RX','TX','NC','OUT','IN'), ports_left=True)
+W1 = wireviz.Cable('W1', mm2=0.25, length=0.2, show_name=True, show_pinout=True, num_wires=3, color_code='DIN', shield=True)
 # Option 1: define wires and shield in one line
 # W1.connect(X1,(5,2,3,5),(1,2,3,'s'),X2,(1,3,2,None))
 # Option 2: define wires and shield separately
@@ -20,7 +21,7 @@ X2.loop(5,6)
 objects = [X1, X2, W1]
 
 # example 2
-# X1 = wireviz.Node("X1", pinout=(
+# X1 = wireviz.Node('X1',type='Molex KK 254', gender='female',  pinout=(
 # 'GND',
 # '+5V',
 # 'SCL',
@@ -30,14 +31,14 @@ objects = [X1, X2, W1]
 # 'SCK',
 # 'N/C'
 # ), ports_right=True)
-# X2 = wireviz.Node("X2", pinout=PINOUT_I2C, ports_left=True)
-# X3 = wireviz.Node("X3", pinout=PINOUT_I2C, ports_left=True)
-# X4 = wireviz.Node("X4", pinout=('GND','+12V')+PINOUT_SPI_DATAONLY, ports_left=True)
-# X5 = wireviz.Node("X5", pinout=('GND','+12V'), ports_right=True)
-# W1 = wireviz.Cable("W1", colors=COLORS_I2C)
-# W2 = wireviz.Cable("W2", colors=COLORS_I2C)
-# W3 = wireviz.Cable("W3", colors=('BK','BU','OG','VT'))
-# W4 = wireviz.Cable("W4", colors=('BK','RD'))
+# X2 = wireviz.Node('X2', type='Molex KK 254', gender='female', pinout=PINOUT_I2C, ports_left=True)
+# X3 = wireviz.Node('X3', type='Molex KK 254', gender='female', pinout=PINOUT_I2C, ports_left=True)
+# X4 = wireviz.Node('X4', type='Molex KK 254', gender='female', pinout=('GND','+12V')+PINOUT_SPI_DATAONLY, ports_left=True)
+# X5 = wireviz.Node('X5', type='Molex Micro-Fit', gender='male', pinout=('GND','+12V'), ports_right=True)
+# W1 = wireviz.Cable('W1', mm2=0.14, length=0.2, colors=COLORS_I2C)
+# W2 = wireviz.Cable('W2', mm2=0.14, length=0.2, colors=COLORS_I2C)
+# W3 = wireviz.Cable('W3', mm2=0.14, length=0.2, colors=('BK','BU','OG','VT'))
+# W4 = wireviz.Cable('W4', mm2=0.5, length=0.35, colors=('BK','RD'))
 # W1.connect(X1,(1,2,3,4),'auto',X2,'auto')
 # W2.connect(X1,(1,2,3,4),'auto',X3,'auto')
 # W3.connect(X1,(1,5,6,7),'auto',X4,(1,3,4,5))
@@ -45,13 +46,13 @@ objects = [X1, X2, W1]
 # objects = [X1, X2, X3, X4, X5, W1, W2, W3, W4]
 
 # example 3
-# X1 = wireviz.Node("X1", num_pins=10, ports_right=True)
-# X2 = wireviz.Node("X2", num_pins=10, ports_left=True)
-# W1 = wireviz.Cable("W1", num_wires=10, color_code="IEC")
+# X1 = wireviz.Node('X1', num_pins=10, ports_right=True)
+# X2 = wireviz.Node('X2', num_pins=10, ports_left=True)
+# W1 = wireviz.Cable('W1', num_wires=10, color_code='IEC')
 # W1.connect_all_straight(X1,X2)
-# X3 = wireviz.Node("X3", num_pins=10, ports_right=True)
-# X4 = wireviz.Node("X4", num_pins=10, ports_left=True)
-# W2 = wireviz.Cable("W2", num_wires=10, color_code="DIN")
+# X3 = wireviz.Node('X3', num_pins=10, ports_right=True)
+# X4 = wireviz.Node('X4', num_pins=10, ports_left=True)
+# W2 = wireviz.Cable('W2', num_wires=10, color_code='DIN')
 # W2.connect_all_straight(X3,X4)
 # objects = [X1, X2, W1, X3, X4, W2]
 
diff --git a/src/wireviz.py b/src/wireviz.py
index 1780e96..b63dae9 100644
--- a/src/wireviz.py
+++ b/src/wireviz.py
@@ -2,34 +2,55 @@
 COLOR_CODE_DIN = ['WH','BN','GN','YE','GY','PK','BU','RD','BK','VT']
 COLOR_CODE_IEC = ['BN','RD','OG','YE','GN','BU','VT','GY','WH','BK']
 
-color_dict = {'BK': '#000000',
-              'WH': '#ffffff',
-              'GY': '#808080',
-              'PK': '#ff80c0',
-              'RD': '#ff0000',
-              'OG': '#ff8000',
-              'YE': '#ffff00',
-              'GN': '#00ff00',
-              'TQ': '#00ffff',
-              'BU': '#0000ff',
-              'VT': '#8000ff',
-              'BN': '#666600',
+color_hex = {
+             'BK': '#000000',
+             'WH': '#ffffff',
+             'GY': '#808080',
+             'PK': '#ff80c0',
+             'RD': '#ff0000',
+             'OG': '#ff8000',
+             'YE': '#ffff00',
+             'GN': '#00ff00',
+             'TQ': '#00ffff',
+             'BU': '#0000ff',
+             'VT': '#8000ff',
+             'BN': '#666600',
               }
 
+color_full = {
+             'BK': 'black',
+             'WH': 'white',
+             'GY': 'grey',
+             'PK': 'pink',
+             'RD': 'red',
+             'OG': 'orange',
+             'YE': 'yellow',
+             'GN': 'green',
+             'TQ': 'turquoise',
+             'BU': 'blue',
+             'VT': 'violet',
+             'BN': 'brown',
+}
+
+color_mode = 'SHORT'
+
 class Node:
 
-    def __init__(self, name, num_pins=None, pinout=None, ports_left=False, ports_right=False):
+    def __init__(self, name, type=None, gender=None, show_name=True, num_pins=None, pinout=None, ports_left=False, ports_right=False):
         self.name = name
+        self.type = type
+        self.gender = gender
+        self.show_name = show_name
         self.ports_left = ports_left
         self.ports_right = ports_right
         self.loops = []
 
         if pinout is None:
-            self.pinout = ("",) * num_pins
+            self.pinout = ('',) * num_pins
         else:
             if num_pins is None:
                 if pinout is None:
-                    raise Exception("Must provide num_pins or pinout")
+                    raise Exception('Must provide num_pins or pinout')
                 else:
                     self.pinout = pinout
 
@@ -40,21 +61,38 @@ class Node:
             loop_side = 'e' # east = right
         elif self.ports_left == True and self.ports_right == True:
             if side == None:
-                raise Exception("Must specify side of loop")
+                raise Exception('Must specify side of loop')
             else:
                 loop_side = side
         self.loops.append((from_pin, to_pin, loop_side))
 
     def __repr__(self):
-        return "{} = {} {}".format(self.name, len(self.pinout), self.pinout)
+        return '{} = {} {}'.format(self.name, len(self.pinout), self.pinout)
 
     def __str__(self):
-        return "{}".format(self.name)
+        return '{}'.format(self.name)
 
     def graphviz(self):
         s = ''
         # print header
-        s = s + '{name}[label="{name} | {{'.format(name=self.name)
+
+        s = s + '{name}[label="'.format(name=self.name)
+
+        if self.show_name == True:
+            s = s + '{name} | '.format(name=self.name)
+
+        s = s + '{'
+        l = []
+        if self.type is not None:
+            l.append('{}'.format(self.type))
+        if self.gender is not None:
+            l.append('{}'.format(self.gender))
+        l.append('{}-pin'.format(len(self.pinout)))
+        if len(l) > 0:
+            s = s + '|'.join(l)
+        s = s + '} | '
+
+        s = s + '{'
         # print pinout
         if self.ports_left == True:
             s = s + '{'
@@ -90,32 +128,34 @@ class Node:
 
 class Cable:
 
-    def __init__(self, name, show_name=False, num_wires=None, colors=None, color_code=None, shield=False):
+    def __init__(self, name, mm2=0, awg=0, length=0, show_name=False, show_pinout=False, num_wires=None, colors=None, color_code=None, shield=False):
         self.name = name
+        self.mm2 = mm2
+        self.awg = awg
+        self.length = length
         self.show_name = show_name
+        self.show_pinout = show_pinout
         self.shield = shield
         self.connections = []
         if color_code is None and colors is None:
-            self.colors = ("",) * num_wires
+            self.colors = ('',) * num_wires
         else:
             if colors is None:
                 if num_wires is None:
-                    raise Exception("Unknown number of wires")
+                    raise Exception('Unknown number of wires')
                 else:
                     # TODO: Loop through colors if num_wires > len(COLOR_CODE_XXX)
-                    if color_code == "DIN":
+                    if color_code == 'DIN':
                         self.colors = tuple(COLOR_CODE_DIN[:num_wires])
-                    elif color_code == "IEC":
+                    elif color_code == 'IEC':
                         self.colors = tuple(COLOR_CODE_IEC[:num_wires])
                     else:
-                        raise Exception("Unknown color code")
+                        raise Exception('Unknown color code')
             else:
                 if num_wires is None:
                     self.colors = colors
                 else:
                     self.colors = colors[:num_wires]
-        # if shield == True:
-        #     self.colors = self.colors + ('Shield',)
 
     def connect(self, from_name, from_pin, via, to_name, to_pin):
         if from_pin == 'auto':
@@ -125,7 +165,7 @@ class Cable:
         if to_pin == 'auto':
             to_pin = tuple(x+1 for x in range(len(self.colors)))
         if len(from_pin) != len(to_pin):
-            raise Exception("from_pin must have the same number of elements as to_pin")
+            raise Exception('from_pin must have the same number of elements as to_pin')
         for i, x in enumerate(from_pin):
             self.connections.append((from_name, from_pin[i], via[i], to_name, to_pin[i]))
 
@@ -133,7 +173,7 @@ class Cable:
         self.connect(from_name, 'auto', 'auto', to_name, 'auto')
 
     def __repr__(self):
-        return "{} = {} {}\n     {}".format(self.name, len(self.colors), self.colors, self.connections)
+        return '{} = {} {}\n     {}'.format(self.name, len(self.colors), self.colors, self.connections)
 
     def debug(self):
         print(self.name)
@@ -145,7 +185,7 @@ class Cable:
                 else:
                     s = '--'
                 # print(self.colors(x[2]) if i < len(self.colors) else '-')
-                print("{}:{} -- {}({}) -> {}:{}".format(x[0],x[1],x[2],s,x[3],x[4]))
+                print('{}:{} -- {}({}) -> {}:{}'.format(x[0],x[1],x[2],s,x[3],x[4]))
 
     def graphviz(self):
         s = ''
@@ -155,46 +195,87 @@ class Cable:
         if self.show_name == True:
             s = s + '{name} | '.format(name=self.name)
 
-        s = s + '{'
-        # print pinout
+        #print parameters
         s = s + '{'
         l = []
-        for i,x in enumerate(self.colors,1):
-            l.append('<w{wireno}i>{wireno}'.format(wireno=i))
-        s = s + '|'.join(l)
+        l.append('{}x'.format(len(self.colors)))
+        if self.mm2 > 0:
+            l.append('{} mm²'.format(self.mm2))
+        if self.awg > 0:
+            l.append('{} AWG'.format(self.awg))
         if self.shield == True:
-            s = s + '|<wsi>'
+            l.append(' + S')
+        if self.length > 0:
+            l.append('{} m'.format(self.length))
+        if len(l) > 0:
+            s = s + '|'.join(l)
         s = s + '} | '
 
         s = s + '{'
-        s = s + '|'.join(self.colors)
-        if self.shield == True:
-            s = s + '|Shield'
+        # print pinout
+        if self.show_pinout:
+            s = s + '{'
+            l = []
+            for i,x in enumerate(self.colors,1):
+                l.append('<w{wireno}i>{wireno}'.format(wireno=i))
+            s = s + '|'.join(l)
+            if self.shield == True:
+                s = s + '|<wsi>'
+            s = s + '} | '
+
+        s = s + '{'
+        if self.show_pinout:
+            s = s + '|'.join(self.colors)
+            if self.shield == True:
+                s = s + '|Shield'
+        else:
+            l = []
+            for i,x in enumerate(self.colors,1):
+                if color_mode == 'full':
+                    x = color_full[x].lower()
+                elif color_mode == 'FULL':
+                    x = color_hex[x].upper()
+                elif color_mode == 'hex':
+                    x = color_hex[x].lower()
+                elif color_mode == 'HEX':
+                    x = color_hex[x].upper()
+                elif color_mode == 'short':
+                    x = x.lower()
+                elif color_mode == 'SHORT':
+                    x = x.upper()
+                else:
+                    raise Exception('Unknown color mode')
+                l.append('<w{wireno}>{wirecolor}'.format(wireno=i,wirecolor=x))
+            s = s + '|'.join(l)
+            if self.shield == True:
+                s = s + '|<ws>Shield'
         s = s + '}'
 
-        s = s + ' | {'
-        l = []
-        for i,x in enumerate(self.colors,1):
-            l.append('<w{wireno}o>{wireno}'.format(wireno=i))
-        s = s + '|'.join(l)
-        if self.shield == True:
-            s = s + '|<wso>'
-        s = s + '}'
+        if self.show_pinout:
+            s = s + ' | {'
+            l = []
+            for i,x in enumerate(self.colors,1):
+                l.append('<w{wireno}o>{wireno}'.format(wireno=i))
+            s = s + '|'.join(l)
+            if self.shield == True:
+                s = s + '|<wso>'
+            s = s + '}'
 
         s = s + '}}"]'
 
+        # print connections
         s = s + '\n\n{edge[style=bold]\n'
         for x in self.connections:
             s = s + '{'
             if isinstance(x[2], int):
                 search_color = self.colors[x[2]-1]
-                if search_color in color_dict:
-                    s = s + 'edge[color="#000000:{wire_color}:#000000"] '.format(wire_color=color_dict[search_color])
+                if search_color in color_hex:
+                    s = s + 'edge[color="#000000:{wire_color}:#000000"] '.format(wire_color=color_hex[search_color])
             if x[1] is not None:
-                t = '{from_name}:p{from_port} -> {via_name}:w{via_wire}i; '.format(from_name=x[0],from_port=x[1],via_name=self.name, via_wire=x[2])
+                t = '{from_name}:p{from_port} -> {via_name}:w{via_wire}{via_subport}; '.format(from_name=x[0],from_port=x[1],via_name=self.name, via_wire=x[2], via_subport='i' if self.show_pinout == True else '')
                 s = s + t
             if x[4] is not None:
-                t = '{via_name}:w{via_wire}o -> {to_name}:p{to_port}'.format(via_name=self.name, via_wire=x[2],to_name=x[3],to_port=x[4])
+                t = '{via_name}:w{via_wire}{via_subport} -> {to_name}:p{to_port}'.format(via_name=self.name, via_wire=x[2],to_name=x[3],to_port=x[4], via_subport='o' if self.show_pinout == True else '')
                 s = s + t
             s = s + '}\n'
         s = s + '}'
diff --git a/todo.md b/todo.md
new file mode 100644
index 0000000..58cc6a1
--- /dev/null
+++ b/todo.md
@@ -0,0 +1,9 @@
+# To do
+
+* Automate creation of left/right side ports for connectors
+* Add simple connectors (ferrules, cable lugs)
+  * no pinout
+  * graphical representation?
+* Add support for cable splicing (as connector type)
+* Display picture of connector underneath (including pin 1 location)
+* Create parser (to make WireViz work as a GraphViz extension)