From a50090344160b450388b6a2b233323c138b146aa Mon Sep 17 00:00:00 2001 From: Visa Tuominen Date: Tue, 16 Aug 2022 14:32:06 +0300 Subject: [PATCH] add `loop_side` to Connector --- src/wireviz/DataClasses.py | 1 + 1 file changed, 1 insertion(+) diff --git a/src/wireviz/DataClasses.py b/src/wireviz/DataClasses.py index 46cb996..0cdd3a1 100644 --- a/src/wireviz/DataClasses.py +++ b/src/wireviz/DataClasses.py @@ -142,6 +142,7 @@ class Connector: hide_disconnected_pins: bool = False autogenerate: bool = False loops: List[List[Pin]] = field(default_factory=list) + loop_side: Optional[str] = None ignore_in_bom: bool = False additional_components: List[AdditionalComponent] = field(default_factory=list)