diff --git a/examples/ex07.bom.tsv b/examples/ex07.bom.tsv new file mode 100644 index 0000000..ff4b2d7 --- /dev/null +++ b/examples/ex07.bom.tsv @@ -0,0 +1,4 @@ +Item Qty Unit Designators +Connector, D-Sub, female, 9 pins 1 X2 +Connector, TE 776164-1, female, 35 pins 1 X1 +Cable, 2 x 20 AWG 1 m C1 diff --git a/examples/ex07.gv b/examples/ex07.gv new file mode 100644 index 0000000..80d892d --- /dev/null +++ b/examples/ex07.gv @@ -0,0 +1,16 @@ +graph { +// Graph generated by WireViz +// https://github.com/formatc1702/WireViz + graph [bgcolor=white fontname=arial nodesep=0.33 rankdir=LR ranksep=2] + node [fillcolor=white fontname=arial shape=record style=filled] + edge [fontname=arial style=bold] + X1 [label="X1|{TE 776164-1|female|35-pin}|{{5|6}}"] + X2 [label="X2|{D-Sub|female|9-pin}|{{2|7}}"] + edge [color="#000000:#ffff00:#000000"] + X1:p5r:e -- C1:w1:w + C1:w1:e -- X2:p7l:w + edge [color="#000000:#00ff00:#000000"] + X1:p6r:e -- C1:w2:w + C1:w2:e -- X2:p2l:w + C1 [label=<
C1
2x20 AWG1 m
 
X1:5YEX2:7
X1:6GNX2:2
 
> fillcolor=white margin=0 shape=box style=""] +} diff --git a/examples/ex07.html b/examples/ex07.html new file mode 100644 index 0000000..6544c47 --- /dev/null +++ b/examples/ex07.html @@ -0,0 +1,101 @@ +

Diagram

+ + + + + +%3 + + + +X1 + +X1 + +TE 776164-1 + +female + +35-pin + +5 + +6 + + + +C1 + + +C1 + +2x + +20 AWG + +1 m +  +X1:5 +YE +X2:7 + + + +X1:6 +GN +X2:2 + + + +  + + + +X1:e--C1:w + + + + + + +X1:e--C1:w + + + + + + +X2 + +X2 + +D-Sub + +female + +9-pin + +2 + +7 + + + +C1:e--X2:w + + + + + + +C1:e--X2:w + + + + + + +

Bill of Materials

ItemQtyUnitDesignators
Connector, D-Sub, female, 9 pins1X2
Connector, TE 776164-1, female, 35 pins1X1
Cable, 2 x 20 AWG1mC1
\ No newline at end of file diff --git a/examples/ex07.png b/examples/ex07.png new file mode 100644 index 0000000..4d7cb78 Binary files /dev/null and b/examples/ex07.png differ diff --git a/examples/ex07.svg b/examples/ex07.svg new file mode 100644 index 0000000..95e040e --- /dev/null +++ b/examples/ex07.svg @@ -0,0 +1,100 @@ + + + + + + +%3 + + + +X1 + +X1 + +TE 776164-1 + +female + +35-pin + +5 + +6 + + + +C1 + + +C1 + +2x + +20 AWG + +1 m +  +X1:5 +YE +X2:7 + + + +X1:6 +GN +X2:2 + + + +  + + + +X1:e--C1:w + + + + + + +X1:e--C1:w + + + + + + +X2 + +X2 + +D-Sub + +female + +9-pin + +2 + +7 + + + +C1:e--X2:w + + + + + + +C1:e--X2:w + + + + + + diff --git a/examples/ex07.yml b/examples/ex07.yml new file mode 100644 index 0000000..064122d --- /dev/null +++ b/examples/ex07.yml @@ -0,0 +1,25 @@ +connectors: + X1: + type: TE 776164-1 + subtype: female + hide_disconnected_pins: True + pincount: 35 + + X2: + type: D-Sub + subtype: female + pincount: 9 + hide_disconnected_pins: True + +cables: + C1: + wirecount: 2 + gauge: 20 AWG + colors: [YE, GN] + length: 1 + +connections: + - + - X1: [5,6] + - C1: [1,2] + - X2: [7,2] \ No newline at end of file diff --git a/examples/readme.md b/examples/readme.md index 5330f73..6ddef6f 100644 --- a/examples/readme.md +++ b/examples/readme.md @@ -35,3 +35,9 @@ [Source](ex06.yml) - [Bill of Materials](ex06.bom.tsv) +## Example 07 +![](ex07.png) + +[Source](ex07.yml) - [Bill of Materials](ex07.bom.tsv) + + diff --git a/src/batch.py b/src/batch.py index 300cd84..56e752c 100644 --- a/src/batch.py +++ b/src/batch.py @@ -2,7 +2,7 @@ import wireviz import os demos = 0 # 2 -examples = 0 # 6 +examples = 0 # 7 tutorials = 7 # 7 if demos: diff --git a/src/wireviz.py b/src/wireviz.py index afe825d..7ae27c9 100755 --- a/src/wireviz.py +++ b/src/wireviz.py @@ -27,6 +27,10 @@ class Harness: def connect(self, from_name, from_pin, via_name, via_pin, to_name, to_pin): self.cables[via_name].connect(from_name, from_pin, via_pin, to_name, to_pin) + if from_name in self.connectors: + self.connectors[from_name].activate_pin(from_pin) + if to_name in self.connectors: + self.connectors[to_name].activate_pin(to_pin) def create_graph(self): dot = Graph() @@ -85,8 +89,10 @@ class Harness: '{}-pin'.format(len(n.pinout)) if n.show_pincount else ''] # p = pinout p = [[],[],[]] - p[1] = list(n.pinout) for i, x in enumerate(n.pinout, 1): + if n.hide_disconnected_pins and not n.visible_pins.get(i, False): + continue + p[1].append(x) if n.ports_left: p[0].append('{portno}'.format(portno=i)) if n.ports_right: @@ -321,11 +327,13 @@ class Connector: color: str = None show_name: bool = True show_pincount: bool = True + hide_disconnected_pins: bool = False def __post_init__(self): self.ports_left = False self.ports_right = False self.loops = [] + self.visible_pins = {} if self.pinout: if self.pincount is not None: @@ -339,6 +347,12 @@ class Connector: def loop(self, from_pin, to_pin): self.loops.append((from_pin, to_pin)) + if self.hide_disconnected_pins: + self.visible_pins[from_pin] = True + self.visible_pins[to_pin] = True + + def activate_pin(self, pin): + self.visible_pins[pin] = True @dataclass class Cable: