Improve handling and customize rendering of ferrules
This commit is contained in:
Daniel Rojas
parent
7151346e38
commit
da0d0c84b6
104
src/wireviz.py
104
src/wireviz.py
@ -102,35 +102,58 @@ class Harness:
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self.nodes[x.to_name].ports_left = True
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self.nodes[x.to_name].ports_left = True
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for k, n in self.nodes.items():
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for k, n in self.nodes.items():
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# a = attributes
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if n.category == 'ferrule':
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a = [n.type,
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infostring = '{type} {color}'.format(type=n.type,
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n.gender,
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color=translate_color(n.color, self.color_mode) if n.color else '')
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'{}-pin'.format(len(n.pinout)) if n.show_num_pins else '']
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infostring_l = infostring if n.ports_right else ''
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# p = pinout
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infostring_r = infostring if n.ports_left else ''
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p = [[],[],[]]
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p[1] = list(n.pinout)
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for i, x in enumerate(n.pinout, 1):
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if n.ports_left:
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p[0].append('<p{portno}l>{portno}'.format(portno=i))
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if n.ports_right:
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p[2].append('<p{portno}r>{portno}'.format(portno=i))
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# l = label
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l = [n.name if n.show_name else '', a, p]
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dot.node(k, label=nested(l))
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if len(n.loops) > 0:
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dot.node(k, shape='cds',
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dot.attr('edge',color='#000000')
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style='filled',
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if n.ports_left:
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orientation = '0' if n.ports_left else '180',
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loop_side = 'l'
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label='''<
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loop_dir = 'w'
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elif n.ports_right:
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<TABLE BORDER="0" CELLBORDER="0" CELLSPACING="0" CELLPADDING="2"><TR>
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loop_side = 'r'
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<TD PORT="p1l"> {infostring_l} </TD>
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loop_dir = 'e'
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{colorbar}
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else:
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<TD PORT="p1r"> {infostring_r} </TD>
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raise Exception('No side for loops')
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</TR></TABLE>
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for loop in n.loops:
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dot.edge('{name}:p{port_from}{loop_side}:{loop_dir}'.format(name=n.name, port_from=loop[0], port_to=loop[1], loop_side=loop_side, loop_dir=loop_dir),
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'{name}:p{port_to}{loop_side}:{loop_dir}'.format(name=n.name, port_from=loop[0], port_to=loop[1], loop_side=loop_side, loop_dir=loop_dir))
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>'''.format(infostring_l=infostring_l,
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infostring_r=infostring_r,
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colorbar='<TD BGCOLOR="{}" BORDER="1" SIDES="LR"> </TD>'.format(translate_color(n.color, 'HEX')) if n.color else ''))
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# dot.node(k, label='{<p1l>A|B|{C|<p1r>D|E}}')
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else:
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# a = attributes
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a = [n.type,
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n.gender,
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'{}-pin'.format(len(n.pinout)) if n.show_num_pins else '']
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# p = pinout
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p = [[],[],[]]
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p[1] = list(n.pinout)
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for i, x in enumerate(n.pinout, 1):
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if n.ports_left:
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p[0].append('<p{portno}l>{portno}'.format(portno=i))
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if n.ports_right:
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p[2].append('<p{portno}r>{portno}'.format(portno=i))
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# l = label
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l = [n.name if n.show_name else '', a, p]
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dot.node(k, label=nested(l))
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if len(n.loops) > 0:
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dot.attr('edge',color='#000000')
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if n.ports_left:
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loop_side = 'l'
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loop_dir = 'w'
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elif n.ports_right:
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loop_side = 'r'
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loop_dir = 'e'
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else:
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raise Exception('No side for loops')
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for loop in n.loops:
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dot.edge('{name}:p{port_from}{loop_side}:{loop_dir}'.format(name=n.name, port_from=loop[0], port_to=loop[1], loop_side=loop_side, loop_dir=loop_dir),
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'{name}:p{port_to}{loop_side}:{loop_dir}'.format(name=n.name, port_from=loop[0], port_to=loop[1], loop_side=loop_side, loop_dir=loop_dir))
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for k, c in self.cables.items():
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for k, c in self.cables.items():
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# a = attributes
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# a = attributes
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@ -201,25 +224,29 @@ class Harness:
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existing_connections.append(x.via_port)
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existing_connections.append(x.via_port)
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if x.from_port is not None: # connect to left
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if x.from_port is not None: # connect to left
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_from_port = ':p{}r'.format(x.from_port) if self.nodes[x.from_name].category != 'ferrule' else ''
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code_left_1 = '{from_name}{from_port}:e'.format(from_name=x.from_name, from_port=_from_port)
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if c.type == 'bundle':
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if c.type == 'bundle':
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dot.edge('{from_name}:p{from_port}r'.format(from_name=x.from_name, from_port=x.from_port),
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code_left_2 = '{via_name}_w{via_wire}l:w'.format(via_name=c.name, via_wire=x.via_port)
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'{via_name}_w{via_wire}l:w'.format(via_name=c.name, via_wire=x.via_port),
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dot.edge(code_left_1, code_left_2,
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headlabel='{}{}:{}'.format(' ' * 12, x.from_name, x.from_port),
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headlabel='{}{}:{}'.format(' ' * 12, x.from_name, x.from_port),
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labelangle='-60',
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labelangle='-60',
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labeldist='0')
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labeldist='0')
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else:
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else:
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dot.edge('{from_name}:p{from_port}r'.format(from_name=x.from_name, from_port=x.from_port),
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code_left_2 = '{via_name}:w{via_wire}{via_subport}:w'.format(via_name=c.name, via_wire=x.via_port, via_subport='i' if c.show_pinout else '')
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'{via_name}:w{via_wire}{via_subport}'.format(via_name=c.name, via_wire=x.via_port, via_subport='i' if c.show_pinout else ''))
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dot.edge(code_left_1, code_left_2)
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if x.to_port is not None: # connect to right
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if x.to_port is not None: # connect to right
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_to_port = ':p{}l'.format(x.to_port) if self.nodes[x.to_name].category != 'ferrule' else ''
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code_right_2 = '{to_name}{to_port}:w'.format(to_name=x.to_name, to_port=_to_port)
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if c.type == 'bundle':
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if c.type == 'bundle':
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dot.edge('{via_name}_w{via_wire}r:e'.format(via_name=c.name, via_wire=x.via_port),
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code_right_1 = '{via_name}_w{via_wire}r:e'.format(via_name=c.name, via_wire=x.via_port)
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'{to_name}:p{to_port}l'.format(to_name=x.to_name, to_port=x.to_port),
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dot.edge(code_right_1, code_right_2,
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taillabel='{}:{}{}'.format(x.to_name, x.to_port,' ' * 12),
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taillabel='{}:{}{}'.format(x.to_name, x.to_port,' ' * 12),
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labelangle='60',
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labelangle='60',
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labeldist='0')
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labeldist='0')
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else:
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else:
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dot.edge('{via_name}:w{via_wire}{via_subport}'.format(via_name=c.name, via_wire=x.via_port, via_subport='o' if c.show_pinout else ''),
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code_right_1 = '{via_name}:w{via_wire}{via_subport}:e'.format(via_name=c.name, via_wire=x.via_port, via_subport='o' if c.show_pinout else '')
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'{to_name}:p{to_port}l'.format(to_name=x.to_name, to_port=x.to_port))
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dot.edge(code_right_1, code_right_2)
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return dot
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return dot
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@ -233,10 +260,12 @@ class Harness:
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@dataclass
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@dataclass
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class Node:
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class Node:
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name: str
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name: str
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category: str = None
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type: str = None
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type: str = None
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gender: str = None
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gender: str = None
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num_pins: int = None
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num_pins: int = None
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pinout: List[Any] = field(default_factory=list)
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pinout: List[Any] = field(default_factory=list)
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color: str = None
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show_name: bool = True
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show_name: bool = True
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show_num_pins: bool = True
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show_num_pins: bool = True
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@ -455,6 +484,7 @@ def parse(file_in, file_out=None):
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h.add_cable(name=k, **o)
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h.add_cable(name=k, **o)
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elif sec == 'ferrules':
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elif sec == 'ferrules':
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pass
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pass
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# h.add_node(name=k, category='ferrule', **o)
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else:
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else:
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print('{} section empty'.format(sec))
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print('{} section empty'.format(sec))
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else:
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else:
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@ -558,7 +588,7 @@ def parse(file_in, file_out=None):
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for wire_pin in wire_pins:
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for wire_pin in wire_pins:
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ferrule_counter = ferrule_counter + 1
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ferrule_counter = ferrule_counter + 1
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ferrule_id = 'F{}'.format(ferrule_counter)
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ferrule_id = 'F{}'.format(ferrule_counter)
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h.add_node(ferrule_id, **ferrule_params)
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h.add_node(ferrule_id, category='ferrule', **ferrule_params)
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if f_w:
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if f_w:
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h.connect(ferrule_id, 1, wire_name, wire_pin, None, None)
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h.connect(ferrule_id, 1, wire_name, wire_pin, None, None)
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