From e084da0d4a73583491008a1a5ba85189c34ff677 Mon Sep 17 00:00:00 2001 From: Daniel Rojas Date: Fri, 22 May 2020 12:43:18 +0200 Subject: [PATCH] Add wire colors --- src/output/output.dot | 7 ++++--- src/wireviz.py | 19 ++++++++++++++++++- 2 files changed, 22 insertions(+), 4 deletions(-) diff --git a/src/output/output.dot b/src/output/output.dot index 0014b97..06a9729 100644 --- a/src/output/output.dot +++ b/src/output/output.dot @@ -8,9 +8,10 @@ X1[label="X1 | {{DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI} | {1|2|3|4|

W1:w1i; W1:w1o -> X2:p1} -{X1:p3 -> W1:w2i; W1:w2o -> X2:p3} -{X1:p5 -> W1:w3i; W1:w3o -> X2:p2} +{edge[style=bold] +{edge[color="#000000:#ffffff:#000000"] X1:p2 -> W1:w1i; W1:w1o -> X2:p1} +{edge[color="#000000:#808000:#000000"] X1:p3 -> W1:w2i; W1:w2o -> X2:p3} +{edge[color="#000000:#00ff00:#000000"] X1:p5 -> W1:w3i; W1:w3o -> X2:p2} } diff --git a/src/wireviz.py b/src/wireviz.py index b5d213f..4a64e4a 100644 --- a/src/wireviz.py +++ b/src/wireviz.py @@ -2,6 +2,20 @@ COLOR_CODE_DIN = ['WH','BN','GN','YE','GY','PK','BU','RD','BK','VT'] COLOR_CODE_IEC = ['BN','RD','OG','YE','GN','BU','VT','GY','WH','BK'] +color_dict = {'BK': '#000000', + 'WH': '#ffffff', + 'GY': '#808080', + 'PK': '#ff80c0', + 'RD': '#ff0000', + 'OG': '#ff8000', + 'YE': '#ffff00', + 'GN': '#00ff00', + 'TQ': '#00ffff', + 'BU': '#0000ff', + 'VT': '#8000ff', + 'BN': '#808000', + } + class Node: def __init__(self, name, num_pins=None, pinout=None, ports_left=False, ports_right=False): @@ -126,9 +140,12 @@ class Cable: s = s + '}}"]' - s = s + '\n\n{edge[style=bold]' + s = s + '\n\n{edge[style=bold]\n' for x in self.connections: s = s + '{' + search_color = self.colors[x[2]-1] + if search_color in color_dict: + s = s + 'edge[color="#000000:{wire_color}:#000000"] '.format(wire_color=color_dict[search_color]) t = '{from_name}:p{from_port} -> {via_name}:w{via_wire}i; {via_name}:w{via_wire}o -> {to_name}:p{to_port}'.format(from_name=x[0],from_port=x[1],via_name=self.name, via_wire=x[2],to_name=x[3],to_port=x[4]) s = s + t s = s + '}\n'