Show from/to designators on wire bundle
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@ -36,7 +36,7 @@ wires:
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type: bundle
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W3:
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mm2: 0.14
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# length: 0.2
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length: 0.2
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type: bundle
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colors: [BK, BU, OG, VT]
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W4:
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@ -44,7 +44,6 @@ wires:
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length: 0.35
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colors: [BK, RD]
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type: bundle
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show_num_wires: false
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connections:
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-
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@ -195,21 +195,26 @@ class Harness:
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'{via_name}_w{via_wire}r'.format(via_name=c.name, via_wire=x[2]),
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taillabel=labeltext,
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labelangle='60',
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labeldist='0',
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labelfloat='true')
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labeldist='0')
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existing_connections.append(x[2])
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if x[1] is not None: # connect to left
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if c.type == 'bundle':
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dot.edge('{from_name}:p{from_port}r'.format(from_name=x[0],from_port=x[1]),
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'{via_name}_w{via_wire}l:w'.format(via_name=c.name, via_wire=x[2]))
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'{via_name}_w{via_wire}l:w'.format(via_name=c.name, via_wire=x[2]),
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headlabel='{}{}:{}'.format(' ' * 12,x[0],x[1]),
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labelangle='-60',
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labeldist='0')
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else:
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dot.edge('{from_name}:p{from_port}r'.format(from_name=x[0],from_port=x[1]),
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'{via_name}:w{via_wire}{via_subport}'.format(via_name=c.name, via_wire=x[2], via_subport='i' if c.show_pinout else ''))
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if x[4] is not None: # connect to right
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if c.type == 'bundle':
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dot.edge('{via_name}_w{via_wire}r:e'.format(via_name=c.name, via_wire=x[2]),
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'{to_name}:p{to_port}l'.format(to_name=x[3], to_port=x[4]))
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'{to_name}:p{to_port}l'.format(to_name=x[3], to_port=x[4]),
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taillabel='{}:{}{}'.format(x[3],x[4],' ' * 12),
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labelangle='60',
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labeldist='0')
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else:
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dot.edge('{via_name}:w{via_wire}{via_subport}'.format(via_name=c.name, via_wire=x[2], via_subport='o' if c.show_pinout else ''),
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'{to_name}:p{to_port}l'.format(to_name=x[3], to_port=x[4]))
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@ -333,7 +338,7 @@ def translate_color(input, color_mode):
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if color_mode == 'full':
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output = color_full[input].lower()
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elif color_mode == 'FULL':
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output = color_hex[input].upper()
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output = color_full[input].upper()
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elif color_mode == 'hex':
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output = color_hex[input].lower()
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elif color_mode == 'HEX':
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