freeroute/tests/dsn/fixtures/rooms_multipin_desync.dsn
Ryan Malloy 9cf2392c4b Fix multi-pin wire/owner desync in shove-in-rooms recovery
_shove_recover_room clobbered a net's _Accepted with a fresh one whose
wire_owners held only the just-recovered wire, while its wires list (the
shared result.wires[net_no]) already held earlier committed connections.
That left wire_owners shorter than the parallel wires list, so a later
net's shove either removed the wrong wire's copper from the search tree
(a silent different-net short: copper stayed in the emitted SES but
vanished from the tree, and has_violation falsely certified it clean) or
raised IndexError and aborted the whole route.

Reuse the net's existing _Accepted on recovery so wire_owners stays
parallel to wires. Fixes both the silent DRC violation and the crash
sibling without touching the DRC-clean or determinism invariants.

Also correct the overstated "density win" framing of the shove_channel
fixture: its plain-routing net drop is an artifact of greedy net order,
not a density limit (the same board routes both nets with zero shoves
under a reorder or with the cosmetic seals removed). Reframed the test
and docstring; the genuine sub-cell win remains the wide_door occupancy
packing (shoves == 0).

Regression tests assert the invariant against the emitted output
directly (reconstructed copper tiles), not just the tree that the bug
fooled, plus determinism, no-crash, and the ordering-artifact bound.
2026-07-13 11:08:02 -06:00

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(pcb "rooms_multipin_desync"
(parser
(string_quote ")
(space_in_quoted_tokens on)
(host_cad "freeroute-test")
(host_version "1.0")
)
(resolution um 10)
(unit um)
(structure
(layer F.Cu (type signal) (property (index 0)))
(layer B.Cu (type power) (property (index 1)))
(boundary
(path pcb 0 0 0 300000 0 300000 -100000 0 -100000 0 0)
)
(keepout "seal_left" (rect F.Cu 0 -100000 2500 0))
(keepout "seal_right" (rect F.Cu 297500 -100000 300000 0))
(rule (width 2000) (clearance 2000))
)
(library
(padstack Rect_Pad
(shape (rect F.Cu -1000 -1000 1000 1000))
(shape (rect B.Cu -1000 -1000 1000 1000))
(attach off)
)
(padstack Via
(shape (circle F.Cu 1200))
(shape (circle B.Cu 1200))
(attach off)
)
(image PAD
(pin Rect_Pad 1 0 0)
)
)
(placement
(component PAD
(place B1 10000 -50000 front 0)
(place B2 290000 -50000 front 0)
(place Wt1 10000 -30000 front 0)
(place Wt2 290000 -30000 front 0)
(place M0 90000 -34000 front 0)
(place M1 90000 -46000 front 0)
(place M2 90000 -70000 front 0)
(place X1 40000 -40000 front 0)
(place X2 140000 -40000 front 0)
(place Yp1 40000 -60000 front 0)
(place Yp2 140000 -60000 front 0)
)
)
(network
(net NB
(pins B1-1 B2-1)
)
(net NWtop
(pins Wt1-1 Wt2-1)
)
(net NM
(pins M0-1 M1-1 M2-1)
)
(net NX
(pins X1-1 X2-1)
)
(net NY
(pins Yp1-1 Yp2-1)
)
(class default
(rule (width 2000) (clearance 2000))
)
)
(wiring
)
)