Implement Specctra DSN parser with typed board model

Ports the read path of FreeRouting's io/specctra/parser package to a
Java-free Python implementation:

- tokenizer: S-expression lexer mirroring SpecctraFileDescription.flex
  (comments, quoted strings, the string_quote IGNORE_QUOTE directive,
  case-insensitive keywords, and hash-prefixed names)
- sexp: nested S-expression tree builder
- shapes: rect/circle/polygon/path plus area-with-holes scopes
- model: typed dataclasses for layers, padstacks, images, placements,
  nets, net classes, rules, keepouts
- reader: recursive-descent scope readers producing a DsnBoard, one
  _read_* function per FreeRouting read_scope method

46 pytest cases cover the tokenizer, tree, shapes, and end-to-end
parsing against hand-crafted fixtures modeled on FreeRouting's own
test DSN files. Parses 90 of 91 upstream fixtures (the one failure is
a binary OLE file, not text DSN).

tests/dsn/fixtures/README.md

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+# DSN test fixtures
+
+Hand-crafted minimal Specctra DSN files, written to exercise the parser. They
+are modeled on the real fixtures shipped in the upstream FreeRouting repo
+(`fixtures/empty_board.dsn` and `fixtures/SMD-routing-issue-demo.dsn`) so the
+grammar and formatting match what `kicad-cli pcb export specctra-dsn` and
+FreeRouting itself produce, but they were typed fresh here (no upstream file is
+copied into this tree).
+
+- `empty_board.dsn` — the smallest valid board: parser, resolution, unit, and a
+  structure with two signal layers and a `pcb` boundary path. Modeled on
+  FreeRouting `fixtures/empty_board.dsn`.
+- `smd_demo.dsn` — a fuller board exercising every scope the parser handles:
+  quoted board/padstack/image names, `via`, default `rule` (width + clearance
+  with a `(type smd_smd)` pair), a `keepout`, padstacks (rect and circle pads),
+  images with pins, placement with `front`/rotation, nets with `Comp-Pin`
+  references, and a `class` with `circuit`/`use_via` and a `rule`. Modeled on
+  FreeRouting `fixtures/SMD-routing-issue-demo.dsn`.
+</content>

tests/dsn/fixtures/empty_board.dsn

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+(pcb freeroute-empty.dsn
+  (parser
+    (string_quote ")
+    (space_in_quoted_tokens on)
+  )
+  (resolution um 10)
+  (unit um)
+  (structure
+    (layer F.Cu
+      (type signal)
+      (property
+        (index 0)
+      )
+    )
+    (layer B.Cu
+      (type signal)
+      (property
+        (index 1)
+      )
+    )
+    (boundary
+      (path pcb 0  186690 -107950  129540 -107950  129540 -57150  186690 -57150
+            186690 -107950)
+    )
+  )
+)

tests/dsn/fixtures/smd_demo.dsn

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+(pcb "smd-demo.dsn"
+  (parser
+    (string_quote ")
+    (space_in_quoted_tokens on)
+    (host_cad "freeroute-test")
+    (host_version "1.0")
+  )
+  (resolution um 10)
+  (unit um)
+  (structure
+    (layer Top
+      (type signal)
+      (property
+        (index 0)
+      )
+    )
+    (layer Bottom
+      (type signal)
+      (property
+        (index 1)
+      )
+    )
+    (boundary
+      (path pcb 0  0 0  150000 0  150000 -90000  0 -90000  0 0)
+    )
+    (via "Via[0-1]_600:300_um")
+    (rule
+      (width 200)
+      (clearance 200)
+      (clearance 50 (type smd_smd))
+    )
+    (keepout "no_route_zone"
+      (rect Top 10000 -10000 20000 -20000)
+    )
+  )
+  (library
+    (padstack Rect[T]Pad_800x200_um
+      (shape (rect Top -400 -100 400 100))
+      (attach off)
+    )
+    (padstack "Via[0-1]_600:300_um"
+      (shape (circle Top 600))
+      (shape (circle Bottom 600))
+      (attach off)
+    )
+    (image "MiniQFN-6"
+      (pin Rect[T]Pad_800x200_um 1 -3000  400)
+      (pin Rect[T]Pad_800x200_um 2 -3000    0)
+      (pin Rect[T]Pad_800x200_um 3 -3000 -400)
+    )
+    (image "0603"
+      (pin Rect[T]Pad_800x200_um 1 -850 0)
+      (pin Rect[T]Pad_800x200_um 2  850 0)
+    )
+  )
+  (placement
+    (component "MiniQFN-6"
+      (place U1 75000 -45000 front 90.000000)
+    )
+    (component "0603"
+      (place R1 20000  -35000 front 0.000000)
+      (place R2 130000 -35000 back 180.000000)
+    )
+  )
+  (network
+    (net NET_A
+      (pins U1-1 R2-2)
+    )
+    (net NET_B
+      (pins U1-2 R1-1)
+    )
+    (class default
+      (circuit
+        (use_via "Via[0-1]_600:300_um")
+      )
+      (rule
+        (width 200)
+        (clearance 200)
+      )
+    )
+  )
+  (wiring
+  )
+)