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15 changed files with 481 additions and 623 deletions
+2 -9
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@@ -32,10 +32,8 @@ from freeroute.route.exact_router import route_board_exact
from freeroute.route.grid_router import GridRouter, _ends_of
from freeroute.route.pipeline import (
_mm_to_board,
_net_widths_board,
_rule_clearance_dsn,
_rule_width_dsn,
_via_drill_board,
_via_half_board,
)
@@ -185,7 +183,7 @@ def _flood(router: GridRouter, pin, net_no: int, conns) -> tuple[int, Counter]:
def diagnose(
dsn_text: str, edge_clearance_mm: float | None, resolution: int = 2, shove: bool = False,
access_cost: float = 0.0, hole_to_hole_mm: float = 0.25,
access_cost: float = 0.0,
) -> dict:
dsn = parse_dsn(dsn_text)
names = {i + 1: n.name for i, n in enumerate(dsn.nets)}
@@ -201,10 +199,6 @@ def diagnose(
resolution=resolution,
shove=shove,
access_cost=access_cost,
# the product's configuration: net-class widths and hole spacing
net_widths=_net_widths_board(dsn, scale),
via_drill=_via_drill_board(dsn, scale),
hole_to_hole=_mm_to_board(dsn, scale, hole_to_hole_mm) or 0,
)
routed = seen["router"]
best = routed._diag_best
@@ -276,12 +270,11 @@ def main(argv: list[str] | None = None) -> int:
ap.add_argument("--grid-resolution", type=int, default=2, metavar="K")
ap.add_argument("--shove", action="store_true", help="as mckicad routes")
ap.add_argument("--access-cost", type=float, default=0.0)
ap.add_argument("--hole-to-hole", type=float, default=0.25, metavar="MM")
ap.add_argument("--json", type=Path, help="also write the full table here")
args = ap.parse_args(argv)
report = diagnose(args.dsn.read_text(), args.edge_clearance, args.grid_resolution, args.shove,
args.access_cost, args.hole_to_hole)
args.access_cost)
for row in report["failures"]:
extra = ""
for w in row.get("walled", []):
-67
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@@ -1,67 +0,0 @@
#!/usr/bin/env bash
# Route one KiCad board with freeroute and judge the result with KiCad's DRC.
#
# bench/drc_check.sh [--keep] <board.kicad_pcb> <out-dir> [freeroute args...]
#
# Copies the board (and its .kicad_pro) into <out-dir>, strips its tracks and
# vias unless --keep is given (then they reach the router as fixed wiring),
# exports the DSN through mckicad, routes, applies the session, and runs DRC
# with zones refilled at every severity. Prints one line: time, copper added,
# shorts, opens, hole problems (whatever severity the board gives them) and
# the other errors. The source board is never touched.
#
# FREEROUTE (default: this checkout's .venv/bin/freeroute) and MCK (default
# ~/claude/mckicad) pick the builds to judge.
set -euo pipefail
keep=0
if [[ "${1:-}" == "--keep" ]]; then keep=1; shift; fi
src="$1"; out="$2"; shift 2
here="$(cd "$(dirname "$0")/.." && pwd)"
FREEROUTE="${FREEROUTE:-$here/.venv/bin/freeroute}"
MCK="${MCK:-$HOME/claude/mckicad}"
rm -rf "$out"; mkdir -p "$out"
cp "${src%.kicad_pcb}.kicad_pro" "$out/board.kicad_pro" 2>/dev/null || true
if [[ $keep == 1 ]]; then
cp "$src" "$out/board.kicad_pcb"
else
(cd "$MCK" && uv run --no-sync python - "$src" "$out/board.kicad_pcb" <<'EOF'
import sys
from mckicad.utils.sexp_tree import parse
text = open(sys.argv[1]).read()
spans = sorted((c.span for c in parse(text).children if c.tag in ("segment", "arc", "via")), reverse=True)
for a, b in spans:
text = text[:a] + text[b:]
open(sys.argv[2], "w").write(text)
EOF
)
fi
(cd "$MCK" && uv run --no-sync python -c "
from mckicad.utils.freerouting import FreeRoutingEngine
assert FreeRoutingEngine().export_dsn_from_kicad('$out/board.kicad_pcb', '$out/board.dsn', {})") \
>/dev/null 2>&1 || { echo "$out: DSN export failed"; exit 1; }
start=$(date +%s.%N)
"$FREEROUTE" "$out/board.dsn" -do "$out/board.ses" "$@" >"$out/route.log" 2>&1 || true
secs=$(python3 -c "print(round($(date +%s.%N)-$start,1))")
[[ -s "$out/board.ses" ]] || { echo "$out: no session ($(tail -1 "$out/route.log"))"; exit 1; }
(cd "$MCK" && uv run --no-sync python -c "
from mckicad.utils.ses_apply import apply_ses_to_board as a
r = a('$out/board.kicad_pcb', '$out/board.ses', '$out/board.kicad_pcb')
print(r['segments_added'], r['vias_added'])" 2>/dev/null) >"$out/apply.txt"
kicad-cli pcb drc --refill-zones --format json --severity-all \
-o "$out/drc.json" "$out/board.kicad_pcb" >/dev/null 2>&1 || true
python3 - "$out" "$secs" <<'EOF'
import collections, json, sys
out, secs = sys.argv[1:]
seg, via = open(f"{out}/apply.txt").read().split()
d = json.load(open(f"{out}/drc.json"))
errors = collections.Counter(v["type"] for v in d["violations"] if v.get("severity") == "error")
other = collections.Counter(v["type"] for v in d["violations"] if v.get("severity") != "error")
holes = {k: errors.pop(k, 0) + other.get(k, 0) for k in ("holes_co_located", "hole_to_hole")}
print(f"{out}: {secs}s {seg} seg {via} via shorts {errors.pop('shorting_items', 0)} "
f"opens {len(d.get('unconnected_items', []))} holes {holes} errors {dict(errors)}")
EOF
+4 -28
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@@ -268,39 +268,15 @@ def _placed_pad_tile(shape: Shape, place, dsn_pin, transform: CoordinateTransfor
for x, y in corners:
p = _to_board_offset(place, x, y, dsn_pin.rotation)
pts.append(IntPoint(round(transform.dsn_to_board(p.x)), round(transform.dsn_to_board(p.y))))
# An oval's padded corners are not in outline order, and a mirrored
# part reverses the winding: take the convex hull, then either winding.
hull = _convex_hull(pts)
if len(hull) >= 3:
for corners in (hull, hull[::-1]):
simplex = Simplex.from_corners(corners)
if not simplex.is_empty():
return simplex
if len(pts) >= 3:
simplex = Simplex.from_corners(pts)
if not simplex.is_empty():
return simplex
xs = [p.x for p in pts] or [0]
ys = [p.y for p in pts] or [0]
return IntBox(min(xs), min(ys), max(xs), max(ys))
def _convex_hull(pts: list[IntPoint]) -> list[IntPoint]:
"""The convex hull of ``pts`` counter-clockwise, collinear points dropped."""
ps = sorted({(p.x, p.y) for p in pts})
if len(ps) < 3:
return [IntPoint(x, y) for x, y in ps]
def cross(o, a, b):
return (a[0] - o[0]) * (b[1] - o[1]) - (a[1] - o[1]) * (b[0] - o[0])
def half(points):
out: list[tuple[int, int]] = []
for p in points:
while len(out) >= 2 and cross(out[-2], out[-1], p) <= 0:
out.pop()
out.append(p)
return out[:-1]
return [IntPoint(x, y) for x, y in half(ps) + half(ps[::-1])]
def _pad_tile(shape: Shape, transform: CoordinateTransform):
"""A board-relative pad tile from a DSN padstack shape (centred near origin)."""
if isinstance(shape, Rectangle):
+4
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@@ -119,6 +119,8 @@ class Via(Item):
shape: object = None
#: drill diameter in board units, when the padstack name gives it
drill: int = 0
#: placed by the router's fan-out, not on the board yet: written out
generated: bool = False
@dataclass
@@ -132,6 +134,8 @@ class Trace(Item):
layer: int = 0
half_width: int = 0
corners: list[IntPoint] = field(default_factory=list)
#: placed by the router's fan-out, not on the board yet: written out
generated: bool = False
def is_empty(self) -> bool:
return len(self.corners) < 2
-2
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@@ -188,8 +188,6 @@ class ShapeSearchTree:
overlap). Static pad-vs-pad spacing in the source design is not counted.
"""
for shape in self.all_shapes():
if not shape.routed:
continue # a pair with routed copper is checked from that side
expanded = shape.tile.offset(clearance)
grown = None # exact clearance region, built lazily only for diagonals
for other in self.overlapping(expanded):
+27 -2
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@@ -30,8 +30,11 @@ from freeroute.ses import write_ses
#: which optional flags each engine actually implements. Anything not listed for
#: an engine is rejected by :func:`_validate` rather than quietly ignored.
ENGINE_OPTIONS: dict[str, frozenset[str]] = {
"grid": frozenset({"rip_up", "max_passes", "seed", "orders", "promote", "access", "rollback"}),
"exact": frozenset({"shove", "diagonal", "rip_up", "max_passes", "seed", "orders", "promote", "access", "rollback"}),
"grid": frozenset({"rip_up", "max_passes", "seed", "orders", "promote", "access", "rollback", "fanout"}),
"exact": frozenset(
{"shove", "diagonal", "rip_up", "max_passes", "seed", "orders", "promote", "access",
"rollback", "fanout"}
),
"room": frozenset({"shove", "pack"}),
}
@@ -47,6 +50,7 @@ _FLAG_NAMES = {
"promote": "--promote-failures",
"access": "--access-cost",
"rollback": "--no-rollback",
"fanout": "--fanout",
}
@@ -183,6 +187,22 @@ def build_parser() -> argparse.ArgumentParser:
help="grid and exact engines: least distance between the edges of any two via "
"holes, of one net or two (KiCad's min_hole_to_hole; default 0.25)",
)
parser.add_argument(
"--fanout",
nargs="?",
const="all",
choices=["all", "supply"],
help="grid and exact engines: before routing, give every fine-pitch pin a stub "
"outward past its pad row (and a via to its plane, for a plane net), committed "
"as copper so later routes cannot wall it in; --fanout supply: plane pins only",
)
parser.add_argument(
"--fanout-min-pins",
type=int,
default=32,
metavar="N",
help="with --fanout: fan out only packages with at least N fine-pitch pins (default 32)",
)
parser.add_argument(
"--jobs",
type=int,
@@ -213,6 +233,7 @@ def main(argv: list[str] | None = None) -> int:
("promote", args.promote_failures is not None),
("access", args.access_cost is not None),
("rollback", not args.rollback),
("fanout", bool(args.fanout)),
)
if asked
]
@@ -248,6 +269,8 @@ def main(argv: list[str] | None = None) -> int:
"heuristic_weight": args.heuristic_weight,
"access_cost": args.access_cost or 0.0,
"hole_to_hole_mm": args.hole_to_hole,
"fanout": args.fanout or False,
"fanout_min_pins": args.fanout_min_pins,
"rollback": args.rollback,
}
elif args.engine == "grid":
@@ -259,6 +282,8 @@ def main(argv: list[str] | None = None) -> int:
"resolution": 1 if args.grid_resolution is None else args.grid_resolution,
"access_cost": args.access_cost or 0.0,
"hole_to_hole_mm": args.hole_to_hole,
"fanout": args.fanout or False,
"fanout_min_pins": args.fanout_min_pins,
"rollback": args.rollback,
}
if args.engine == "room":
+1 -8
View File
@@ -38,7 +38,6 @@ from freeroute.geometry import (
IntPoint,
Polyline,
PolylineShape,
Simplex,
segment_box,
segment_octagon,
shove_segment,
@@ -155,9 +154,7 @@ def route_board_exact(
net = pin.net_nos[0] if pin.net_nos else -1
pin_layers = frozenset(layer for layer in pin.layers if layer in signal_layers)
if pin_layers:
# a rotated pad is checked against its outline, not its box
exact = pin.shape if _is_rotated(pin.shape) else None
tree.insert(TreeShape(next(owner), net, pin_layers, box, exact=exact))
tree.insert(TreeShape(next(owner), net, pin_layers, box))
for net, copper_layers, box in board.get_fixed_copper():
on = frozenset(layer for layer in copper_layers if layer in signal_layers)
if on and not box.is_empty():
@@ -670,10 +667,6 @@ def _copper_boxes(wires, vias, half_width, via_layers, via_half=None):
return boxes
def _is_rotated(shape) -> bool:
return isinstance(shape, Simplex) and not shape.is_int_box()
def _net_pins(board: BasicBoard, net_no: int, signal_layers) -> list[Pin]:
return [
pin
+229
View File
@@ -0,0 +1,229 @@
"""Fan out fine-pitch pins before routing: commit each pin's way out as copper.
On a dense board the pins of a fine-pitch package get walled in: their own
neighbours' pads on either side, and other nets' copper that got there first
across the only way out. Reserving the way out did not help (the reserved
cells still had to be routed, and lost to congestion there); committing it
does, which is what a person does by hand.
Each fine-pitch pin of a perimeter package (QFP, QFN, LGA: pads on the edge,
none inside) gets a straight stub outward, perpendicular to its side of the
package, just past its pad row. A pin whose net has an inner plane also gets
a via at the stub's end, staggered between neighbouring pins so their holes
keep their spacing, and so reaches the plane with nothing left to route.
Every stub and via is checked exactly against pads, keepouts, the board edge,
copper already on the board and earlier fan-out, and left out where it would
not fit. The result goes on the board as fixed copper of its net (marked
``generated``), so the router starts from the stub's end or the via, and the
session writes it out with the routes.
"""
from __future__ import annotations
from dataclasses import dataclass
import math
from freeroute.board.board import BasicBoard
from freeroute.board.items import Pin, Trace, Via
from freeroute.geometry import IntBox, IntPoint
from freeroute.geometry.polyline import Polyline, PolylineShape, corner_box
# a package is fanned out when it has this many pins and they are this close
_MIN_PINS = 8
_FINE_PITCH_FACTOR = 1.2 # neighbour centres within this many (trace + 2 clearance)
@dataclass
class FanoutRules:
trace_width: int
clearance: int
via_half: int
via_drill: int
hole_to_hole: int
edge_clearance: int
signal_layers: list[int]
via_padstack: str
#: smallest package fanned out (a big dense part is where pins get walled in)
min_pins: int = 32
#: fan out plane pins only (a stub and a via each), as a person would first
supply_only: bool = False
def plan_fanout(board: BasicBoard, rules: FanoutRules) -> list:
"""The stubs and vias to put on the board before routing."""
half = max(rules.trace_width // 2, 1)
# a net may have several plane zones (a main plane and an island)
planes: dict[int, list] = {}
for z in board.get_conduction_areas():
if z.net_nos and not board.layer_structure.arr[z.layer].is_signal:
planes.setdefault(z.net_nos[0], []).append(z)
# copper pours on the routing layers, by net: a pad inside one is joined
# by the fill, and a stub there would take the room its thermal spokes need
pours: dict[int, list] = {}
for z in board.get_conduction_areas():
if z.net_nos and board.layer_structure.arr[z.layer].is_signal:
pours.setdefault(z.net_nos[0], []).append(z)
placed = _Placed(board, rules)
by_net: dict[int, list[Pin]] = {}
for pin in board.get_pins():
for n in pin.net_nos:
by_net.setdefault(n, []).append(pin)
items: list = []
pitch = 2 * rules.via_half + rules.hole_to_hole
for pins in _packages(board, rules).values():
centre = IntPoint(
sum(p.location.x for p in pins) // len(pins), sum(p.location.y for p in pins) // len(pins)
)
for k, pin in enumerate(sorted(pins, key=lambda p: (p.location.x, p.location.y))):
net = pin.net_nos[0] if pin.net_nos else None
if net is None:
continue
layer = next(layer for layer in pin.layers if layer in rules.signal_layers)
if any(z.layer == layer and z.polygon is not None and z.polygon.contains(pin.location)
for z in pours.get(net, [])):
continue # the pour joins it
direction = _outward(pin.location, centre)
reach = _pad_reach(pin, direction) + rules.clearance + half + rules.trace_width
end = _step(pin.location, direction, reach)
plane = planes.get(net)
partners = [q for q in by_net.get(net, []) if q is not pin]
# a signal whose other pins are all on other layers has to change
# layer somewhere: do it at the stub's end, away from the pads
elsewhere = bool(partners) and all(layer not in q.layers for q in partners)
if plane is None and (rules.supply_only or not elsewhere):
if not rules.supply_only and placed.stub_fits(pin.location, end, layer, net, half):
items.append(placed.add_stub(pin.location, end, layer, net, half))
continue
# stagger the via of every other pin along the side outward
options = [reach + rules.via_half + rules.clearance + (k % 2) * pitch,
reach + rules.via_half + rules.clearance + ((k + 1) % 2) * pitch]
for d in options:
at = _step(pin.location, direction, d)
if plane is not None and not any(
z.polygon is not None and z.polygon.contains(at) for z in plane
):
continue
if placed.stub_fits(pin.location, at, layer, net, half) and placed.via_fits(at, net):
items.append(placed.add_stub(pin.location, at, layer, net, half))
items.append(placed.add_via(at, net))
break
return items
def _packages(board: BasicBoard, rules: FanoutRules) -> dict[str, list[Pin]]:
"""Fine-pitch perimeter packages: many single-layer pins, close together."""
by_ref: dict[str, list[Pin]] = {}
for pin in board.get_pins():
if pin.shape is None or not pin.component_ref:
continue
on = [layer for layer in pin.layers if layer in rules.signal_layers]
if len(on) != 1:
continue # through-hole pins change layer for free
by_ref.setdefault(pin.component_ref, []).append(pin)
fine = _FINE_PITCH_FACTOR * (rules.trace_width + 2 * rules.clearance)
out = {}
for ref, pins in by_ref.items():
if len(pins) < max(rules.min_pins, _MIN_PINS):
continue
close = sum(
1 for p in pins
if min(math.hypot(p.location.x - q.location.x, p.location.y - q.location.y)
for q in pins if q is not p) < fine * 2
)
if close >= len(pins) // 2:
out[ref] = pins
return out
def _outward(point: IntPoint, centre: IntPoint) -> tuple[int, int]:
"""Away from the package centre, along the nearer axis (its side's normal)."""
dx, dy = point.x - centre.x, point.y - centre.y
if abs(dx) >= abs(dy):
return (1 if dx >= 0 else -1, 0)
return (0, 1 if dy >= 0 else -1)
def _pad_reach(pin: Pin, direction: tuple[int, int]) -> int:
"""How far the pad reaches from its centre in ``direction``."""
box = pin.shape.bounding_box()
if direction[0] > 0:
return box.ur.x - pin.location.x
if direction[0] < 0:
return pin.location.x - box.ll.x
if direction[1] > 0:
return box.ur.y - pin.location.y
return pin.location.y - box.ll.y
def _step(point: IntPoint, direction: tuple[int, int], distance: float) -> IntPoint:
return IntPoint(point.x + round(direction[0] * distance), point.y + round(direction[1] * distance))
class _Placed:
"""Copper a fan-out stub or via has to clear, growing as fan-out is placed."""
def __init__(self, board: BasicBoard, rules: FanoutRules) -> None:
self.board, self.rules = board, rules
self.copper: list[tuple[IntBox, frozenset[int], int]] = [] # box, layers, net
for pin in board.get_pins():
if pin.shape is not None:
net = pin.net_nos[0] if pin.net_nos else -1
self.copper.append((pin.shape.bounding_box(), frozenset(pin.layers), net))
for net, layers, box in board.get_fixed_copper():
self.copper.append((box, layers, net))
self.keepouts = [
(tile.bounding_box(), o.layer, o.blocks_wires, o.blocks_vias, o.clearance)
for o in board.get_obstacle_areas() for tile in o.tiles
]
self.holes: list[tuple[IntPoint, int]] = [] # centre, radius
for item in board.get_items():
if isinstance(item, Via) and item.fixed:
self.holes.append((item.location, (item.drill or rules.via_drill) // 2))
for pin in board.get_pins():
if pin.shape is not None and sum(1 for layer in pin.layers if layer in rules.signal_layers) > 1:
b = pin.shape.bounding_box()
self.holes.append((pin.location, min(b.ur.x - b.ll.x, b.ur.y - b.ll.y) // 2))
def _clear(self, box: IntBox, layers: frozenset[int], net: int, kind: str) -> bool:
grown = box.offset(self.rules.clearance)
for other, other_layers, other_net in self.copper:
if other_net != net and layers & other_layers and other.overlaps(grown):
return False
for kbox, klayer, wires, vias, needs in self.keepouts:
if klayer not in layers or not (wires if kind == "wire" else vias):
continue
if kbox.overlaps(grown if needs else box):
return False
outline = self.board.outline
return outline is None or outline.box_clear(box, self.rules.edge_clearance)
def stub_fits(self, a: IntPoint, b: IntPoint, layer: int, net: int, half: int) -> bool:
boxes = list(PolylineShape(Polyline([a, b]), half).tiles()) + [corner_box(b, half)]
return all(self._clear(box, frozenset({layer}), net, "wire") for box in boxes)
def via_fits(self, at: IntPoint, net: int) -> bool:
h = self.rules.via_half
box = IntBox(at.x - h, at.y - h, at.x + h, at.y + h)
if not self._clear(box, frozenset(self.rules.signal_layers), net, "via"):
return False
mine = self.rules.via_drill // 2
return all(
math.hypot(c.x - at.x, c.y - at.y) >= mine + r + self.rules.hole_to_hole
for c, r in self.holes
)
def add_stub(self, a: IntPoint, b: IntPoint, layer: int, net: int, half: int) -> Trace:
for box in list(PolylineShape(Polyline([a, b]), half).tiles()) + [corner_box(b, half)]:
self.copper.append((box, frozenset({layer}), net))
return Trace(net_nos=[net], fixed=True, layer=layer, half_width=half, corners=[a, b],
generated=True)
def add_via(self, at: IntPoint, net: int) -> Via:
h = self.rules.via_half
box = IntBox(at.x - h, at.y - h, at.x + h, at.y + h)
layers = list(self.rules.signal_layers)
self.copper.append((box, frozenset(layers), net))
self.holes.append((at, self.rules.via_drill // 2))
return Via(net_nos=[net], fixed=True, padstack_name=self.rules.via_padstack,
location=at, layers=layers, shape=box, drill=self.rules.via_drill,
generated=True)
+74 -214
View File
@@ -27,14 +27,12 @@ DRC-clean geometry, and blind/buried via spans.
from __future__ import annotations
import heapq
import itertools
import math
import random
from freeroute.board.board import BasicBoard
from freeroute.board.items import ConductionArea, ObstacleArea, Pin, Via
from freeroute.geometry import IntBox, IntPoint, Simplex
from freeroute.geometry.octagon import overlaps_2d
from freeroute.geometry import IntBox, IntPoint
from freeroute.geometry.polyline import corner_box
__all__ = ["GridRouter", "RouteResult", "route_board"]
@@ -125,7 +123,6 @@ class _Connection:
"path",
"narrow",
"half",
"stubs",
)
def __init__(self, index: int, net_no: int, a: Pin, b: Pin) -> None:
@@ -141,8 +138,6 @@ class _Connection:
self.via_cells: list[Cell] = []
self.via_halo: list[Cell] = []
self.halo_nodes: list[Node] = []
# each end's stub: its layer, its copper tiles, and the nodes it claims
self.stubs: list[tuple[int, list[IntBox], set[Node]]] = []
# the pins and zones each end may use, and which pin the route ended
# on (None when it ended on a zone)
self.a_group: tuple[list[Pin], list] = ([a], [])
@@ -234,7 +229,7 @@ class GridRouter:
(dx, dy)
for dx in range(-reach, reach + 1)
for dy in range(-reach, reach + 1)
if (dx or dy) and max(abs(dx), abs(dy)) * self.step < need
if (dx or dy) and math.hypot(dx, dy) * self.step < need
]
# A via's copper is wider than a trace. Another net's trace needs its
# centre via_half + clearance + half_width from the via's centre, so a
@@ -300,9 +295,6 @@ class GridRouter:
# per-connection occupancy (owner = connection index)
self._cell_owner: dict[Node, int] = {}
self._via_owner: dict[Cell, int] = {}
# every connection whose via covers a cell, in claim order: a via two
# connections share still blocks after the first of them is ripped
self._via_claims: dict[Cell, list[int]] = {}
# trace halos: node -> indices of the connections claiming it
self._halo: dict[Node, list[int]] = {}
self._rasterize_obstacles()
@@ -383,19 +375,6 @@ class GridRouter:
shape.contains(IntPoint(c.x + dx, c.y + dy)) for dx in (-h, h) for dy in (-h, h)
)
def _pad_cells(self, shape, box: IntBox, margin: int):
"""Cells where a trace square ``margin`` wide around the centre overlaps
the pad: its box when it is one, else its exact (rotated) outline,
which is what the exact engine checks against."""
cells = self._cells_in_box(box, margin)
if not isinstance(shape, Simplex) or shape.is_int_box():
yield from cells
return
for cell in cells:
c = self._cell_center(cell)
if overlaps_2d(shape, IntBox(c.x - margin, c.y - margin, c.x + margin, c.y + margin)):
yield cell
def _rasterize_obstacles(self) -> None:
margin = self.clearance + self.half_width
outline = self.board.outline
@@ -421,7 +400,7 @@ class GridRouter:
continue
net = item.net_nos[0] if item.net_nos else 0
pin_layers = [layer for layer in item.layers if layer in self.layers]
for cell in self._pad_cells(item.shape, box, margin):
for cell in self._cells_in_box(box, margin):
for layer in pin_layers:
self._pad_block.setdefault((*cell, layer), set()).add(net)
# Copper of the pin's own net: a trace inside it adds nothing,
@@ -610,19 +589,18 @@ class GridRouter:
return self.half_width if conn.narrow else self._net_half.get(conn.net_no, self.half_width)
def _spread_for(self, half: int) -> list[tuple[int, int]]:
"""Cells a trace of ``half`` also needs free: every cell out to its
extra half width, rounded up to whole cells. Blocks, halos and via
footprints are sized for a default-width trace, and copper is checked
as boxes, so anything within that square could be too close."""
"""Cells a trace of ``half`` also needs free: those whose centre is
within its extra half width (plus half a cell, for the grid)."""
extra = half - self.half_width
if extra <= 0:
return []
reach = math.ceil(extra / self.step)
reach = math.ceil(extra / self.step) + 1
limit = extra + self.step / 2
return [
(dx, dy)
for dx in range(-reach, reach + 1)
for dy in range(-reach, reach + 1)
if dx or dy
if (dx or dy) and math.hypot(dx, dy) * self.step <= limit
]
def _halo_for(self, half: int) -> list[tuple[int, int]]:
@@ -635,7 +613,7 @@ class GridRouter:
(dx, dy)
for dx in range(-reach, reach + 1)
for dy in range(-reach, reach + 1)
if (dx or dy) and max(abs(dx), abs(dy)) * self.step < need
if (dx or dy) and math.hypot(dx, dy) * self.step < need
]
return offsets
@@ -656,8 +634,8 @@ class GridRouter:
if not conn.b_group[0] and any(z.layer in self._power_layers for z in conn.b_group[1]):
# the plane is everywhere: aim at where the route starts instead
goal_cell = self._group_target(conn.a_group)
starts = self._group_ends(conn.a_group, conn.net_no, conns, allow_ripup)
goals = self._group_ends(conn.b_group, conn.net_no, conns, allow_ripup)
starts = self._group_ends(conn.a_group, conn.net_no, conns)
goals = self._group_ends(conn.b_group, conn.net_no, conns)
if not starts or not goals:
return None
# A start that is already an end joins at once, except that ending on
@@ -678,19 +656,10 @@ class GridRouter:
came_from: dict[Node, Node] = {}
# a stub costs its length, so the nearest cell wins unless it is blocked
# a pin end costs its stub; a zone or plane end is entered normally
# (and in rip-up mode the rip penalty of whatever lies on it)
goal_stub = {
n: self._stub_cost(p, n) + self._end_penalty(p, n, net_no, allow_ripup, conns)
for n, p in goals.items()
if isinstance(p, Pin)
}
goal_stub = {n: self._stub_cost(p, n) for n, p in goals.items() if isinstance(p, Pin)}
for s in sorted(starts):
pin = starts[s]
g_score[s] = (
self._stub_cost(pin, s) + self._end_penalty(pin, s, net_no, allow_ripup, conns)
if isinstance(pin, Pin)
else 0.0
)
g_score[s] = self._stub_cost(pin, s) if isinstance(pin, Pin) else 0.0
heapq.heappush(open_heap, (g_score[s] + self._h(s, goal_cell), s))
# Via footprints are checked lazily: a layer change goes on the heap as
@@ -821,52 +790,24 @@ class GridRouter:
math.hypot(loc.x - point.x, loc.y - point.y) < reach for loc, reach in self._tht_holes
)
def _stub_points(self, pin_location: IntPoint, cell: Cell) -> list[IntPoint]:
"""The stub's corners, from the pin to its cell centre.
The direct segment is fine for 45-degree routing. Orthogonal routing
leaves the pin straight along the axis it is further off the cell on
and jogs across to the centre at the end: an L of two flush boxes,
which is what the exact check sees. A single slanted segment is
checked as its bounding box there, and a 1 mm trace to a column
0.1 mm off a 1.27 mm pitch pin's centreline then lands inside the
clearance of the pad next door, though the straight exit clears it.
"""
end = self._cell_center(cell)
dx, dy = end.x - pin_location.x, end.y - pin_location.y
if not self._orthogonal or dx == 0 or dy == 0:
return [pin_location, end]
if abs(dx) >= abs(dy):
return [pin_location, IntPoint(end.x, pin_location.y), end]
return [pin_location, IntPoint(pin_location.x, end.y), end]
def _stub_cells(self, pin_location: IntPoint, cell: Cell, half: int | None = None) -> list[Cell]:
"""Cells where another net's trace would come too close to the stub."""
from freeroute.board.outline import _point_segment
points = self._stub_points(pin_location, cell)
end = points[-1]
end = self._cell_center(cell)
reach = (half or self._cur_half) + self.half_width + self.clearance
box = IntBox(
min(pin_location.x, end.x), min(pin_location.y, end.y),
max(pin_location.x, end.x), max(pin_location.y, end.y),
)
legs = list(zip(points, points[1:], strict=False))
return [
c
for c in self._cells_in_box(box, reach)
if min(_point_segment(self._cell_center(c), a, b) for a, b in legs) < reach
if _point_segment(self._cell_center(c), pin_location, end) < reach
]
def _stub_clear(
self,
pin: Pin,
cell: Cell,
layer: int,
net_no: int,
conns,
keepouts_only: bool = False,
allow_ripup: bool = False,
self, pin: Pin, cell: Cell, layer: int, net_no: int, conns, keepouts_only: bool = False
) -> bool:
keepouts = self._keepout_boxes.get(layer)
if keepouts:
@@ -874,9 +815,9 @@ class GridRouter:
# engine will: its copper grown by clearance must miss every keepout
from freeroute.geometry.polyline import Polyline, PolylineShape
points = self._stub_points(pin.location, cell)
if points[-1] != pin.location:
for tile in PolylineShape(Polyline(points), self._cur_half).tiles():
end = self._cell_center(cell)
if end != pin.location:
for tile in PolylineShape(Polyline([pin.location, end]), self._cur_half).tiles():
grown = tile.offset(self.clearance)
if any(k.overlaps(grown if needs else tile) for k, needs in keepouts):
return False
@@ -886,60 +827,14 @@ class GridRouter:
return False
if keepouts_only:
return True
owners = self._stub_owners(pin, cell, layer, net_no, conns)
# in rip-up mode a route on the stub is one more to rip, unless it may not be
return not owners or (
allow_ripup and all(conns[i].rip_count < self.rip_cap for i in owners)
)
def _stub_tiles(self, pin_location: IntPoint, cell: Cell, half: int) -> list[IntBox]:
"""The stub's copper: its legs, and a square at each corner and at the
cell end, where the route carries on."""
points = self._stub_points(pin_location, cell)
tiles = [corner_box(point, half) for point in points[1:]]
if len(points) > 1 and points[-1] != pin_location:
from freeroute.geometry.polyline import Polyline, PolylineShape
tiles += PolylineShape(Polyline(points), half).tiles()
return tiles
def _stub_owners(
self, pin: Pin, cell: Cell, layer: int, net_no: int, conns, half: int | None = None
) -> set[int]:
"""Other nets' routes whose copper the stub from ``pin`` to ``cell`` would touch."""
owners: set[int] = set()
grown = None
for c in self._stub_cells(pin.location, cell, half):
node = (*c, layer)
owner = self._cell_owner.get(node)
if owner is not None and conns[owner].net_no != net_no and owner not in owners:
# Both stubs are off the grid, and each claims the cells a
# trace centred there would crowd, so two stubs side by side
# (neighbouring pins leaving straight) overlap in claims well
# before their copper comes near. Check those exactly.
other = [tiles for lay, tiles, nodes in conns[owner].stubs if node in nodes]
if other:
if grown is None:
grown = [
t.offset(self.clearance)
for t in self._stub_tiles(pin.location, cell, half or self._cur_half)
]
if not any(g.overlaps(t) for tiles in other for t in tiles for g in grown):
continue
owners.add(owner)
for c in self._stub_cells(pin.location, cell):
owner = self._cell_owner.get((*c, layer))
if owner is not None and conns[owner].net_no != net_no:
return False
via_owner = self._via_owner.get(c)
if via_owner is not None and conns[via_owner].net_no != net_no:
owners.add(via_owner)
return owners
def _end_penalty(self, pin: Pin, node: Node, net_no: int, allow_ripup: bool, conns) -> float:
"""Rip-up cost of starting or ending on ``node``: the routes on its
cell and on the stub to it, each at the penalty entering it would cost."""
if not allow_ripup:
return 0.0
owners = self._stub_owners(pin, node[:2], node[2], net_no, conns)
owners |= self._crossed_owners([node], net_no, conns)
return sum(self.rip_penalty * (1 + conns[i].rip_count) for i in owners)
return False
return True
def _zone_nodes(self, zone) -> list[Node]:
"""Cells of a zone where a via of this net fits inside its copper; for a
@@ -987,13 +882,11 @@ class GridRouter:
return zone.name or "zone"
return ""
def _group_ends(
self, group, net_no: int, conns, allow_ripup: bool = False
) -> dict[Node, Pin | None]:
def _group_ends(self, group, net_no: int, conns) -> dict[Node, Pin | None]:
"""End nodes of a group, each mapped to its pin (None for a zone cell)."""
ends: dict[Node, Pin | None] = {}
for pin in group[0]:
for node in sorted(self._end_nodes(pin, net_no, conns, allow_ripup)):
for node in sorted(self._end_nodes(pin, net_no, conns)):
ends.setdefault(node, pin)
for zone in group[1]:
plane = zone.layer in self._power_layers
@@ -1015,13 +908,10 @@ class GridRouter:
return (dx + dy) / self.step
return math.hypot(dx, dy) / self.step
def _end_nodes(self, pin: Pin, net_no: int, conns, allow_ripup: bool = False) -> set[Node]:
def _end_nodes(self, pin: Pin, net_no: int, conns) -> set[Node]:
"""Nodes a route may start or end on for ``pin``: the nearest cell and
its neighbours, where the cell is enterable and the stub to it is clear.
A crowded fine-pitch pin gets more than one way out. In rip-up mode a
cell or stub another route is on counts as enterable, as it does
everywhere else, or a pin whose only way out another net has taken
could never have it back."""
A crowded fine-pitch pin gets more than one way out."""
layers = [layer for layer in pin.layers if layer in self.layers]
cx, cy = self._cell_of(pin.location)
nodes: set[Node] = set()
@@ -1030,16 +920,16 @@ class GridRouter:
if not (0 <= cell[0] < self.cols and 0 <= cell[1] < self.rows):
continue
for layer in layers:
if (dx or dy) and self._enter_cost(cell, layer, net_no, allow_ripup, conns) is None:
if (dx or dy) and self._enter_cost(cell, layer, net_no, False, conns) is None:
continue
if self._stub_clear(pin, cell, layer, net_no, conns, allow_ripup=allow_ripup):
if self._stub_clear(pin, cell, layer, net_no, conns):
nodes.add((*cell, layer))
# Also offer exact escape stubs: a fine-pitch pin's nearby cells can be
# a pocket inside its own pad that leads nowhere (the grid columns miss
# the narrow legal band past the pad tip). The stub's length is its
# cost, so it is only taken where a short step would not do.
if self._orthogonal and self._crowded(pin, net_no) and self._trapped(pin, net_no, nodes):
nodes |= self._escape_nodes(pin, net_no, conns, layers, (cx, cy), allow_ripup)
nodes |= self._escape_nodes(pin, net_no, conns, layers, (cx, cy))
if not nodes: # nothing clear: fall back to the nearest cell, as before
nodes = {(cx, cy, layer) for layer in layers}
if self._keepout_boxes and not any(
@@ -1105,16 +995,14 @@ class GridRouter:
self._trapped_cache[key] = trapped
return trapped
def _escape_nodes(
self, pin: Pin, net_no: int, conns, layers, origin: Cell, allow_ripup: bool = False
) -> set[Node]:
def _escape_nodes(self, pin: Pin, net_no: int, conns, layers, origin: Cell) -> set[Node]:
"""For a pin walled in on the grid (a fine-pitch pin whose legal band
the grid columns miss): look along each axis for the first open cell
whose stub from the pin clears every other net's pad by the full
clearance, checked on the stub's copper tiles as the exact engine
will rather than on the grid."""
from freeroute.geometry.polyline import Polyline, PolylineShape
whose straight stub from the pin clears every other net's pad by the
full margin, measured exactly rather than on the grid."""
from freeroute.board.outline import _segment_box
margin = self.half_width + self.clearance
reach = self._escape_cells
near = [
(p.shape.bounding_box(), set(p.layers))
@@ -1126,33 +1014,24 @@ class GridRouter:
]
cx, cy = origin
nodes: set[Node] = set()
# the pin's own column or row and the one either side: two pins side
# by side can then jog apart at the end of their straight exits
for (dx, dy), side in itertools.product(_NEIGHBOURS[:4], (0, -1, 1)):
sx, sy = (side, 0) if dx == 0 else (0, side)
nodes_before = len(nodes)
for dx, dy in _NEIGHBOURS[:4]:
for k in range(2, reach + 1):
cell = (cx + dx * k + sx, cy + dy * k + sy)
cell = (cx + dx * k, cy + dy * k)
if not (0 <= cell[0] < self.cols and 0 <= cell[1] < self.rows):
break
grown = [
tile.offset(self.clearance)
for tile in PolylineShape(
Polyline(self._stub_points(pin.location, cell)), self._cur_half
).tiles()
]
end = self._cell_center(cell)
for layer in layers:
if self._enter_cost(cell, layer, net_no, allow_ripup, conns) is None:
if self._enter_cost(cell, layer, net_no, False, conns) is None:
continue
if any(
layer in box_layers and any(g.overlaps(box) for g in grown)
layer in box_layers and _segment_box(pin.location, end, box) < margin
for box, box_layers in near
):
continue
if self._stub_clear(pin, cell, layer, net_no, conns, allow_ripup=allow_ripup):
if self._stub_clear(pin, cell, layer, net_no, conns):
nodes.add((*cell, layer))
if len(nodes) > nodes_before:
break # the first open cell along this line is enough
if any(n[:2] == cell for n in nodes):
break # the first open cell along this axis is enough
return nodes
def _relax(self, current, nxt, tentative, goal_cell, g_score, came_from, open_heap):
@@ -1202,25 +1081,19 @@ class GridRouter:
conn.via_halo = []
for cell in conn.via_cells:
for c in self._via_cells(cell):
claims = self._via_claims.setdefault(c, [])
if conn.index not in claims:
claims.append(conn.index)
if c not in self._via_owner:
self._via_owner[c] = conn.index
conn.via_halo.append(c)
self._via_owner.setdefault(c, conn.index)
ends = ((conn.a_end, wire_segs[0], 0), (conn.b_end, wire_segs[-1], -1)) if wire_segs else ()
conn.stubs = []
for pin, (layer, cells), at in ends:
if not isinstance(pin, Pin):
continue # ended on a zone or a plane: no stub
cell = cells[at]
claimed: set[Node] = set()
for c in self._stub_cells(pin.location, cell, half):
node = (*c, layer)
if node not in self._cell_owner:
self._cell_owner[node] = conn.index
conn.trace_cells.append((c, layer))
claimed.add(node)
conn.stubs.append((layer, self._stub_tiles(pin.location, cell, half), claimed))
# A pin inside a wire keepout can only leave by a via. Its stub to the
# cell centre would be track inside the keepout, so the via goes on
# the pin itself (a via in its own pad) and the stub is left out.
@@ -1238,9 +1111,9 @@ class GridRouter:
continue
points = [self._cell_center(c) for c in cells]
if idx == 0 and isinstance(conn.a_end, Pin):
points[0:0] = self._stub_points(conn.a_end.location, cells[0])[:-1]
points.insert(0, conn.a_end.location)
if idx == len(wire_segs) - 1 and isinstance(conn.b_end, Pin):
points.extend(self._stub_points(conn.b_end.location, cells[-1])[-2::-1])
points.append(conn.b_end.location)
points = _simplify(points)
if len(points) >= 2:
conn.wires.append((layer, points))
@@ -1256,16 +1129,8 @@ class GridRouter:
if self._cell_owner.get((*cell, layer)) == conn.index:
del self._cell_owner[(*cell, layer)]
for cell in conn.via_halo:
claims = self._via_claims.get(cell)
if claims is not None and conn.index in claims:
claims.remove(conn.index)
if self._via_owner.get(cell) == conn.index:
if claims:
self._via_owner[cell] = claims[0]
else:
del self._via_owner[cell]
if claims is not None and not claims:
del self._via_claims[cell]
del self._via_owner[cell]
conn.via_halo = []
for node in conn.halo_nodes:
claims = self._halo.get(node)
@@ -1275,7 +1140,6 @@ class GridRouter:
del self._halo[node]
conn.halo_nodes = []
conn.trace_cells = []
conn.stubs = []
for cell in conn.via_cells:
count = self._via_nets.get(cell)
if count and count.get(conn.net_no):
@@ -1289,20 +1153,7 @@ class GridRouter:
conn.rip_count += 1
self._settle(conn, +1)
def _crossed_owners(
self, path: list[Node], net_no: int, conns: list[_Connection], spread=None
) -> set[int]:
"""Connections whose copper or clearance ``path`` crosses; a trace
wider than the default crosses them on its ``spread`` cells too."""
spread = self._spread if spread is None else spread
if spread:
path = list(
dict.fromkeys(
(x + dx, y + dy, layer)
for x, y, layer in path
for dx, dy in ((0, 0), *spread)
)
)
def _crossed_owners(self, path: list[Node], net_no: int, conns: list[_Connection]) -> set[int]:
owners: set[int] = set()
for cx, cy, cl in path:
owner = self._cell_owner.get((cx, cy, cl))
@@ -1421,16 +1272,7 @@ class GridRouter:
path = self._search(conn, allow_ripup=True, conns=conns)
if path is None:
return False
crossed = self._crossed_owners(
path, conn.net_no, conns, self._spread_for(self._conn_half(conn))
)
# and the routes on the stubs from the pins to the path's ends
for end, node in ((conn.a_end, path[0]), (conn.b_end, path[-1])):
if isinstance(end, Pin):
crossed |= self._stub_owners(
end, node[:2], node[2], conn.net_no, conns, self._conn_half(conn)
)
victims = [conns[i] for i in sorted(crossed)]
victims = [conns[i] for i in sorted(self._crossed_owners(path, conn.net_no, conns))]
if self.rollback:
return self._ripup_transaction(conn, path, victims, conns)
for victim in victims:
@@ -1518,7 +1360,7 @@ class GridRouter:
elif isinstance(item, Trace) and not item.is_empty():
boxes = list(PolylineShape(Polyline(item.corners), item.half_width).tiles())
boxes += [corner_box(e, item.half_width) for e in (item.corners[0], item.corners[-1])]
piece = _FixedPiece([item.layer], boxes)
piece = _FixedPiece([item.layer], boxes, trace=item)
else:
continue
cache.setdefault(item.net_nos[0], []).append(piece)
@@ -1640,12 +1482,13 @@ def _fixed_joins_zone(piece, zone, plane: bool) -> bool:
class _FixedPiece:
"""One track or via already on the board, as connectivity."""
__slots__ = ("layers", "boxes", "via")
__slots__ = ("layers", "boxes", "via", "trace")
def __init__(self, layers, boxes, via=None) -> None:
def __init__(self, layers, boxes, via=None, trace=None) -> None:
self.layers = frozenset(layers)
self.boxes = boxes
self.via = via # the Via item, for a via
self.trace = trace # the Trace item, for a track
def _connected_groups(
@@ -1706,11 +1549,28 @@ def _connected_groups(
groups[root][1].append(zone)
for k, piece in enumerate(fixed):
root = find(base + k)
if piece.via is not None and root in groups:
if root not in groups:
continue
if piece.via is not None:
groups[root][0].append(_via_end(piece.via))
elif piece.trace is not None:
# a track's ends are places a route may start: a fan-out stub's
# far end is outside the pad row the pin sat walled in by
for end in (piece.trace.corners[0], piece.trace.corners[-1]):
groups[root][0].append(_trace_end(piece.trace, end))
return [groups[r] for r in order]
def _trace_end(trace, end: IntPoint) -> Pin:
"""An end of a fixed track as a place a route may start or end."""
from freeroute.geometry.polyline import corner_box
return Pin(
net_nos=list(trace.net_nos), fixed=True, name="track", component_ref="",
location=end, layers=[trace.layer], shape=corner_box(end, trace.half_width),
)
def _via_end(via) -> Pin:
"""A fixed via as a place a route may start or end (not a pad to route)."""
return Pin(
+56
View File
@@ -88,6 +88,42 @@ def _dsn_units_per_um(dsn: DsnBoard) -> float:
return {"um": 1.0, "mm": 0.001, "mil": 1 / 25.4, "inch": 1 / 25400}.get(dsn.unit, 1.0)
def _place_fanout(
board, dsn, scale, layers, width, clearance, edge, hole_to_hole_mm, mode=True, min_pins=32
) -> None:
"""Put the fan-out's stubs and vias on the board, before routing."""
from .fanout import FanoutRules, plan_fanout
via_half = _via_half_board(dsn, scale) or max(width // 2, 1)
rules = FanoutRules(
trace_width=width,
clearance=clearance,
via_half=via_half,
via_drill=_via_drill_board(dsn, scale) or 2 * via_half,
hole_to_hole=_mm_to_board(dsn, scale, hole_to_hole_mm) or 0,
edge_clearance=edge or 0,
signal_layers=layers or [i for i, layer in enumerate(dsn.layers) if layer.is_signal],
via_padstack=_via_padstack(dsn),
min_pins=min_pins,
supply_only=mode == "supply",
)
for item in plan_fanout(board, rules):
board.insert(item)
def _add_generated(result, board) -> None:
"""The fan-out's copper goes into the session with the routes."""
from freeroute.board.items import Trace, Via
for item in board.get_items():
if not getattr(item, "generated", False) or not item.net_nos:
continue
if isinstance(item, Trace):
result.add_wire(item.net_nos[0], item.layer, list(item.corners))
elif isinstance(item, Via):
result.add_via(item.net_nos[0], item.location)
def _via_half_board(dsn: DsnBoard, scale: int) -> int | None:
"""Half the via pad's size in board units, from the DSN's via padstack.
@@ -119,6 +155,8 @@ def route_dsn_board(
route_first: frozenset | None = None,
access_cost: float = 0.0,
hole_to_hole_mm: float = 0.25,
fanout: bool | str = False,
fanout_min_pins: int = 32,
rollback: bool = True,
) -> tuple[RouteResult, int, list[str]]:
"""Route a parsed :class:`DsnBoard`; return the board-unit result, the scale,
@@ -130,6 +168,9 @@ def route_dsn_board(
edge_clearance_board = _mm_to_board(dsn, scale, edge_clearance_mm)
width_board = round(_rule_width_dsn(dsn) * scale)
clearance_board = round(_rule_clearance_dsn(dsn) * scale)
if fanout:
_place_fanout(board, dsn, scale, layers, width_board, clearance_board,
edge_clearance_board, hole_to_hole_mm, fanout, fanout_min_pins)
result = route_board(
board,
resolution=resolution,
@@ -148,6 +189,7 @@ def route_dsn_board(
via_drill=_via_drill_board(dsn, scale),
hole_to_hole=_mm_to_board(dsn, scale, hole_to_hole_mm) or 0,
)
_add_generated(result, board)
return result, scale, [layer.name for layer in dsn.layers]
@@ -197,6 +239,8 @@ def build_routing_result(
route_first: frozenset | None = None,
access_cost: float = 0.0,
hole_to_hole_mm: float = 0.25,
fanout: bool | str = False,
fanout_min_pins: int = 32,
rollback: bool = True,
) -> RoutingResult:
"""Route ``dsn`` (grid track) and convert to a DSN-unit RoutingResult."""
@@ -206,6 +250,8 @@ def build_routing_result(
route_first=route_first,
access_cost=access_cost,
hole_to_hole_mm=hole_to_hole_mm,
fanout=fanout,
fanout_min_pins=fanout_min_pins,
rollback=rollback,
)
return _to_routing_result(route, dsn, scale, layer_names)
@@ -226,6 +272,8 @@ def route_dsn_board_exact(
route_first: frozenset | None = None,
access_cost: float = 0.0,
hole_to_hole_mm: float = 0.25,
fanout: bool | str = False,
fanout_min_pins: int = 32,
rollback: bool = True,
) -> tuple[ExactRouteResult, int, list[str]]:
"""Route a parsed :class:`DsnBoard` with the exact-geometry (orthogonal,
@@ -238,6 +286,9 @@ def route_dsn_board_exact(
edge_clearance_board = _mm_to_board(dsn, scale, edge_clearance_mm)
width_board = round(_rule_width_dsn(dsn) * scale)
clearance_board = round(_rule_clearance_dsn(dsn) * scale)
if fanout:
_place_fanout(board, dsn, scale, layers, width_board, clearance_board,
edge_clearance_board, hole_to_hole_mm, fanout, fanout_min_pins)
exact = route_board_exact(
board,
resolution=resolution,
@@ -259,6 +310,7 @@ def route_dsn_board_exact(
via_drill=_via_drill_board(dsn, scale),
hole_to_hole=_mm_to_board(dsn, scale, hole_to_hole_mm) or 0,
)
_add_generated(exact.result, board)
return exact, scale, [layer.name for layer in dsn.layers]
@@ -277,6 +329,8 @@ def build_exact_routing_result(
route_first: frozenset | None = None,
access_cost: float = 0.0,
hole_to_hole_mm: float = 0.25,
fanout: bool | str = False,
fanout_min_pins: int = 32,
rollback: bool = True,
) -> RoutingResult:
"""Route ``dsn`` (exact track) and convert to a DSN-unit RoutingResult."""
@@ -294,6 +348,8 @@ def build_exact_routing_result(
route_first=route_first,
access_cost=access_cost,
hole_to_hole_mm=hole_to_hole_mm,
fanout=fanout,
fanout_min_pins=fanout_min_pins,
rollback=rollback,
)
return _to_routing_result(exact.result, dsn, scale, layer_names)
+78
View File
@@ -0,0 +1,78 @@
"""--fanout: fine-pitch pins get their way out committed before routing."""
from __future__ import annotations
from freeroute.board import build_board
from freeroute.board.items import Trace, Via
from freeroute.dsn import parse_dsn
from freeroute.route.fanout import FanoutRules, plan_fanout
from freeroute.route.pipeline import route_dsn_board_exact
# a 12-pad package, 3 pads a side at 0.5 mm pitch, over a GND plane on In1;
# pad 1 (left side, top) is GND, the rest are signals to far connector pads
_SIDES = {
"L": [(-2000, y, 0) for y in (500, 0, -500)],
"R": [(2000, y, 0) for y in (500, 0, -500)],
"T": [(x, 2000, 90) for x in (-500, 0, 500)],
"B": [(x, -2000, 90) for x in (-500, 0, 500)],
}
_PADS = [p for side in "LRTB" for p in _SIDES[side]]
def _dsn():
pins = "\n ".join(
f"(pin {'padv' if r else 'padh'} {i + 1} {x} {y})" for i, (x, y, r) in enumerate(_PADS)
)
far = " ".join(f"(place C{i} {3000 + 2000 * (i % 5)} {-12000 - 2000 * (i // 5)} front 0)" for i in range(11))
nets = "(net GND (pins U1-1))\n " + "\n ".join(f"(net S{i} (pins U1-{i + 2} C{i}-1))" for i in range(11))
return f"""(pcb pkg (parser) (resolution um 10) (unit um)
(structure
(layer F.Cu (type signal)) (layer In1.Cu (type power)) (layer In2.Cu (type power))
(layer B.Cu (type signal))
(boundary (path pcb 0 -15000 15000 25000 15000 25000 -25000 -15000 -25000 -15000 15000))
(plane GND (polygon In1.Cu 0 -14500 14500 24500 14500 24500 -24500 -14500 -24500 -14500 14500))
(via "Via[0-3]_450:200_um") (rule (width 150) (clearance 150)))
(placement (component Q (place U1 0 0 front 0)) (component P {far}))
(library
(image Q
{pins})
(image P (pin padc 1 0 0))
(padstack padh (shape (rect F.Cu -400 -125 400 125)) (attach off))
(padstack padv (shape (rect F.Cu -125 -400 125 400)) (attach off))
(padstack padc (shape (rect F.Cu -500 -500 500 500)) (attach off))
(padstack "Via[0-3]_450:200_um" (shape (circle F.Cu 450)) (shape (circle B.Cu 450)) (attach off)))
(network {nets}))"""
def _rules(dsn):
s = dsn.resolution.value
return FanoutRules(trace_width=150 * s, clearance=150 * s, via_half=225 * s, via_drill=200 * s,
hole_to_hole=250 * s, edge_clearance=0, signal_layers=[0, 3],
via_padstack="Via[0-3]_450:200_um", min_pins=8)
def test_every_pin_gets_a_stub_outward_past_its_pad():
dsn = parse_dsn(_dsn())
board = build_board(dsn)
items = plan_fanout(board, _rules(dsn))
stubs = [i for i in items if isinstance(i, Trace)]
assert len(stubs) == 12
for stub in stubs:
a, b = stub.corners
pin = next(p for p in board.get_pins() if p.location == a)
pad = pin.shape.bounding_box()
# outward: the stub ends further from the package centre, outside its pad
assert abs(b.x) + abs(b.y) > abs(a.x) + abs(a.y)
assert not (pad.ll.x <= b.x <= pad.ur.x and pad.ll.y <= b.y <= pad.ur.y)
def test_a_plane_pin_gets_a_via_and_needs_no_route():
dsn = parse_dsn(_dsn())
board = build_board(dsn)
items = plan_fanout(board, _rules(dsn))
assert len([i for i in items if isinstance(i, Via)]) == 1
exact, _scale, _ = route_dsn_board_exact(dsn, resolution=2, fanout=True, fanout_min_pins=8)
gnd = next(i + 1 for i, n in enumerate(dsn.nets) if n.name == "GND")
assert not any(f[0] == gnd for f in exact.result.failed)
assert exact.drc_clean
assert len(exact.result.vias.get(gnd, [])) == 1 # the fan-out's, written out
-227
View File
@@ -1,227 +0,0 @@
"""The grid must not believe copper legal that the exact check then refuses.
Each case is one way the two used to disagree on roomba-ESP12E: a rotated oval
pad modelled as an inflated box (and opened to its own net), a via shared by
two connections of a net losing its footprint when one of them is ripped, and
a wider net class searched as if it were the default width.
"""
from __future__ import annotations
import math
import pytest
from freeroute.board import build_board
from freeroute.dsn import parse_dsn
from freeroute.geometry import IntBox, Simplex
from freeroute.route.grid_router import GridRouter
from freeroute.route.pipeline import (
_rule_clearance_dsn,
_rule_width_dsn,
_via_half_board,
build_exact_routing_result,
)
# --- rotated oval pads -------------------------------------------------------
def _socket_dsn(rotation: float, layout: str) -> str:
"""A 1x4 2.54 mm socket strip (rect pin 1, oval pins 2-4) at ``rotation``,
each pin its own net, routed to a small SMD pad 0.9 mm away."""
cx, cy = 100000, -100000
t = math.radians(rotation)
ax = (math.cos(t), math.sin(t))
perp = (-math.sin(t), math.cos(t))
places = []
for i in range(4):
px, py = cx + 2540 * i * ax[0], cy + 2540 * i * ax[1]
side = 1 if i % 2 == 0 else -1
if layout == "y":
tx, ty = px, py + side * 9000
else:
tx, ty = px + side * 8000 * perp[0], py + side * 8000 * perp[1]
places.append(f"(place T{i + 1} {round(tx)} {round(ty)} front 0)")
nets = " ".join(f"(net N{i} (pins P3-{i + 1} T{i + 1}-1))" for i in range(4))
return f"""(pcb socket (parser) (resolution um 10) (unit um)
(structure
(layer F.Cu (type signal)) (layer B.Cu (type signal))
(boundary (path pcb 0 125000 -115000 85000 -115000 85000 -75000 125000 -75000
125000 -115000))
(via "Via[0-1]_800:400_um")
(rule (width 300) (clearance 250)))
(placement
(component S (place P3 {cx} {cy} front {rotation}))
(component T {" ".join(places)}))
(library
(image S (pin R 1 0 0) (pin O 2 2540 0) (pin O 3 5080 0) (pin O 4 7620 0))
(image T (pin t 1 0 0))
(padstack O (shape (path F.Cu 1727.2 0 -152.4 0 152.4))
(shape (path B.Cu 1727.2 0 -152.4 0 152.4)) (attach off))
(padstack R (shape (rect F.Cu -863.6 -1016 863.6 1016))
(shape (rect B.Cu -863.6 -1016 863.6 1016)) (attach off))
(padstack t (shape (rect F.Cu -500 -500 500 500)) (attach off))
(padstack "Via[0-1]_800:400_um" (shape (circle F.Cu 800)) (shape (circle B.Cu 800))
(attach off)))
(network {nets}
(class c N0 N1 N2 N3 (circuit (use_via "Via[0-1]_800:400_um"))
(rule (width 300) (clearance 250)))))"""
def test_a_rotated_oval_pad_is_its_outline_not_its_bounding_box():
board = build_board(parse_dsn(_socket_dsn(60, "y")))
oval = next(p for p in board.get_pins() if p.component_ref == "P3" and p.name == "2")
assert isinstance(oval.shape, Simplex) and not oval.shape.is_int_box()
box = oval.shape.bounding_box()
assert oval.shape.contains(oval.location)
assert not oval.shape.contains(box.ll) and not oval.shape.contains(box.ur)
@pytest.mark.parametrize("layout", ["y", "perp"])
def test_routes_leaving_a_rotated_socket_pass_the_exact_check(layout):
result = build_exact_routing_result(
parse_dsn(_socket_dsn(60, layout)), resolution=2, shove=True
)
assert result.unrouted == []
# --- a via two connections share --------------------------------------------
_SHARED_VIA = """(pcb shared (parser) (resolution um 10) (unit um)
(structure
(layer Top (type signal)) (layer Bottom (type signal))
(boundary (path pcb 0 0 0 20000 0 20000 -20000 0 -20000 0 0))
(via "Via[0-1]_800:400_um")
(rule (width 300) (clearance 250)))
(library
(padstack p (shape (rect Top -400 -400 400 400)) (attach off))
(padstack "Via[0-1]_800:400_um" (shape (circle Top 800)) (shape (circle Bottom 800))
(attach off))
(image PAD (pin p 1 0 0)))
(placement (component PAD
(place G1 3000 -5000 front 0) (place G2 3000 -15000 front 0)
(place G3 17000 -10000 front 0) (place S1 3000 -10000 front 0)
(place S2 17000 -3000 front 0)))
(network (net GND (pins G1-1 G2-1 G3-1)) (net SIG (pins S1-1 S2-1))))"""
def _line(a, b, layer):
(x, y), (x1, y1) = a, b
out = [(x, y, layer)]
while x != x1:
x += 1 if x1 > x else -1
out.append((x, y, layer))
while y != y1:
y += 1 if y1 > y else -1
out.append((x, y, layer))
return out
def test_a_shared_via_keeps_its_footprint_when_one_user_is_ripped():
dsn = parse_dsn(_SHARED_VIA)
s = dsn.resolution.value
router = GridRouter(
build_board(dsn),
trace_width=round(_rule_width_dsn(dsn) * s),
clearance=round(_rule_clearance_dsn(dsn) * s),
via_half=_via_half_board(dsn, s),
)
conns = router._conns = router._build_connections()
gnd = [c for c in conns if len({c.a.component_ref, c.b.component_ref} & {"G1", "G2", "G3"})]
sig = next(c for c in conns if c not in gnd)
first, second = gnd
g3 = router._cell_of(next(p for p in router.board.get_pins() if p.component_ref == "G3").location)
via = (g3[0] - 10, g3[1])
def through_via(conn):
a, b = router._cell_of(conn.a.location), router._cell_of(conn.b.location)
return _line(a, via, 0) + _line(via, b, 1)
router._commit(first, through_via(first))
router._commit(second, through_via(second))
footprint = [c for c in router._via_cells(via) if c != via]
router._rip(first)
assert second.routed and via in second.via_cells
assert all(router._via_owner.get(c) == second.index for c in footprint)
# another net still keeps its distance from the via that is left
assert all(router._enter_cost_base(c, 0, sig.net_no, False, conns) is None for c in footprint)
# --- a wider net class --------------------------------------------------------
_WIDE = """(pcb wide (parser) (resolution um 10) (unit um)
(structure
(layer F.Cu (type signal))
(boundary (path pcb 0 0 0 20000 0 20000 -10000 0 -10000 0 0))
(rule (width 300) (clearance 250)))
(placement (component S (place P1 2000 -5000 front 0) (place P2 18000 -5000 front 0)
(place Q1 10000 {ylo} front 0) (place Q2 10000 {yhi} front 0)
(place Q3 10000 -1000 front 0) (place Q4 10000 -9000 front 0)))
(library (image S (pin pad 1 0 0)) (padstack pad (shape (rect F.Cu -600 -600 600 600)) (attach off)))
(network (net PWR (pins P1-1 P2-1)) (net SIG (pins Q1-1 Q3-1)) (net SIG2 (pins Q2-1 Q4-1))
(class Power PWR (rule (width 500) (clearance 250)))))"""
@pytest.mark.parametrize("resolution", [1, 2])
@pytest.mark.parametrize("gap", [900, 1000, 1075])
def test_a_wide_net_past_pads_it_does_not_fit_between_is_not_refused(gap, resolution):
# 0.3 mm fits the gap between the two pads, 0.5 mm does not: the grid
# must see that, rather than lay it wide and have the exact check drop it
ylo, yhi = -5000 - gap // 2 - 600, -5000 + gap // 2 + 600
result = build_exact_routing_result(
parse_dsn(_WIDE.format(ylo=ylo, yhi=yhi)), resolution=resolution
)
assert result.unrouted == []
def _wide_router():
dsn = parse_dsn(_WIDE.format(ylo=-6050, yhi=-3950))
s = dsn.resolution.value
pwr = next(i for i, net in enumerate(dsn.nets, 1) if net.name == "PWR")
return GridRouter(
build_board(dsn),
trace_width=round(_rule_width_dsn(dsn) * s),
clearance=round(_rule_clearance_dsn(dsn) * s),
resolution=2,
net_widths={pwr: 5000},
), pwr
def test_a_wide_trace_keeps_clear_of_a_default_one_at_the_grid_diagonal():
router, _pwr = _wide_router()
# 0.5 mm against 0.3 mm needs 0.25 + 0.25 + 0.15 = 0.65 mm between centres,
# on either axis, since the exact check compares boxes
need = 2500 + router.clearance + router.half_width
for dx, dy in [(2, 2), (2, 1), (1, 2)]:
assert max(dx, dy) * router.step < need
assert (dx, dy) in router._halo_for(2500)
def test_a_wide_rip_up_route_counts_what_its_extra_width_crosses():
router, pwr_net = _wide_router()
conns = router._conns = router._build_connections()
pwr = next(c for c in conns if c.net_no == pwr_net)
other = next(c for c in conns if c.net_no != pwr_net)
# a default-width trace two cells from the wide route's path
x, y = 20, 5
router._commit(other, _line((x - 3, y + 2), (x + 3, y + 2), 0))
path = _line((x - 3, y), (x + 3, y), 0)
spread = router._spread_for(2500)
assert other.index not in router._crossed_owners(path, pwr.net_no, conns)
assert other.index in router._crossed_owners(path, pwr.net_no, conns, spread)
def test_a_pad_cell_check_uses_the_rotated_outline():
board = build_board(parse_dsn(_socket_dsn(60, "y")))
router = GridRouter(board, trace_width=3000, clearance=2500, resolution=2)
oval = next(p for p in board.get_pins() if p.component_ref == "P3" and p.name == "2")
box = oval.shape.bounding_box()
margin = router.clearance + router.half_width
exact = set(router._pad_cells(oval.shape, box, margin))
boxed = set(router._cells_in_box(box, margin))
assert exact < boxed
for cell in boxed - exact:
c = router._cell_center(cell)
square = IntBox(c.x - margin, c.y - margin, c.x + margin, c.y + margin)
assert oval.shape.intersection(square).dimension() != 2
+5 -8
View File
@@ -51,22 +51,19 @@ def test_routes_keep_edge_clearance_at_a_rounded_corner():
assert outline.edge_distance(p) >= half + 500 * scale - 1
@pytest.mark.parametrize("resolution", [1, 4])
def test_every_pin_of_a_half_millimetre_pitch_row_escapes(resolution):
@pytest.mark.parametrize(("resolution", "escape"), [(1, 2), (4, 5)])
def test_every_pin_of_a_half_millimetre_pitch_row_escapes(resolution, escape):
# Five 0.3 mm pads at 0.5 mm pitch, each wired to its own pad 8 mm away.
# Between two neighbours a trace's centre has a legal band only 0.15 mm
# wide. At resolution 4 the 0.1 mm columns cannot miss it. At resolution
# 1 the 0.4 mm grid misses most bands, but a stub leaves its pin straight
# along the band and jogs to the column only past the pads, so every pin
# gets out there too, as the JAR manages (only 2 did before).
# wide. At resolution 1 the 0.4 mm grid misses most bands; at 4 its
# 0.1 mm columns cannot, and every pin gets out, as the JAR manages.
places = " ".join(f"(place R{i} {6000 + 500 * i} -6000 front 0)" for i in range(5))
places += " " + " ".join(f"(place F{i} {6000 + 500 * i} -14000 front 0)" for i in range(5))
nets = " ".join(f"(net N{i} (pins R{i}-1 F{i}-1))" for i in range(5))
result, _, _ = route_dsn_board_exact(
parse_dsn(_dsn(f"(component P {places})", nets)), resolution=resolution
)
assert len(result.routed_net_numbers) == 5
assert result.drc_clean
assert len(result.routed_net_numbers) == escape
def test_resolution_one_has_no_halo_so_the_grid_is_unchanged():
-58
View File
@@ -1,58 +0,0 @@
"""Pins of a 1.27 mm pitch row routed at 1.0 mm (the RN2483 module on the
TTN Enschede mote). A trace centre has to stay within 0.06 mm of a pin's
centreline to pass its neighbours, which no grid column hits, so a route
leaves each pin straight along that line and only jogs to its column once
past the pads. FreeRouting routes this row in full the same way."""
from __future__ import annotations
import pytest
from freeroute.board import build_board
from freeroute.board.items import Pin
from freeroute.dsn import parse_dsn
from freeroute.geometry import IntPoint
from freeroute.route.grid_router import GridRouter
from freeroute.route.pipeline import route_dsn_board_exact
def _row(x0: int, pins: int = 6, skew: int = 3000) -> str:
places = " ".join(f"(place R{i} {x0 + 1270 * i} -5000 front 0)" for i in range(pins))
places += " " + " ".join(
f"(place T{i} {x0 + 1270 * i + skew} -15000 front 0)" for i in range(pins)
)
nets = " ".join(f"(net N{i} (pins R{i}-1 T{i}-1))" for i in range(pins))
return f"""(pcb t (parser) (resolution um 10) (unit um)
(structure (layer F.Cu (type signal)) (layer B.Cu (type signal))
(boundary (path pcb 0 0 0 30000 0 30000 -20000 0 -20000 0 0))
(via "Via[0-1]_600:400_um") (rule (width 1000) (clearance 200)))
(placement (component P {places}))
(library (image P (pin pad 1 0 0))
(padstack pad (shape (rect F.Cu -508 -762 508 762)) (attach off))
(padstack "Via[0-1]_600:400_um" (shape (circle F.Cu 600)) (shape (circle B.Cu 600))
(attach off)))
(network {nets}))"""
@pytest.mark.parametrize("x0", [5000, 5150, 5300])
def test_every_pin_of_a_row_leaves_straight_and_routes(x0):
# three offsets of the row against the grid; before, 2 or 3 of 6 routed
result, _, _ = route_dsn_board_exact(parse_dsn(_row(x0)), resolution=2)
assert len(result.routed_net_numbers) == 6
assert result.drc_clean
def test_a_walled_in_pin_may_escape_to_the_column_either_side():
# two pins side by side leaving the same way can then jog apart
board = build_board(parse_dsn(_row(5000)))
router = GridRouter(board, trace_width=10000, clearance=2000, orthogonal=True, resolution=2)
router._conns = router._build_connections()
pin = next(
p for p in board.get_items()
if isinstance(p, Pin) and p.location == IntPoint(50000 + 2 * 12700, -50000)
)
net = pin.net_nos[0]
cx, cy = router._cell_of(pin.location)
nodes = router._escape_nodes(pin, net, router._conns, [0], (cx, cy))
columns = {x for x, y, _ in nodes if y != cy}
assert {cx - 1, cx, cx + 1} <= columns
+1
View File
@@ -159,6 +159,7 @@ def test_cli_supported_combinations_are_accepted(tmp_path):
"promote": ["--promote-failures", "2"],
"access": ["--access-cost", "5"],
"rollback": ["--no-rollback"],
"fanout": ["--fanout"],
}
for engine, options in ENGINE_OPTIONS.items():
for option in options: