rsp2k
6e852a929b
A fixed via sits anywhere, not on a cell centre, and may have a bigger drill than the router's via; checking hole spacing between cell centres with one drill let the flight controller's routed 0.2 mm via come 0.19 mm from a hand-placed 0.25 mm one. The board now carries each fixed via's drill (from KiCad's padstack name), and cells are checked against fixed vias exactly.
127 lines
5.9 KiB
Python
127 lines
5.9 KiB
Python
"""Vias keep hole-to-hole spacing, even within one net."""
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from __future__ import annotations
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import itertools
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import math
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from freeroute.dsn import parse_dsn
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from freeroute.route.pipeline import route_dsn_board_exact
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# four GND pads 0.5 mm apart over a GND plane: each drops a via to the plane
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_DSN = """(pcb holes (parser) (resolution um 10) (unit um)
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(structure
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(layer F.Cu (type signal)) (layer In1.Cu (type power)) (layer In2.Cu (type power))
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(layer B.Cu (type signal))
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(boundary (path pcb 0 0 0 20000 0 20000 -20000 0 -20000 0 0))
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(plane GND (polygon In1.Cu 0 500 -500 19500 -500 19500 -19500 500 -19500 500 -500))
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(via "Via[0-3]_500:300_um") (rule (width 150) (clearance 150)))
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(placement (component S (place G1 9000 -10000 front 0) (place G2 9500 -10000 front 0)
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(place G3 10000 -10000 front 0) (place G4 10500 -10000 front 0)))
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(library
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(image S (pin smd 1 0 0))
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(padstack smd (shape (rect F.Cu -150 -300 150 300)) (attach off))
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(padstack "Via[0-3]_500:300_um" (shape (circle F.Cu 500)) (shape (circle B.Cu 500)) (attach off)))
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(network (net GND (pins G1-1 G2-1 G3-1 G4-1))))"""
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def test_a_nets_own_vias_keep_hole_to_hole_spacing():
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dsn = parse_dsn(_DSN)
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exact, scale, _ = route_dsn_board_exact(dsn, resolution=2)
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assert exact.result.failed == []
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vias = exact.result.vias[1]
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assert len(set(vias)) == len(vias), "a via written twice"
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need = (300 + 250) * scale # drill + 0.25 mm, centre to centre
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for a, b in itertools.combinations(vias, 2):
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assert math.hypot(a.x - b.x, a.y - b.y) >= need, f"vias at {a} and {b} too close"
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def test_connections_sharing_a_plane_via_write_it_once():
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# eight GND pads 0.4 mm apart: the hole spacing makes several of them
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# end on the same plane via, which must come out once, not once each
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pads = " ".join(f"(place G{i} {9000 + 400 * i} -10000 front 0)" for i in range(8))
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pins = " ".join(f"G{i}-1" for i in range(8))
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dsn = parse_dsn(
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_DSN.replace(
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"(place G1 9000 -10000 front 0) (place G2 9500 -10000 front 0)\n"
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" (place G3 10000 -10000 front 0) (place G4 10500 -10000 front 0)",
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pads,
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)
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.replace("(pins G1-1 G2-1 G3-1 G4-1)", f"(pins {pins})")
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.replace("(rect F.Cu -150 -300 150 300)", "(rect F.Cu -125 -300 125 300)")
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)
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exact, _scale, _ = route_dsn_board_exact(dsn, resolution=2)
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vias = exact.result.vias[1]
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assert len(vias) < 8, "no via is shared, so this board no longer tests sharing"
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assert len(set(vias)) == len(vias), "a shared via written more than once"
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def _router(dsn_text, via_drill_um=300):
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from freeroute.board import build_board
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from freeroute.route.grid_router import GridRouter
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from freeroute.route.pipeline import _rule_clearance_dsn, _rule_width_dsn
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dsn = parse_dsn(dsn_text)
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s = dsn.resolution.value
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return GridRouter(
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build_board(dsn), trace_width=round(_rule_width_dsn(dsn) * s),
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clearance=round(_rule_clearance_dsn(dsn) * s), resolution=2, orthogonal=True,
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via_drill=via_drill_um * s, hole_to_hole=250 * s,
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), s
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_THT = """(pcb tht (parser) (resolution um 10) (unit um)
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(structure (layer F.Cu (type signal)) (layer B.Cu (type signal))
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(boundary (path pcb 0 0 0 20000 0 20000 -20000 0 -20000 0 0))
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(via "Via[0-1]_500:300_um") (rule (width 150) (clearance 150)))
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(placement (component T (place J1 10000 -10000 front 0)))
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(library (image T (pin tht 1 0 0))
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(padstack tht (shape (circle F.Cu 1700)) (shape (circle B.Cu 1700)) (attach off))
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(padstack "Via[0-1]_500:300_um" (shape (circle F.Cu 500)) (shape (circle B.Cu 500)) (attach off)))
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(network (net SIG (pins J1-1))))"""
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def test_no_via_goes_near_a_through_hole_pads_hole_even_of_its_own_net():
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router, s = _router(_THT)
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pin = router._cell_of(router.board.get_pins()[0].location)
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assert not router._holes_clear(pin, 1) # own net, right on the pad
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far = (pin[0] + 40, pin[1])
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assert router._holes_clear(far, 1)
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def test_a_via_in_a_pad_keeps_hole_spacing_from_a_fixed_via():
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from freeroute.geometry import IntPoint
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text = _THT.replace("(network (net SIG (pins J1-1))))",
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"(network (net SIG (pins J1-1)))\n"
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" (wiring (via \"Via[0-1]_500:300_um\" 3000 -3000 (net SIG) (type route))))")
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router, s = _router(text)
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assert not router._hole_clear_at(IntPoint(3400 * s, -3000 * s)) # 0.4 mm < 0.55 mm
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assert router._hole_clear_at(IntPoint(3600 * s, -3000 * s))
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def test_hole_spacing_from_a_fixed_via_is_measured_from_where_it_really_is():
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# a fixed via off the grid with its own 0.25 mm drill, and the router's
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# via a smaller 0.2 mm one (the flight controller's case): a new via needs
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# its centre 0.1 + 0.125 + 0.25 = 0.475 mm away, measured exactly, where
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# one rule for all vias gave 0.2 + 0.25 = 0.45 from the cell centres
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text = _THT.replace("(network (net SIG (pins J1-1))))",
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"(network (net SIG (pins J1-1)) (net GND))\n"
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" (wiring (via \"Via[0-1]_500:250_um\" 3030 -3030 (net GND) (type route))))")
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text = text.replace(
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'(attach off)))\n (network',
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'(attach off))\n (padstack "Via[0-1]_500:250_um" (shape (circle F.Cu 500)) '
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'(shape (circle B.Cu 500)) (attach off)))\n (network',
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)
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router, s = _router(text, via_drill_um=200)
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via = next(v for v in router.board.get_items() if getattr(v, "drill", 0))
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assert via.drill == 250 * s
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loc = via.location
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for cell in [(x, y) for x in range(router.cols) for y in range(router.rows)]:
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c = router._cell_center(cell)
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d = math.hypot(c.x - loc.x, c.y - loc.y)
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if router.step * 1.5 < d < 470 * s:
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assert not router._holes_clear(cell, 1), f"{d / s:.0f} um from the fixed via"
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elif 560 * s < d < 700 * s and cell not in router._tht_block:
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assert router._holes_clear(cell, 1)
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