Ryan Malloy
0d6facb321
One-off diagnostic scripts from experiments 0xD7-0xDB investigating the I2C BERR deadlock. Documents the systematic elimination of software-only recovery approaches: - i2c_host_test.py: Proved 0xA0 register writes cannot drive I2C bus - i2c_register_test.py: Tested I2C register writability from host - i2c_recovery_boot.py: Attempted I2C state machine recovery via boot - eeprom_flash_a0.py: Host-side EEPROM flash attempt (failed) - boot_ab_test.py / boot_test.py: EEPROM boot reliability testing - a8_autoclear_test.py: BCM4500 command register auto-clear behavior - addr_gateway_test.py: BCM3440 gateway address routing analysis - stock_fw_compare.py / stock_fw_test.py: Stock vs custom fw analysis
197 lines
6.9 KiB
Python
197 lines
6.9 KiB
Python
#!/usr/bin/env python3
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"""Test I2C communication from host side while FX2LP CPU is halted.
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When the CPU is halted (CPUCS=1), I2CS=0x0A (clean state). When the CPU
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runs (CPUCS=0), I2CS=0xF6 (stuck). This script tests whether the I2C
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controller is functional during CPU halt by attempting to read the boot
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EEPROM header (which MUST contain 0xC0 or 0xC2).
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Uses USB vendor command 0xA0 to read/write XDATA registers directly.
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"""
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import sys
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import time
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import usb.core
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import usb.util
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# XDATA register addresses
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I2CS_ADDR = 0xE678
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I2DAT_ADDR = 0xE679
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I2CTL_ADDR = 0xE67A
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CPUCS_ADDR = 0xE600
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# I2CS bit masks
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bmSTART = 0x80
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bmSTOP = 0x40
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bmLASTRD = 0x20
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bmBERR = 0x04
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bmACK = 0x02
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bmDONE = 0x01
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EEPROM_ADDR_W = 0xA2 # 0x51 << 1 | 0 (write)
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EEPROM_ADDR_R = 0xA3 # 0x51 << 1 | 1 (read)
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def fx2_read(dev, addr, length=1):
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"""Read XDATA register(s) via USB vendor command 0xA0."""
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return dev.ctrl_transfer(0xC0, 0xA0, addr, 0, length, timeout=1000)
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def fx2_write(dev, addr, data):
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"""Write XDATA register(s) via USB vendor command 0xA0."""
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dev.ctrl_transfer(0x40, 0xA0, addr, 0, data, timeout=1000)
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def i2cs_str(val):
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"""Decode I2CS register value."""
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flags = []
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if val & 0x80: flags.append('START')
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if val & 0x40: flags.append('STOP')
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if val & 0x20: flags.append('LASTRD')
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if val & 0x04: flags.append('BERR')
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if val & 0x02: flags.append('ACK')
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if val & 0x01: flags.append('DONE')
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return f"0x{val:02X} ({' | '.join(flags) if flags else 'idle'})"
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def wait_done(dev, timeout_ms=100):
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"""Poll I2CS for DONE bit."""
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deadline = time.monotonic() + timeout_ms / 1000.0
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while time.monotonic() < deadline:
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i2cs = fx2_read(dev, I2CS_ADDR, 1)[0]
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if i2cs & bmDONE:
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return True, i2cs
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time.sleep(0.001)
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return False, i2cs
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def main():
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dev = usb.core.find(idVendor=0x09C0, idProduct=0x0203)
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if not dev:
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print("SkyWalker-1 not found")
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sys.exit(1)
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print("SkyWalker-1 I2C Host-Side Test")
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print("=" * 50)
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# Step 1: Halt CPU
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print("\n[1] Halting CPU (CPUCS=1)...")
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fx2_write(dev, CPUCS_ADDR, bytes([0x01]))
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time.sleep(0.05)
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# Step 2: Read I2C state
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i2cs = fx2_read(dev, I2CS_ADDR, 1)[0]
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i2ctl = fx2_read(dev, I2CTL_ADDR, 1)[0]
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print(f" I2CS = {i2cs_str(i2cs)}")
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print(f" I2CTL = 0x{i2ctl:02X}")
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if i2cs == 0xF6:
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print(" WARNING: I2CS stuck at 0xF6 even during CPU halt!")
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print(" I2C test will likely fail.")
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# Step 3: Try to write I2CTL and read back
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print("\n[2] Testing register writability...")
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fx2_write(dev, I2CTL_ADDR, bytes([0x01])) # 400kHz
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time.sleep(0.01)
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i2ctl_rb = fx2_read(dev, I2CTL_ADDR, 1)[0]
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print(f" Wrote I2CTL=0x01, read back 0x{i2ctl_rb:02X}", end="")
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if i2ctl_rb == 0x01:
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print(" (write works!)")
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else:
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print(f" (write IGNORED — register is read-only during halt)")
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# Step 4: Try hardware I2C — read EEPROM header byte at address 0x0000
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print("\n[3] Attempting EEPROM read via hardware I2C...")
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print(" Target: EEPROM 0x51, address 0x0000 (boot header)")
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# Issue START
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print("\n [START] Writing I2CS = 0x80...")
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fx2_write(dev, I2CS_ADDR, bytes([bmSTART]))
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done, i2cs = wait_done(dev, 200)
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print(f" I2CS = {i2cs_str(i2cs)}, DONE={'YES' if done else 'NO'}")
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if not done:
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print(" START didn't complete. Trying alternative: write I2DAT first...")
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# Some controllers need I2DAT written before START can proceed
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# Write EEPROM address (0xA2 = 0x51 write)
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fx2_write(dev, I2DAT_ADDR, bytes([EEPROM_ADDR_W]))
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time.sleep(0.01)
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i2cs = fx2_read(dev, I2CS_ADDR, 1)[0]
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print(f" After I2DAT=0xA2: I2CS = {i2cs_str(i2cs)}")
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if not done:
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# Try the Cypress-documented sequence: START is issued by
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# writing the slave address to I2DAT AFTER writing START to I2CS
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print("\n Trying standard Cypress I2C sequence...")
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# Re-issue START
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fx2_write(dev, I2CS_ADDR, bytes([bmSTART]))
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time.sleep(0.001)
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# Write slave address — this should clock the address byte
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fx2_write(dev, I2DAT_ADDR, bytes([EEPROM_ADDR_W]))
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done, i2cs = wait_done(dev, 200)
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print(f" After START + I2DAT=0xA2: I2CS = {i2cs_str(i2cs)}, DONE={'YES' if done else 'NO'}")
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if done:
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ack = 'ACK' if (i2cs & bmACK) else 'NAK'
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print(f" Address phase: {ack}")
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if done:
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# Write EEPROM address bytes (16-bit address: 0x0000)
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print("\n Writing address 0x0000...")
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fx2_write(dev, I2DAT_ADDR, bytes([0x00])) # addr high
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done, i2cs = wait_done(dev, 200)
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ack = 'ACK' if (i2cs & bmACK) else 'NAK'
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print(f" Addr high: {ack}, DONE={'YES' if done else 'NO'}")
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if done:
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fx2_write(dev, I2DAT_ADDR, bytes([0x00])) # addr low
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done, i2cs = wait_done(dev, 200)
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ack = 'ACK' if (i2cs & bmACK) else 'NAK'
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print(f" Addr low: {ack}, DONE={'YES' if done else 'NO'}")
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if done:
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# Re-START for read phase
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print("\n Re-START for read phase...")
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fx2_write(dev, I2CS_ADDR, bytes([bmSTART]))
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time.sleep(0.001)
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fx2_write(dev, I2DAT_ADDR, bytes([EEPROM_ADDR_R]))
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done, i2cs = wait_done(dev, 200)
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ack = 'ACK' if (i2cs & bmACK) else 'NAK'
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print(f" Read addr: {ack}, DONE={'YES' if done else 'NO'}")
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if done:
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# Read first byte (and only byte — set LASTRD + STOP)
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print("\n Reading first byte (LASTRD + STOP)...")
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fx2_write(dev, I2CS_ADDR, bytes([bmLASTRD]))
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time.sleep(0.001)
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# Dummy read to trigger byte transfer
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dummy = fx2_read(dev, I2DAT_ADDR, 1)[0]
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done, i2cs = wait_done(dev, 200)
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if done:
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data = fx2_read(dev, I2DAT_ADDR, 1)[0]
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fx2_write(dev, I2CS_ADDR, bytes([bmSTOP]))
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print(f" Boot header byte: 0x{data:02X}", end="")
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if data == 0xC0:
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print(" (C0 = no renumerate)")
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elif data == 0xC2:
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print(" (C2 = renumerate)")
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else:
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print(f" (unexpected!)")
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print("\n *** EEPROM READ SUCCESSFUL! ***")
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else:
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print(f" Read DONE timeout. I2CS = {i2cs_str(i2cs)}")
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# Final state
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i2cs_final = fx2_read(dev, I2CS_ADDR, 1)[0]
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print(f"\n[4] Final I2CS = {i2cs_str(i2cs_final)}")
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# Try STOP to clean up
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fx2_write(dev, I2CS_ADDR, bytes([bmSTOP]))
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time.sleep(0.01)
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i2cs_stop = fx2_read(dev, I2CS_ADDR, 1)[0]
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print(f" After STOP: I2CS = {i2cs_str(i2cs_stop)}")
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# Release CPU
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print("\n[5] Releasing CPU (CPUCS=0)...")
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fx2_write(dev, CPUCS_ADDR, bytes([0x00]))
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time.sleep(0.5)
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print(" CPU released. Device will re-enumerate.")
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if __name__ == '__main__':
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main()
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