Ryan Malloy
782f5a0e8d
Major correction: All firmware versions use GPIO bit-banging for DiSEqC, NOT I2C-based control as previously reported. Deep decompilation of the sub-functions (byte transmit, bit symbol, tone burst) across v2.06, Rev.2, and v2.13 reveals identical Manchester encoding algorithms with only the data GPIO pin changed per PCB revision: - v2.06: P0.7, Rev.2: P0.4, v2.13: P0.0 - P0.3 (22kHz carrier gate) unchanged across all versions New section 7: Complete DiSEqC timing chain analysis including: - Timer2 configuration (RCAP2=0xF82F, 4MHz clock, 500us tick) - Manchester encoding waveforms (3 ticks/bit, 1.5ms/bit, 667 baud) - Byte transmission (8 data + odd parity = 13.5ms) - Tone burst timing (25 ticks = 12.5ms) - CPU clock compensation in delay function - External 22kHz oscillator architecture