Pin angles in lib_symbol use Y-up convention. After applying component
rotation, vertical directions (90/270) must be swapped to account for
the lib Y-up to schematic Y-down coordinate transform. Without this,
vertical stubs on non-mirrored components point into the body instead
of away from it, causing label_multiple_wires ERC violations.
Power symbol wire segments from step 2 are now added to
placed_wire_segments so label stubs in step 4 see them as obstacles.
Prevents bridges where label stubs extend through power wires.
Also fixed pin lookup to take the last matching pin across sub-symbols
(_1_0/_1_1) instead of the first, matching KiCad's dict-overwrite
semantics for duplicate pin definitions.
Blanket exclude_points in clamp_stub_length() skipped same-component
obstacles regardless of direction, allowing stubs to bridge through
adjacent pins (R2 +3V3/SDA). Moved exclusion to batch.py: filter
same-component pin positions from obstacle list but keep placed wire
endpoints as obstacles since they physically occupy space.
clamp_stub_length() was treating all pins as potential obstacles,
including pins on the same component. On vertical caps like C7 with
5.08mm pin spacing, pin 1 clamped pin 2's stub to near-zero. Added
exclude_points parameter so callers can skip same-component pins
that cannot cause external net bridges.
resolve_wire_collision() was shifting both stub endpoints when avoiding
collinear overlaps, detaching the wire from the pin. Now only the label
end shifts perpendicular to the axis while the start stays anchored.
7.62mm default stubs caused shorts on small passives and stacked
labels where pin-to-pin distance was less than the stub length.
clamp_stub_length() now auto-shortens stubs when obstacles (adjacent
pins, placed wire endpoints) are detected in the stub's path, with
a 1.27mm clearance margin and 2.54mm minimum floor.
sch.components.get() returns only the first unit instance for a given
reference. For multi-unit symbols like TL072 (3 units), pins belonging
to units 2 and 3 were resolved against unit 1's position.
Added pin-to-unit mapping via KiCad sub-symbol naming convention
(e.g. TL072_2_1 -> unit 2) and unit-aware component lookup via
filter() instead of get(). Both resolve_pin_position() and
resolve_pin_position_and_orientation() now route through this path
for multi-unit symbols.
Wire collision detection: apply_batch now tracks placed wire segments and
detects collinear stubs on the same axis with overlapping ranges belonging
to different nets. Colliding wires shift perpendicular to their axis by
1.27mm, preventing KiCad from merging wire segments into mega-nets.
Project-local library resolution: apply_batch now scans batch component
lib_ids for unknown libraries and registers them with kicad-sch-api's
SymbolLibraryCache via sym-lib-table parsing before component placement.
Unblocks projects using Samacsys and other non-standard symbol libraries.
Root ERC: run_schematic_erc accepts root=True to resolve to the project
root schematic before running kicad-cli, enabling hierarchy-aware ERC
that eliminates ~180 false-positive global_label_dangling warnings from
sub-sheet isolation.
270/270 tests pass, ruff + mypy clean.
Label collision detection: resolve_label_collision() shifts different-net
labels that share the same (x,y) coordinate by 1.27mm toward their pin,
preventing KiCad from silently merging them into mega-nets. Integrated
at both label placement points in apply_batch.
Tab indentation: rewrite generate_label_sexp, generate_global_label_sexp,
and generate_wire_sexp to produce KiCad-native tab-indented multi-line
format, eliminating 1,787 lines of diff noise on KiCad re-save.
Intersheetrefs property now uses (at 0 0 0) placeholder.
Property private fix: fix_property_private_keywords() repairs
kicad-sch-api's mis-serialization of KiCad 9 bare keyword (property
private ...) as quoted (property "private" ...), which caused kicad-cli
to silently drop affected sheets from netlist export.
243 tests pass, ruff + mypy clean.
Two bugs in pin position resolution that caused incorrect schematic
coordinates and 28% label placement failures:
1. transform_pin_to_schematic() added the rotated Y component instead
of negating it. lib_symbol pins use Y-up; schematics use Y-down.
Fix: comp_y + ry -> comp_y - ry.
2. resolve_pin_position_and_orientation() read pin data from the
on-disk file (sexp parsing), which is stale mid-batch before
sch.save(). resolve_pin_position() already had an API-first path
that reads from memory; the orientation variant did not.
Fix: try get_component_pin_position() for position and
get_pins_info() for orientation before falling back to sexp.
Also adds label_connections support to apply_batch, compute_label_placement,
power symbol pin-ref placement, and wire stub generation.
Refactors _build_connectivity() into a two-layer state builder so the
union-find internals (pin_at, label_at, wire_segments) are accessible
to new analysis tools without duplicating the 200-line connectivity engine.
New tools:
- audit_wiring: trace all wires connected to a component, report per-pin
net membership with wire segment coordinates and connected pins
- remove_wires_by_criteria: bulk-remove wires by coordinate filters
(y, x, min/max ranges, tolerance) with dry_run preview support
- verify_connectivity: compare actual wiring against an expected
net-to-pin mapping, report matches/mismatches/missing nets
New sexp_parser utilities:
- parse_wire_segments: extract (wire ...) blocks with start/end/uuid
- remove_sexp_blocks_by_uuid: atomically remove blocks by UUID set
parse_lib_symbol_pins() now falls back to searching external .kicad_sym
library files when a symbol isn't embedded in the schematic's lib_symbols
section. Splits lib_id ("LibName:SymName") to locate the library file,
then parses pins using the bare symbol name.
Search order: schematic dir, libs/, ../libs/, project root, project
root/libs/, kicad/libs/, and sym-lib-table entries with ${KIPRJMOD}
substitution. Handles nonexistent directories gracefully.
Fixes add_power_symbol for script-generated schematics that reference
project library symbols without embedding them (e.g. D1/SMF5.0CA in
ESP32-P4-WIFI6-DEV-KIT library).
add_label bypasses kicad-sch-api serializer entirely — generates
s-expression strings and inserts them directly into the .kicad_sch
file via atomic write. Fixes two upstream bugs: global labels silently
dropped on save (serializer never iterates "global_label" key), and
local labels raising TypeError (parameter signature mismatch in
LabelCollection.add()).
add_power_symbol now falls back to sexp pin parsing when the API
returns None for custom library symbols (e.g. SMF5.0CA). Extracts
shared resolve_pin_position() utility used by both add_power_symbol
and batch operations.
Batch labels also fixed — collected as sexp strings during the batch
loop and inserted after sch.save() so the serializer can't overwrite
them.
Reduce _rc() and transform_pin_to_schematic() rounding from 3 to 2
decimal places to match KiCad's 0.01mm coordinate quantum — prevents
union-find misses when wire endpoints and sexp-parsed pin positions
differ at the sub-quantum level.
Use schematic stem as subdirectory inside .mckicad/ so multi-sheet
analysis outputs (connectivity.json, etc.) don't collide.
kicad-sch-api has two parsing gaps: get_symbol_definition() returns
None for non-standard library prefixes (e.g. Espressif:ESP32-P4),
and there is no sch.global_labels attribute for (global_label ...)
nodes. This adds a focused parser that reads directly from the raw
.kicad_sch file as a fallback, integrated into the connectivity
engine, pin extraction, and label counting tools.
New modules:
- patterns/ library: decoupling bank, pull resistor, crystal oscillator
placement with power symbol attachment and grid math helpers
- tools/batch.py: atomic file-based batch operations with dry_run
- tools/power_symbols.py: add_power_symbol with auto #PWR refs
- tools/schematic_patterns.py: MCP wrappers for pattern library
- tools/schematic_edit.py: modify/remove components, title blocks, annotations
- resources/schematic.py: schematic data resources
43 new tests (99 total), lint clean.
