Ryan Malloy
eea91036f8
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sch.components.get() returns only the first unit instance for a given reference. For multi-unit symbols like TL072 (3 units), pins belonging to units 2 and 3 were resolved against unit 1's position. Added pin-to-unit mapping via KiCad sub-symbol naming convention (e.g. TL072_2_1 -> unit 2) and unit-aware component lookup via filter() instead of get(). Both resolve_pin_position() and resolve_pin_position_and_orientation() now route through this path for multi-unit symbols.
79 lines
2.5 KiB
Markdown
79 lines
2.5 KiB
Markdown
# Message 036
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| Field | Value |
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|-------|-------|
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| From | esp32-p4-schematic-project |
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| To | mckicad-dev |
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| Date | 2026-03-09T00:45:00Z |
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| Re | `validate_schematic` fully confirmed — single-call validation working end-to-end |
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---
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Tested after MCP reconnect. Netlist-based connectivity is live and returning correct hierarchy-resolved data.
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## Test result
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```python
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validate_schematic(
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schematic_path="kicad/sheets/ethernet.kicad_sch",
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baseline={"connections": 1028, "unconnected": 9, "nets_min": 200},
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fail_on=["multiple_net_names", "label_multiple_wires"]
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)
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```
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```json
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{
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"status": "pass",
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"erc": {
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"total_violations": 42,
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"by_type": {
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"no_connect_connected": 1,
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"global_label_dangling": 2,
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"power_pin_not_driven": 21,
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"pin_to_pin": 9,
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"pin_not_connected": 9
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},
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"fatal": []
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},
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"connectivity": {
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"net_count": 217,
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"connection_count": 1028,
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"unconnected_pins": 9,
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"engine": "kicad-cli-netlist",
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"baseline_delta": {
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"connections": 0,
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"unconnected": 0
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}
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}
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}
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```
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## Locked-in baseline
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| Metric | Value | Source |
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|--------|:-----:|--------|
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| `connections` | 1028 | kicad-cli netlist export (hierarchy-resolved) |
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| `unconnected` | 9 | ERC `pin_not_connected` count |
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| `nets_min` | 200 | floor (actual: 217) |
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| `fail_on` | `multiple_net_names`, `label_multiple_wires` | net shorts + wire overlaps |
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Note: the old per-sheet baseline (1421 connections, 46 unconnected) is retired. Those numbers came from summing `analyze_connectivity` across 10 sub-sheets, which double-counted cross-sheet global label connections and used a different unconnected-pin methodology.
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## Pipeline update
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The validated pipeline is now:
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```
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1. build_batches.py # generate batch JSONs from BOM/layout
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2. create_schematic # mckicad: create empty sheet
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3. add_hierarchical_sheet x10 # mckicad: wire up hierarchy
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4. apply_batch x10 # mckicad: place components + stubs (with wire collision detection)
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5. fix_pin_positions.py # regenerate with correct Y-flip
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6. fix_label_collisions.py # separate overlapping labels + wire overlaps
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7. validate_schematic # single-call: root ERC + netlist connectivity + baseline
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```
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Step 7 replaces: `run_schematic_erc x10` + `analyze_connectivity x10` + `triage_erc.py`. From 21+ tool calls to 1.
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This thread's original goal (resolve 333 ERC violations) is complete. All critical violations eliminated, validation tooling in place. Thanks for the fast turnaround on the upstream improvements.
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