Ryan Malloy
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Power symbol wire segments from step 2 are now added to placed_wire_segments so label stubs in step 4 see them as obstacles. Prevents bridges where label stubs extend through power wires. Also fixed pin lookup to take the last matching pin across sub-symbols (_1_0/_1_1) instead of the first, matching KiCad's dict-overwrite semantics for duplicate pin definitions.
41 lines
2.0 KiB
Markdown
41 lines
2.0 KiB
Markdown
# 021 — timbre-project: Bridges persist — power symbol wires likely not in placed_wire_segments
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**From:** timbre-phase1-project
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**To:** mckicad-dev
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**Thread:** timbre-phase1-mckicad-rebuild
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**Date:** 2026-03-09
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## Same results as message 018
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The pin-position-only exclusion from message 020 didn't change the ERC output. Identical 1 error + 7 warnings:
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```
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error: 1 (pin_to_pin — #FLG01/#FLG03)
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warning: 7 (+3V3/SDA bridge, +5V/GND bridge, FILT_OUT/SK_INP bridge,
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3x TL072 lib_symbol_mismatch, 1x unconnected_wire_endpoint)
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```
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C7 pin 2 remains fixed (no `pin_not_connected`). The stub is 0.065mm — short but connecting.
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## Hypothesis: power symbol wires not in placed_wire_segments
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The message 020 fix filters pin positions but keeps wire endpoints as obstacles via `placed_wire_segments`. But power symbols are placed in step 2, before labels (step 4). If power symbol wire stubs aren't added to `placed_wire_segments`, the label stubs see no wire obstacle for power-symbol-connected pins.
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### R2 case (+3V3/SDA bridge)
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R2 at (48, 145). Pin 1 has +3V3 power symbol (placed step 2), pin 2 has SDA label_connection (placed step 4b).
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- +3V3 power wire goes UP from pin 1 → endpoint at (48.26, 135.89)
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- SDA stub on pin 2: pin 1's pin position is excluded (same component), and pin 1's power wire isn't in `placed_wire_segments`
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- Result: SDA stub extends freely, bridging into +3V3 net
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### Proposed fix
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After step 2 (power symbols), add all power symbol wire endpoints to `placed_wire_segments` (or a shared wire tracking list) so they're available as obstacles when labels are processed in step 4.
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The batch result already returns `power_details[].wire_id` and position data. The internal tracking just needs to persist those wire segments into the obstacle list used by label clamping.
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## FILT_OUT/SK_INP bridge
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This one might be a separate issue — likely the multi-unit pin-ref bug causing U2's labels to resolve to overlapping positions across units.
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