5 Commits

Author SHA1 Message Date
d2d33fff57 Fix schematic generator pin positions using actual .asy data
The .asc schematic templates had wrong pin offsets, causing LTspice
to extract netlists with disconnected (NC_*) nodes and singular
matrix errors.

Fixed by reading pin positions from the .asy symbol files and applying
the correct CCW rotation transform: R90 maps (px, py) → (-py, px).

Pin offsets: voltage (+0,+16)/(+0,+96), res (+16,+16)/(+16,+96),
cap (+16,+0)/(+16,+64). Added pin_position() helper and _PIN_OFFSETS
table for reuse by all layout functions.

Verified end-to-end: generate_rc_lowpass → simulate → bandwidth gives
1587.8 Hz vs theoretical 1591.5 Hz (0.24% error).
2026-02-10 23:15:48 -07:00
ba649d2a6e Add stability, power, optimization, batch, and schematic generation tools
Phase 3 features bringing the server to 27 tools:
- Stepped/multi-run .raw file parsing (.step, .mc, .temp)
- Stability analysis (gain/phase margin from AC loop gain)
- Power analysis (average, RMS, efficiency, power factor)
- Safe waveform expression evaluator (recursive-descent parser)
- Component value optimizer (binary search + coordinate descent)
- Batch simulation: parameter sweep, temperature sweep, Monte Carlo
- .asc schematic generation from templates (RC filter, divider, inverting amp)
- Touchstone .s1p/.s2p/.snp S-parameter file parsing
- 7 new netlist templates (diff amp, common emitter, buck, LDO, oscillator, H-bridge)
- Full ruff lint and format compliance across all modules
2026-02-10 23:05:35 -07:00
b31ff1cbe4 Add analysis, netlist builder, model search, DRC, and diff tools
New modules:
- log_parser: Extract .meas results and errors from sim logs
- waveform_math: FFT, THD, RMS, settling time, rise time, bandwidth
- netlist: Programmatic SPICE netlist builder with templates
- models: Search 2800+ SPICE models and subcircuits in library
- diff: Compare two schematics for component/topology changes
- drc: Design rule checks (ground, floating nodes, missing values)

Server now has 18 tools, 3 resources, and 3 guided prompts.
2026-02-10 13:59:26 -07:00
a77874c972 Fix binary parsers for UTF-16 headers and AC analysis
- Handle UTF-16 LE encoded .raw file headers (Windows/Wine output)
- Fix mixed-precision transient data: float64 time + float32 signals
- Fix AC analysis: all variables stored as complex128, not mixed
- Fix schematic parser losing components at SYMBOL boundaries
- Use proper atan2 for phase calculation, report magnitude in dB
2026-02-10 13:20:47 -07:00
50953a4dea Initial mcp-ltspice: MCP server for LTspice circuit simulation
Wine batch-mode runner, binary .raw parser (UTF-16 LE + mixed
precision float64/float32), .asc schematic parser/editor, and
9 FastMCP tools for simulation automation on Linux.
2026-02-10 13:13:36 -07:00