Compare commits
1
Commits
| Author | SHA1 | Date | |
|---|---|---|---|
|
|
8b1b00cf6c |
+4
-43
@@ -32,10 +32,8 @@ from freeroute.route.exact_router import route_board_exact
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from freeroute.route.grid_router import GridRouter, _ends_of
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from freeroute.route.pipeline import (
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_mm_to_board,
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_net_widths_board,
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_rule_clearance_dsn,
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_rule_width_dsn,
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_via_drill_board,
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_via_half_board,
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)
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@@ -108,15 +106,6 @@ def _capture_conflicts() -> list:
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return log
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def _wall_name(wall, names) -> str:
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if isinstance(wall, str):
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if wall.startswith("fixed copper of net "):
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net = int(wall.rsplit(" ", 1)[1])
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return f"fixed copper of {names.get(net, net)}"
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return wall
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return names.get(wall, "pads/keepouts")
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def _gap(a, b) -> int:
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dx = max(b.ll.x - a.ur.x, a.ll.x - b.ur.x, 0)
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dy = max(b.ll.y - a.ur.y, a.ll.y - b.ur.y, 0)
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@@ -129,25 +118,6 @@ def _fresh(seen) -> GridRouter:
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return router
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def _static_wall(router: GridRouter, node) -> str:
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"""What static copper closes a node: a keepout, copper already on the
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board (a fixed via or track, by net), or a pad."""
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if node in router._keepout:
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return "keepout"
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fixed = getattr(router, "_diag_fixed", None)
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if fixed is None:
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fixed = router._diag_fixed = {}
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margin = router.clearance + router.half_width
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for net, layers, box in router.board.get_fixed_copper():
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for cell in router._cells_in_box(box, margin):
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for layer in layers:
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fixed[(*cell, layer)] = net
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net = fixed.get(node)
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if net is not None:
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return f"fixed copper of net {net}"
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return "pads"
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def _flood(router: GridRouter, pin, net_no: int, conns) -> tuple[int, Counter]:
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"""How many nodes a pin can reach through free cells (up to FLOOD_LIMIT),
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and which other nets' copper bounds the region."""
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@@ -176,7 +146,7 @@ def _flood(router: GridRouter, pin, net_no: int, conns) -> tuple[int, Counter]:
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for owner in owners:
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walls[conns[owner].net_no] += 1
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if not owners:
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walls[_static_wall(router, n)] += 1
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walls[0] += 1 # a pad or keepout
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continue
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seen.add(n)
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frontier.append(n)
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@@ -185,7 +155,7 @@ def _flood(router: GridRouter, pin, net_no: int, conns) -> tuple[int, Counter]:
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def diagnose(
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dsn_text: str, edge_clearance_mm: float | None, resolution: int = 2, shove: bool = False,
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access_cost: float = 0.0, hole_to_hole_mm: float = 0.25, seed: int | None = None,
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access_cost: float = 0.0,
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) -> dict:
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dsn = parse_dsn(dsn_text)
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names = {i + 1: n.name for i, n in enumerate(dsn.nets)}
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@@ -201,11 +171,6 @@ def diagnose(
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resolution=resolution,
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shove=shove,
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access_cost=access_cost,
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seed=seed,
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# the product's configuration: net-class widths and hole spacing
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net_widths=_net_widths_board(dsn, scale),
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via_drill=_via_drill_board(dsn, scale),
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hole_to_hole=_mm_to_board(dsn, scale, hole_to_hole_mm) or 0,
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)
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routed = seen["router"]
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best = routed._diag_best
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@@ -259,9 +224,7 @@ def diagnose(
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if reach < FLOOD_LIMIT:
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walled.append({
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"pin": end, "reach": reach,
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"walls": [
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_wall_name(n, names) for n, _ in walls.most_common(4)
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],
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"walls": [names.get(n, "pads/keepouts") for n, _ in walls.most_common(4)],
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})
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row["kind"] = "walled-in" if walled else "congestion"
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if walled:
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@@ -277,13 +240,11 @@ def main(argv: list[str] | None = None) -> int:
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ap.add_argument("--grid-resolution", type=int, default=2, metavar="K")
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ap.add_argument("--shove", action="store_true", help="as mckicad routes")
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ap.add_argument("--access-cost", type=float, default=0.0)
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ap.add_argument("--seed", type=int, help="route in this shuffled order, as bench.py does")
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ap.add_argument("--hole-to-hole", type=float, default=0.25, metavar="MM")
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ap.add_argument("--json", type=Path, help="also write the full table here")
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args = ap.parse_args(argv)
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report = diagnose(args.dsn.read_text(), args.edge_clearance, args.grid_resolution, args.shove,
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args.access_cost, args.hole_to_hole, args.seed)
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args.access_cost)
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for row in report["failures"]:
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extra = ""
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for w in row.get("walled", []):
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@@ -1,67 +0,0 @@
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#!/usr/bin/env bash
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# Route one KiCad board with freeroute and judge the result with KiCad's DRC.
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#
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# bench/drc_check.sh [--keep] <board.kicad_pcb> <out-dir> [freeroute args...]
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#
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# Copies the board (and its .kicad_pro) into <out-dir>, strips its tracks and
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# vias unless --keep is given (then they reach the router as fixed wiring),
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# exports the DSN through mckicad, routes, applies the session, and runs DRC
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# with zones refilled at every severity. Prints one line: time, copper added,
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# shorts, opens, hole problems (whatever severity the board gives them) and
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# the other errors. The source board is never touched.
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#
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# FREEROUTE (default: this checkout's .venv/bin/freeroute) and MCK (default
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# ~/claude/mckicad) pick the builds to judge.
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set -euo pipefail
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keep=0
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if [[ "${1:-}" == "--keep" ]]; then keep=1; shift; fi
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src="$1"; out="$2"; shift 2
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here="$(cd "$(dirname "$0")/.." && pwd)"
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FREEROUTE="${FREEROUTE:-$here/.venv/bin/freeroute}"
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MCK="${MCK:-$HOME/claude/mckicad}"
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rm -rf "$out"; mkdir -p "$out"
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cp "${src%.kicad_pcb}.kicad_pro" "$out/board.kicad_pro" 2>/dev/null || true
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if [[ $keep == 1 ]]; then
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cp "$src" "$out/board.kicad_pcb"
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else
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(cd "$MCK" && uv run --no-sync python - "$src" "$out/board.kicad_pcb" <<'EOF'
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import sys
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from mckicad.utils.sexp_tree import parse
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text = open(sys.argv[1]).read()
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spans = sorted((c.span for c in parse(text).children if c.tag in ("segment", "arc", "via")), reverse=True)
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for a, b in spans:
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text = text[:a] + text[b:]
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open(sys.argv[2], "w").write(text)
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EOF
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)
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fi
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(cd "$MCK" && uv run --no-sync python -c "
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from mckicad.utils.freerouting import FreeRoutingEngine
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assert FreeRoutingEngine().export_dsn_from_kicad('$out/board.kicad_pcb', '$out/board.dsn', {})") \
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>/dev/null 2>&1 || { echo "$out: DSN export failed"; exit 1; }
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start=$(date +%s.%N)
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"$FREEROUTE" "$out/board.dsn" -do "$out/board.ses" "$@" >"$out/route.log" 2>&1 || true
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secs=$(python3 -c "print(round($(date +%s.%N)-$start,1))")
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[[ -s "$out/board.ses" ]] || { echo "$out: no session ($(tail -1 "$out/route.log"))"; exit 1; }
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(cd "$MCK" && uv run --no-sync python -c "
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from mckicad.utils.ses_apply import apply_ses_to_board as a
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r = a('$out/board.kicad_pcb', '$out/board.ses', '$out/board.kicad_pcb')
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print(r['segments_added'], r['vias_added'])" 2>/dev/null) >"$out/apply.txt"
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kicad-cli pcb drc --refill-zones --format json --severity-all \
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-o "$out/drc.json" "$out/board.kicad_pcb" >/dev/null 2>&1 || true
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python3 - "$out" "$secs" <<'EOF'
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import collections, json, sys
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out, secs = sys.argv[1:]
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seg, via = open(f"{out}/apply.txt").read().split()
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d = json.load(open(f"{out}/drc.json"))
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errors = collections.Counter(v["type"] for v in d["violations"] if v.get("severity") == "error")
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other = collections.Counter(v["type"] for v in d["violations"] if v.get("severity") != "error")
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holes = {k: errors.pop(k, 0) + other.get(k, 0) for k in ("holes_co_located", "hole_to_hole")}
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print(f"{out}: {secs}s {seg} seg {via} via shorts {errors.pop('shorting_items', 0)} "
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f"opens {len(d.get('unconnected_items', []))} holes {holes} errors {dict(errors)}")
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EOF
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@@ -70,27 +70,6 @@ class BasicBoard:
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def get_traces(self) -> list[Trace]:
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return [it for it in self._items if isinstance(it, Trace)]
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def get_fixed_copper(self) -> list[tuple[int, frozenset[int], IntBox]]:
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"""Copper already routed on the board (the DSN's ``wiring``), as
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``(net, layers, box)``. A track is its segments, its corners and the
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round caps at its ends (as squares); a via is its largest pad."""
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from freeroute.geometry.polyline import Polyline, PolylineShape, corner_box
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out: list[tuple[int, frozenset[int], IntBox]] = []
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for item in self._items:
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if not item.fixed or not item.net_nos:
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continue
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net = item.net_nos[0]
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if isinstance(item, Trace) and not item.is_empty():
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layers = frozenset({item.layer})
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for box in PolylineShape(Polyline(item.corners), item.half_width).tiles():
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out.append((net, layers, box))
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for end in (item.corners[0], item.corners[-1]):
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out.append((net, layers, corner_box(end, item.half_width)))
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elif isinstance(item, Via) and item.shape is not None:
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out.append((net, frozenset(item.layers), item.shape.bounding_box()))
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return out
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def get_vias(self) -> list[Via]:
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return [it for it in self._items if isinstance(it, Via)]
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+10
-112
@@ -12,10 +12,9 @@ model. It mirrors what FreeRouting's ``Structure.create_board`` / ``Library`` /
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* padstacks x placement -> :class:`Pin` items
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* keepouts -> :class:`ObstacleArea` items
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Pad geometry: a rectangle pad becomes an exact :class:`IntBox`; a circle pad a
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16-sided :class:`Simplex` drawn just outside it (its corners stand out by 2% of
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the radius, where the bounding box's stood out by 41%); a convex polygon pad an
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exact :class:`Simplex`. Every pad is placed centred on its pin
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Pad geometry: a rectangle pad becomes an exact :class:`IntBox`; a circle pad its
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bounding box (documented approximation pending an exact circle tile); a convex
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polygon pad an exact :class:`Simplex`. Every pad is placed centred on its pin
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location, so it contains that location by construction. Component rotation is
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applied to the pin position; the pad tile itself is not rotated (irrelevant to
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the containment invariant, and pads are centre-symmetric in practice).
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@@ -24,7 +23,6 @@ the containment invariant, and pads are centre-symmetric in practice).
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from __future__ import annotations
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import math
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import re
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from freeroute.dsn.model import DsnBoard
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from freeroute.dsn.shapes import Circle, Path, Polygon, Rectangle, Shape
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@@ -33,16 +31,13 @@ from freeroute.geometry.polygon_shape import PolygonShape
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from .board import BasicBoard
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from .clearance import ClearanceMatrix
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from .items import ConductionArea, ObstacleArea, Pin, Trace, Via
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from .items import ConductionArea, ObstacleArea, Pin
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from .layer import Layer, LayerStructure
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from .net import Nets
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from .transform import CoordinateTransform
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__all__ = ["build_board"]
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# DSN units per micrometre, for drills KiCad gives in um in via padstack names
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_DSN_PER_UM = {"um": 1.0, "mm": 0.001, "mil": 1 / 25.4, "inch": 1 / 25400}
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def build_board(dsn: DsnBoard) -> BasicBoard:
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"""Construct a :class:`BasicBoard` from a parsed :class:`DsnBoard`."""
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@@ -61,7 +56,6 @@ def build_board(dsn: DsnBoard) -> BasicBoard:
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_insert_keepouts(dsn, board, transform)
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_insert_image_keepouts(dsn, board, transform)
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_insert_zones(dsn, board, transform, nets)
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_insert_wiring(dsn, board, transform, nets)
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return board
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@@ -250,7 +244,7 @@ def _placed_pad_tile(shape: Shape, place, dsn_pin, transform: CoordinateTransfor
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r = round(transform.dsn_to_board(shape.diameter / 2))
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cx = round(transform.dsn_to_board(centre.x))
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cy = round(transform.dsn_to_board(centre.y))
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return _circle_tile(cx, cy, r)
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return IntBox(cx - r, cy - r, cx + r, cy + r)
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if isinstance(shape, Rectangle):
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x0, y0, x1, y1 = shape.coords[:4]
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corners = [(x0, y0), (x1, y0), (x1, y1), (x0, y1)]
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@@ -269,65 +263,15 @@ def _placed_pad_tile(shape: Shape, place, dsn_pin, transform: CoordinateTransfor
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for x, y in corners:
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p = _to_board_offset(place, x, y, dsn_pin.rotation)
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pts.append(IntPoint(round(transform.dsn_to_board(p.x)), round(transform.dsn_to_board(p.y))))
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# An oval's padded corners are not in outline order, and a mirrored
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# part reverses the winding: take the convex hull, then either winding.
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hull = _convex_hull(pts)
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if len(hull) >= 3:
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for corners in (hull, hull[::-1]):
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simplex = Simplex.from_corners(corners)
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if not simplex.is_empty():
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return simplex
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if len(pts) >= 3:
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simplex = Simplex.from_corners(pts)
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if not simplex.is_empty():
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return simplex
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xs = [p.x for p in pts] or [0]
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ys = [p.y for p in pts] or [0]
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return IntBox(min(xs), min(ys), max(xs), max(ys))
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_CIRCLE_SIDES = 16
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def _circle_tile(cx: int, cy: int, r: int):
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"""A polygon around the circle, every side touching it. A square around a
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big round pad (a mounting hole) puts phantom copper in its corners that
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blocks legal routes past it; this stays outside the circle, so the router
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is still never closer than KiCad measures."""
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if r < 8:
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return IntBox(cx - r, cy - r, cx + r, cy + r)
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reach = r / math.cos(math.pi / _CIRCLE_SIDES)
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corners = []
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for k in range(_CIRCLE_SIDES):
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a = (k + 0.5) * 2 * math.pi / _CIRCLE_SIDES
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dx, dy = reach * math.cos(a), reach * math.sin(a)
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# round away from the centre so the polygon never cuts into the circle
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corners.append(IntPoint(cx + math.copysign(math.ceil(abs(dx)), dx),
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cy + math.copysign(math.ceil(abs(dy)), dy)))
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corners = [IntPoint(int(p.x), int(p.y)) for p in corners]
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for winding in (corners, corners[::-1]):
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simplex = Simplex.from_corners(winding)
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if not simplex.is_empty():
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return simplex
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return IntBox(cx - r, cy - r, cx + r, cy + r)
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def _convex_hull(pts: list[IntPoint]) -> list[IntPoint]:
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"""The convex hull of ``pts`` counter-clockwise, collinear points dropped."""
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ps = sorted({(p.x, p.y) for p in pts})
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if len(ps) < 3:
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return [IntPoint(x, y) for x, y in ps]
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def cross(o, a, b):
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return (a[0] - o[0]) * (b[1] - o[1]) - (a[1] - o[1]) * (b[0] - o[0])
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def half(points):
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out: list[tuple[int, int]] = []
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for p in points:
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while len(out) >= 2 and cross(out[-2], out[-1], p) <= 0:
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out.pop()
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out.append(p)
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return out[:-1]
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return [IntPoint(x, y) for x, y in half(ps) + half(ps[::-1])]
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def _pad_tile(shape: Shape, transform: CoordinateTransform):
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"""A board-relative pad tile from a DSN padstack shape (centred near origin)."""
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if isinstance(shape, Rectangle):
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@@ -337,7 +281,7 @@ def _pad_tile(shape: Shape, transform: CoordinateTransform):
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r = round(transform.dsn_to_board(shape.diameter / 2))
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cx = round(transform.dsn_to_board(shape.center_x))
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cy = round(transform.dsn_to_board(shape.center_y))
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return _circle_tile(cx, cy, r)
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return IntBox(cx - r, cy - r, cx + r, cy + r) # bounding-box approximation
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if isinstance(shape, (Polygon, Path)):
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coords = shape.coords
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pts = [
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@@ -527,52 +471,6 @@ def _placed_area_tiles(shape: Shape, place, transform: CoordinateTransform) -> l
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return [tile for tile in PolygonShape(pts).split_to_convex() if not tile.is_empty()]
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def _insert_wiring(dsn: DsnBoard, board: BasicBoard, transform: CoordinateTransform, nets) -> None:
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"""Tracks and vias already on the board, as fixed copper of their nets."""
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layer_no = {layer.name: i for i, layer in enumerate(dsn.layers)}
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signal_layers = [i for i, layer in enumerate(dsn.layers) if layer.is_signal]
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numbers = {net.name: net.net_number for net in nets}
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for wire in dsn.wires:
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if wire.net not in numbers or wire.layer not in layer_no:
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continue
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c = wire.coords
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corners = [transform.dsn_to_board_point(c[i], c[i + 1]) for i in range(0, len(c) - 1, 2)]
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if len(corners) < 2:
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continue
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board.insert(
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Trace(
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net_nos=[numbers[wire.net]], fixed=True, layer=layer_no[wire.layer],
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half_width=max(round(transform.dsn_to_board(wire.width / 2)), 1), corners=corners,
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)
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)
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for via in dsn.vias:
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padstack = dsn.padstack(via.padstack)
|
||||
if via.net not in numbers or padstack is None or not padstack.shapes:
|
||||
continue
|
||||
layers: set[int] = set()
|
||||
for shape in padstack.shapes:
|
||||
if shape.layer in ("signal", "pcb"):
|
||||
layers.update(signal_layers)
|
||||
elif shape.layer in layer_no:
|
||||
layers.add(layer_no[shape.layer])
|
||||
location = transform.dsn_to_board_point(via.x, via.y)
|
||||
pad = _pad_tile(max(padstack.shapes, key=_shape_extent), transform)
|
||||
box = pad.bounding_box()
|
||||
drill = re.search(r"_([\d.]+):([\d.]+)_um", via.padstack)
|
||||
drill_board = (
|
||||
round(transform.dsn_to_board(float(drill.group(2)) * _DSN_PER_UM.get(dsn.unit, 1.0)))
|
||||
if drill else 0
|
||||
)
|
||||
board.insert(
|
||||
Via(
|
||||
net_nos=[numbers[via.net]], fixed=True, padstack_name=via.padstack,
|
||||
drill=drill_board, location=location, layers=sorted(layers or signal_layers),
|
||||
shape=IntBox(box.ll.x + location.x, box.ll.y + location.y,
|
||||
box.ur.x + location.x, box.ur.y + location.y),
|
||||
)
|
||||
)
|
||||
|
||||
|
||||
def _insert_zones(dsn: DsnBoard, board: BasicBoard, transform: CoordinateTransform, nets) -> None:
|
||||
"""Each DSN plane as a ConductionArea of its net on its layer."""
|
||||
layer_no = {layer.name: i for i, layer in enumerate(dsn.layers)}
|
||||
|
||||
@@ -114,11 +114,6 @@ class Via(Item):
|
||||
|
||||
padstack_name: str = ""
|
||||
location: IntPoint = field(default_factory=lambda: IntPoint(0, 0))
|
||||
#: layer indices the via's pads occupy, and the largest pad as a box
|
||||
layers: list[int] = field(default_factory=list)
|
||||
shape: object = None
|
||||
#: drill diameter in board units, when the padstack name gives it
|
||||
drill: int = 0
|
||||
|
||||
|
||||
@dataclass
|
||||
|
||||
@@ -188,8 +188,6 @@ class ShapeSearchTree:
|
||||
overlap). Static pad-vs-pad spacing in the source design is not counted.
|
||||
"""
|
||||
for shape in self.all_shapes():
|
||||
if not shape.routed:
|
||||
continue # a pair with routed copper is checked from that side
|
||||
expanded = shape.tile.offset(clearance)
|
||||
grown = None # exact clearance region, built lazily only for diagonals
|
||||
for other in self.overlapping(expanded):
|
||||
|
||||
+10
-30
@@ -30,8 +30,8 @@ from freeroute.ses import write_ses
|
||||
#: which optional flags each engine actually implements. Anything not listed for
|
||||
#: an engine is rejected by :func:`_validate` rather than quietly ignored.
|
||||
ENGINE_OPTIONS: dict[str, frozenset[str]] = {
|
||||
"grid": frozenset({"rip_up", "max_passes", "seed", "orders", "promote", "access", "rollback"}),
|
||||
"exact": frozenset({"shove", "diagonal", "rip_up", "max_passes", "seed", "orders", "promote", "access", "rollback"}),
|
||||
"grid": frozenset({"rip_up", "max_passes", "seed", "orders", "promote", "access", "escapes"}),
|
||||
"exact": frozenset({"shove", "diagonal", "rip_up", "max_passes", "seed", "orders", "promote", "access", "escapes"}),
|
||||
"room": frozenset({"shove", "pack"}),
|
||||
}
|
||||
|
||||
@@ -46,7 +46,7 @@ _FLAG_NAMES = {
|
||||
"orders": "--orders",
|
||||
"promote": "--promote-failures",
|
||||
"access": "--access-cost",
|
||||
"rollback": "--no-rollback",
|
||||
"escapes": "--reserve-escapes",
|
||||
}
|
||||
|
||||
|
||||
@@ -168,20 +168,10 @@ def build_parser() -> argparse.ArgumentParser:
|
||||
"another pin's way out while that pin still has connections to route (default 0: off)",
|
||||
)
|
||||
parser.add_argument(
|
||||
"--no-rollback",
|
||||
dest="rollback",
|
||||
action="store_false",
|
||||
help="grid and exact engines: keep every rip-up, as before. By default the "
|
||||
"connections a rip-up displaces are rerouted at once and the rip-up is undone "
|
||||
"if fewer connections end up routed",
|
||||
)
|
||||
parser.add_argument(
|
||||
"--hole-to-hole",
|
||||
type=float,
|
||||
default=0.25,
|
||||
metavar="MM",
|
||||
help="grid and exact engines: least distance between the edges of any two via "
|
||||
"holes, of one net or two (KiCad's min_hole_to_hole; default 0.25)",
|
||||
"--reserve-escapes",
|
||||
action="store_true",
|
||||
help="grid and exact engines: before routing, reserve a way out for every fine-pitch "
|
||||
"pin that no other net may use until that pin's connections are routed",
|
||||
)
|
||||
parser.add_argument(
|
||||
"--jobs",
|
||||
@@ -212,7 +202,7 @@ def main(argv: list[str] | None = None) -> int:
|
||||
("orders", args.orders is not None),
|
||||
("promote", args.promote_failures is not None),
|
||||
("access", args.access_cost is not None),
|
||||
("rollback", not args.rollback),
|
||||
("escapes", args.reserve_escapes),
|
||||
)
|
||||
if asked
|
||||
]
|
||||
@@ -247,8 +237,7 @@ def main(argv: list[str] | None = None) -> int:
|
||||
"resolution": 2 if args.grid_resolution is None else args.grid_resolution,
|
||||
"heuristic_weight": args.heuristic_weight,
|
||||
"access_cost": args.access_cost or 0.0,
|
||||
"hole_to_hole_mm": args.hole_to_hole,
|
||||
"rollback": args.rollback,
|
||||
"reserve_escapes": args.reserve_escapes,
|
||||
}
|
||||
elif args.engine == "grid":
|
||||
options = {
|
||||
@@ -258,8 +247,7 @@ def main(argv: list[str] | None = None) -> int:
|
||||
"edge_clearance_mm": args.edge_clearance,
|
||||
"resolution": 1 if args.grid_resolution is None else args.grid_resolution,
|
||||
"access_cost": args.access_cost or 0.0,
|
||||
"hole_to_hole_mm": args.hole_to_hole,
|
||||
"rollback": args.rollback,
|
||||
"reserve_escapes": args.reserve_escapes,
|
||||
}
|
||||
if args.engine == "room":
|
||||
result = build_rooms_routing_result(
|
||||
@@ -297,14 +285,6 @@ def main(argv: list[str] | None = None) -> int:
|
||||
print(f"freeroute: {len(missing)} connection(s) not routed:", file=sys.stderr)
|
||||
for net, a, b, _zone in missing:
|
||||
print(f" {net}: {a} to {b}", file=sys.stderr)
|
||||
if result.narrowed:
|
||||
print(
|
||||
f"freeroute: {len(result.narrowed)} connection(s) of a wider net class only fitted "
|
||||
"at the default width; their nets are written at the default width:",
|
||||
file=sys.stderr,
|
||||
)
|
||||
for net, a, b in result.narrowed:
|
||||
print(f" {net}: {a} to {b}", file=sys.stderr)
|
||||
if in_zone:
|
||||
print(
|
||||
f"freeroute: {len(in_zone)} more connection(s) left to a zone fill that may join them:",
|
||||
|
||||
@@ -27,8 +27,6 @@ __all__ = [
|
||||
"NetPin",
|
||||
"Net",
|
||||
"NetClass",
|
||||
"WiringVia",
|
||||
"WiringWire",
|
||||
"Keepout",
|
||||
"DsnBoard",
|
||||
]
|
||||
@@ -188,26 +186,6 @@ class Keepout:
|
||||
kind: str = "keepout" # keepout | via_keepout | wire_keepout | place_keepout
|
||||
|
||||
|
||||
@dataclass
|
||||
class WiringWire:
|
||||
"""A track already on the board: ``(wire (path LAYER WIDTH x y ...) (net N))``."""
|
||||
|
||||
net: str
|
||||
layer: str
|
||||
width: float
|
||||
coords: list[float] = field(default_factory=list)
|
||||
|
||||
|
||||
@dataclass
|
||||
class WiringVia:
|
||||
"""A via already on the board: ``(via PADSTACK x y (net N))``."""
|
||||
|
||||
net: str
|
||||
padstack: str
|
||||
x: float
|
||||
y: float
|
||||
|
||||
|
||||
@dataclass
|
||||
class DsnBoard:
|
||||
"""The fully parsed DSN file."""
|
||||
@@ -219,9 +197,6 @@ class DsnBoard:
|
||||
layers: list[Layer] = field(default_factory=list)
|
||||
#: copper zones, as planes of a net
|
||||
planes: list[Plane] = field(default_factory=list)
|
||||
#: copper already routed (the ``wiring`` scope), kept fixed
|
||||
wires: list[WiringWire] = field(default_factory=list)
|
||||
vias: list[WiringVia] = field(default_factory=list)
|
||||
#: bounding-box boundary shape (layer ``pcb``), if present
|
||||
boundary: Shape | None = None
|
||||
#: outline shapes (layer ``signal``)
|
||||
|
||||
@@ -27,8 +27,6 @@ from .model import (
|
||||
Pin,
|
||||
Resolution,
|
||||
WidthRule,
|
||||
WiringVia,
|
||||
WiringWire,
|
||||
)
|
||||
from .sexp import SExp, parse
|
||||
from .shapes import Shape, read_area, read_shape
|
||||
@@ -533,45 +531,11 @@ def parse_dsn(text: str) -> DsnBoard:
|
||||
_read_placement(it, board)
|
||||
elif head == "network":
|
||||
_read_network(it, board)
|
||||
elif head == "wiring":
|
||||
_read_wiring(it, board)
|
||||
# unknown scopes are ignored
|
||||
# `wiring` and unknown scopes are intentionally ignored for now.
|
||||
|
||||
return board
|
||||
|
||||
|
||||
def _read_wiring(node: SExp, board: DsnBoard) -> None:
|
||||
"""Tracks and vias already on the board. They stay where they are: the
|
||||
router treats them as copper of their net that other nets keep clear of."""
|
||||
for it in node.items:
|
||||
if not isinstance(it, SExp):
|
||||
continue
|
||||
net_scope = it.child("net")
|
||||
net = _first_value(net_scope) if net_scope is not None else None
|
||||
if not net:
|
||||
continue # netless copper would need a keepout, not a wire
|
||||
if it.head == "wire":
|
||||
path = it.child("path") or it.child("polyline_path")
|
||||
vals = [v.text for v in path.values()] if path is not None else []
|
||||
if len(vals) < 6:
|
||||
continue
|
||||
try:
|
||||
width = float(vals[1])
|
||||
coords = [float(v) for v in vals[2:]]
|
||||
except ValueError:
|
||||
continue
|
||||
board.wires.append(WiringWire(net=net, layer=vals[0], width=width, coords=coords))
|
||||
elif it.head == "via":
|
||||
vals = [v.text for v in it.values()]
|
||||
if len(vals) < 3:
|
||||
continue
|
||||
try:
|
||||
x, y = float(vals[1]), float(vals[2])
|
||||
except ValueError:
|
||||
continue
|
||||
board.vias.append(WiringVia(net=net, padstack=vals[0], x=x, y=y))
|
||||
|
||||
|
||||
def _read_plane(node: SExp):
|
||||
"""``(plane <net> (polygon <layer> <width> x y ...))`` -> :class:`Plane`."""
|
||||
from .model import Plane
|
||||
|
||||
@@ -31,14 +31,13 @@ from dataclasses import dataclass, field
|
||||
import math
|
||||
|
||||
from freeroute.board.board import BasicBoard
|
||||
from freeroute.board.items import Pin, Via
|
||||
from freeroute.board.items import Pin
|
||||
from freeroute.board.search_tree import ShapeSearchTree, TreeShape
|
||||
from freeroute.geometry import (
|
||||
IntBox,
|
||||
IntPoint,
|
||||
Polyline,
|
||||
PolylineShape,
|
||||
Simplex,
|
||||
segment_box,
|
||||
segment_octagon,
|
||||
shove_segment,
|
||||
@@ -99,10 +98,7 @@ def route_board_exact(
|
||||
seed: int | None = None,
|
||||
route_first: frozenset | None = None,
|
||||
access_cost: float = 0.0,
|
||||
rollback: bool = True,
|
||||
net_widths: dict[int, int] | None = None,
|
||||
via_drill: int | None = None,
|
||||
hole_to_hole: int = 0,
|
||||
reserve_escapes: bool = False,
|
||||
) -> ExactRouteResult:
|
||||
"""Route ``board`` orthogonally and verify the result with exact geometry.
|
||||
|
||||
@@ -134,10 +130,7 @@ def route_board_exact(
|
||||
seed=seed,
|
||||
route_first=route_first,
|
||||
access_cost=access_cost,
|
||||
rollback=rollback,
|
||||
net_widths=net_widths,
|
||||
via_drill=via_drill,
|
||||
hole_to_hole=hole_to_hole,
|
||||
reserve_escapes=reserve_escapes,
|
||||
)
|
||||
edge = 0 if edge_clearance is None else edge_clearance
|
||||
outline = board.outline
|
||||
@@ -155,13 +148,7 @@ def route_board_exact(
|
||||
net = pin.net_nos[0] if pin.net_nos else -1
|
||||
pin_layers = frozenset(layer for layer in pin.layers if layer in signal_layers)
|
||||
if pin_layers:
|
||||
# a rotated pad is checked against its outline, not its box
|
||||
exact = pin.shape if _is_rotated(pin.shape) else None
|
||||
tree.insert(TreeShape(next(owner), net, pin_layers, box, exact=exact))
|
||||
for net, copper_layers, box in board.get_fixed_copper():
|
||||
on = frozenset(layer for layer in copper_layers if layer in signal_layers)
|
||||
if on and not box.is_empty():
|
||||
tree.insert(TreeShape(next(owner), net, on, box))
|
||||
tree.insert(TreeShape(next(owner), net, pin_layers, box))
|
||||
for obstacle in board.get_obstacle_areas():
|
||||
if obstacle.layer not in signal_layers:
|
||||
continue
|
||||
@@ -181,35 +168,24 @@ def route_board_exact(
|
||||
|
||||
via_layers = frozenset(signal_layers)
|
||||
accepted: dict[int, _Accepted] = {}
|
||||
fixed_vias = {
|
||||
(item.net_nos[0], item.location)
|
||||
for item in board.get_items()
|
||||
if isinstance(item, Via) and item.fixed and item.net_nos
|
||||
}
|
||||
|
||||
# Verify connection by connection, so one conflicting segment of a
|
||||
# 25-pin supply net costs that one connection, not the whole net.
|
||||
rejected: list[tuple[int, str, str]] = []
|
||||
ends_list = result.connection_ends or [("?", "?", "")] * len(result.connections)
|
||||
# each net is checked at the width it will be written at: its class's
|
||||
# when all of its connections went in at that, else the default
|
||||
net_half = dict(result.net_half)
|
||||
for (net_no, wires, vias), ends in sorted(
|
||||
zip(result.connections, ends_list, strict=False), key=lambda c: c[0][0]
|
||||
):
|
||||
wire_half = net_half.get(net_no, half_width)
|
||||
boxes = _copper_boxes(wires, vias, wire_half, via_layers, via_half)
|
||||
wire_count = len(_copper_boxes(wires, [], wire_half, via_layers, via_half))
|
||||
boxes = _copper_boxes(wires, vias, half_width, via_layers, via_half)
|
||||
wire_count = len(_copper_boxes(wires, [], half_width, via_layers, via_half))
|
||||
if any(
|
||||
tree.clearance_conflict(
|
||||
box, net_no, layer, clearance, "wire" if i < wire_count else "via"
|
||||
)
|
||||
for i, (box, box_layers) in enumerate(boxes)
|
||||
for layer in box_layers
|
||||
) or _end_in_rule_area(tree, wires, wire_half) or (
|
||||
outline is not None and not _inside_outline(
|
||||
outline, boxes[:wire_count], vias, (via_half or wire_half) + edge, edge
|
||||
)
|
||||
) or _end_in_rule_area(tree, wires, half_width) or (
|
||||
outline is not None and not all(outline.box_clear(b, edge) for b, _ in boxes)
|
||||
):
|
||||
rejected.append((net_no, *ends))
|
||||
continue # exact-clearance conflict -> drop (may be recovered by shove)
|
||||
@@ -217,12 +193,7 @@ def route_board_exact(
|
||||
if acc is None:
|
||||
acc = accepted[net_no] = _Accepted(wires=[], vias=[])
|
||||
acc.wires.extend(wires)
|
||||
# connections of one net that end on the same plane cell share its
|
||||
# via: write it once, and never on top of a via already on the board
|
||||
acc.vias.extend(
|
||||
v for v in dict.fromkeys(vias)
|
||||
if v not in acc.vias and not _on_fixed_via(net_no, v, fixed_vias, via_half)
|
||||
)
|
||||
acc.vias.extend(vias)
|
||||
for box, box_layers in boxes:
|
||||
oid = next(owner)
|
||||
tree.insert(TreeShape(oid, net_no, box_layers, box, routed=True))
|
||||
@@ -272,17 +243,6 @@ def route_board_exact(
|
||||
for net_no, acc in accepted.items():
|
||||
clean.wires[net_no] = acc.wires
|
||||
clean.vias[net_no] = acc.vias
|
||||
# shove and the diagonal pass lay copper at the default width: nets they
|
||||
# recovered, and nets whose traces shove pushed aside
|
||||
reshaped = (set(accepted) - accepted_before_recovery) | {
|
||||
net for net, acc in accepted.items() if acc.shove_count
|
||||
}
|
||||
if diagonal:
|
||||
reshaped = set(accepted)
|
||||
clean.net_half = {
|
||||
net: half for net, half in net_half.items() if net in accepted and net not in reshaped
|
||||
}
|
||||
clean.narrowed = list(result.narrowed)
|
||||
|
||||
drc_clean = tree.has_violation(clearance) is None
|
||||
return ExactRouteResult(result=clean, tree=tree, drc_clean=drc_clean, shoves=shoves)
|
||||
@@ -651,15 +611,6 @@ def _end_in_rule_area(tree, wires, half_width) -> bool:
|
||||
return False
|
||||
|
||||
|
||||
def _on_fixed_via(net_no, point, fixed_vias, via_half) -> bool:
|
||||
"""A routed via that reuses a via already on the board: the grid put it
|
||||
on the fixed via's cell, a little off its centre, and it is not written."""
|
||||
return any(
|
||||
net == net_no and abs(loc.x - point.x) <= via_half and abs(loc.y - point.y) <= via_half
|
||||
for net, loc in fixed_vias
|
||||
)
|
||||
|
||||
|
||||
def _copper_boxes(wires, vias, half_width, via_layers, via_half=None):
|
||||
via_half = via_half or half_width
|
||||
boxes: list[tuple[IntBox, frozenset[int]]] = []
|
||||
@@ -672,19 +623,6 @@ def _copper_boxes(wires, vias, half_width, via_layers, via_half=None):
|
||||
return boxes
|
||||
|
||||
|
||||
def _inside_outline(outline, wire_boxes, vias, via_reach, edge) -> bool:
|
||||
"""Copper inside the board, ``edge`` from its outline. A via is round, as
|
||||
the grid and KiCad take it: its square box would reach past a chamfered
|
||||
corner where the via itself does not."""
|
||||
return all(outline.box_clear(b, edge) for b, _ in wire_boxes) and all(
|
||||
outline.point_clear(v, via_reach) for v in vias
|
||||
)
|
||||
|
||||
|
||||
def _is_rotated(shape) -> bool:
|
||||
return isinstance(shape, Simplex) and not shape.is_int_box()
|
||||
|
||||
|
||||
def _net_pins(board: BasicBoard, net_no: int, signal_layers) -> list[Pin]:
|
||||
return [
|
||||
pin
|
||||
|
||||
+160
-671
File diff suppressed because it is too large
Load Diff
@@ -12,8 +12,6 @@ to DSN units (dividing by the resolution) for the SES ``(wire (path ...))`` and
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from __future__ import annotations
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import re
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from freeroute.board import build_board
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from freeroute.dsn import DsnBoard, parse_dsn
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from freeroute.ses import RoutedVia, RoutedWire, RoutingResult, write_ses
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@@ -36,25 +34,6 @@ def _rule_width_dsn(dsn: DsnBoard) -> float:
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return rules[0].value if rules else _DEFAULT_WIDTH_DSN
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def _net_widths_board(dsn: DsnBoard, scale: int) -> dict[int, int]:
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"""Track width of every net whose class asks for more than the default,
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in board units, by net number (build_board numbers nets in DSN order)."""
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default = _rule_width_dsn(dsn)
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by_name: dict[str, float] = {}
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for net_class in dsn.net_classes:
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if not net_class.width_rules:
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continue
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width = net_class.width_rules[0].value
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if width > default:
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for name in net_class.net_names:
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by_name[name] = max(by_name.get(name, 0.0), width)
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return {
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i + 1: round(by_name[net.name] * scale)
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for i, net in enumerate(dsn.nets)
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if net.name in by_name
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}
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def _rule_clearance_dsn(dsn: DsnBoard) -> float:
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for rule in dsn.structure_rules.clearance_rules:
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if not rule.class_pairs: # the layer-wide default clearance
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@@ -74,20 +53,6 @@ def _mm_to_board(dsn: DsnBoard, scale: int, value_mm: float | None) -> int | Non
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return round(value_mm / unit_mm * scale)
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def _via_drill_board(dsn: DsnBoard, scale: int) -> int | None:
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"""The via's drill in board units, from KiCad's padstack name
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(``Via[0-1]_600:300_um`` is a 600 um pad with a 300 um drill); None when
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the name does not say, and the pad size stands in for it."""
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match = re.search(r"_([\d.]+):([\d.]+)_um", _via_padstack(dsn))
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if not match:
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return None
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return round(float(match.group(2)) * _dsn_units_per_um(dsn) * scale)
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def _dsn_units_per_um(dsn: DsnBoard) -> float:
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return {"um": 1.0, "mm": 0.001, "mil": 1 / 25.4, "inch": 1 / 25400}.get(dsn.unit, 1.0)
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def _via_half_board(dsn: DsnBoard, scale: int) -> int | None:
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"""Half the via pad's size in board units, from the DSN's via padstack.
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@@ -118,8 +83,7 @@ def route_dsn_board(
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seed: int | None = None,
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route_first: frozenset | None = None,
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access_cost: float = 0.0,
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hole_to_hole_mm: float = 0.25,
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rollback: bool = True,
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reserve_escapes: bool = False,
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) -> tuple[RouteResult, int, list[str]]:
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"""Route a parsed :class:`DsnBoard`; return the board-unit result, the scale,
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and the layer names. ``layers`` restricts routing to those signal-layer
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@@ -143,10 +107,7 @@ def route_dsn_board(
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seed=seed,
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route_first=route_first,
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access_cost=access_cost,
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rollback=rollback,
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net_widths=_net_widths_board(dsn, scale),
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via_drill=_via_drill_board(dsn, scale),
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hole_to_hole=_mm_to_board(dsn, scale, hole_to_hole_mm) or 0,
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reserve_escapes=reserve_escapes,
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)
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return result, scale, [layer.name for layer in dsn.layers]
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@@ -161,9 +122,6 @@ def _to_routing_result(route, dsn: DsnBoard, scale: int, layer_names: list[str])
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result = RoutingResult()
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for net_no, segments in route.wires.items():
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name = numbers_to_names.get(net_no, str(net_no))
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# its class's width when every connection of the net went in at it
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half = getattr(route, "net_half", {}).get(net_no)
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net_width = 2 * half / scale if half else width_dsn
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for layer_index, path in segments:
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layer_name = layer_names[layer_index] if layer_index < len(layer_names) else "F.Cu"
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coords: list[float] = []
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@@ -171,7 +129,7 @@ def _to_routing_result(route, dsn: DsnBoard, scale: int, layer_names: list[str])
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coords.append(point.x / scale)
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coords.append(point.y / scale)
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if len(coords) >= 4:
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result.add_wire(name, RoutedWire(layer=layer_name, width=net_width, coords=coords))
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result.add_wire(name, RoutedWire(layer=layer_name, width=width_dsn, coords=coords))
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for net_no, locations in route.vias.items():
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name = numbers_to_names.get(net_no, str(net_no))
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for loc in locations:
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@@ -179,9 +137,6 @@ def _to_routing_result(route, dsn: DsnBoard, scale: int, layer_names: list[str])
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result.unrouted = [
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(numbers_to_names.get(n, str(n)), a, b, zone) for n, a, b, zone in getattr(route, "failed", [])
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]
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result.narrowed = [
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(numbers_to_names.get(n, str(n)), a, b) for n, a, b in getattr(route, "narrowed", [])
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]
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return result
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@@ -196,8 +151,7 @@ def build_routing_result(
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seed: int | None = None,
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route_first: frozenset | None = None,
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access_cost: float = 0.0,
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hole_to_hole_mm: float = 0.25,
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rollback: bool = True,
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reserve_escapes: bool = False,
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) -> RoutingResult:
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"""Route ``dsn`` (grid track) and convert to a DSN-unit RoutingResult."""
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route, scale, layer_names = route_dsn_board(
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@@ -205,8 +159,7 @@ def build_routing_result(
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edge_clearance_mm=edge_clearance_mm, resolution=resolution, seed=seed,
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route_first=route_first,
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access_cost=access_cost,
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hole_to_hole_mm=hole_to_hole_mm,
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rollback=rollback,
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reserve_escapes=reserve_escapes,
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)
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return _to_routing_result(route, dsn, scale, layer_names)
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@@ -225,8 +178,7 @@ def route_dsn_board_exact(
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seed: int | None = None,
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route_first: frozenset | None = None,
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access_cost: float = 0.0,
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hole_to_hole_mm: float = 0.25,
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rollback: bool = True,
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reserve_escapes: bool = False,
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) -> tuple[ExactRouteResult, int, list[str]]:
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"""Route a parsed :class:`DsnBoard` with the exact-geometry (orthogonal,
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DRC-verified) track; return the exact result, the scale, and layer names.
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@@ -254,10 +206,7 @@ def route_dsn_board_exact(
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seed=seed,
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route_first=route_first,
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access_cost=access_cost,
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rollback=rollback,
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net_widths=_net_widths_board(dsn, scale),
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via_drill=_via_drill_board(dsn, scale),
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hole_to_hole=_mm_to_board(dsn, scale, hole_to_hole_mm) or 0,
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reserve_escapes=reserve_escapes,
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)
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return exact, scale, [layer.name for layer in dsn.layers]
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@@ -276,8 +225,7 @@ def build_exact_routing_result(
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seed: int | None = None,
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route_first: frozenset | None = None,
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access_cost: float = 0.0,
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hole_to_hole_mm: float = 0.25,
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rollback: bool = True,
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reserve_escapes: bool = False,
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) -> RoutingResult:
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"""Route ``dsn`` (exact track) and convert to a DSN-unit RoutingResult."""
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exact, scale, layer_names = route_dsn_board_exact(
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@@ -293,8 +241,7 @@ def build_exact_routing_result(
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seed=seed,
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route_first=route_first,
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access_cost=access_cost,
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hole_to_hole_mm=hole_to_hole_mm,
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rollback=rollback,
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reserve_escapes=reserve_escapes,
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)
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return _to_routing_result(exact.result, dsn, scale, layer_names)
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@@ -515,10 +515,6 @@ def route_board_rooms(
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pin_layers = frozenset(layer for layer in pin.layers if layer in signal_layers)
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if pin_layers:
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tree.insert(TreeShape(next(owner), net, pin_layers, box))
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for net, copper_layers, box in board.get_fixed_copper():
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on = frozenset(layer for layer in copper_layers if layer in signal_layers)
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if on and not box.is_empty():
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tree.insert(TreeShape(next(owner), net, on, box))
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for obstacle in board.get_obstacle_areas():
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if obstacle.layer not in signal_layers:
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continue
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@@ -60,9 +60,6 @@ class RoutingResult:
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#: connections the router could not make: (net name, one end, other end,
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#: the zone both ends sit in or "") -- a zone's fill may join the latter
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unrouted: list[tuple[str, str, str, str]] = field(default_factory=list)
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#: connections of a wider net class that only fitted at the default width
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#: (net name, one end, other end); their net is written at the default
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narrowed: list[tuple[str, str, str]] = field(default_factory=list)
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def net(self, name: str, *, create: bool = False) -> RoutedNet | None:
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"""Return the :class:`RoutedNet` with ``name`` (creating it if asked)."""
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@@ -0,0 +1,65 @@
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"""--reserve-escapes: a crowded pin keeps a way out until it is routed."""
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from __future__ import annotations
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from pathlib import Path
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from freeroute.board import build_board
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from freeroute.dsn import parse_dsn
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from freeroute.route.grid_router import GridRouter
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from freeroute.route.pipeline import (
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_rule_clearance_dsn,
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_rule_width_dsn,
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build_exact_routing_result,
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)
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SMD = (Path(__file__).resolve().parent.parent / "dsn" / "fixtures" / "smd_demo.dsn").read_text()
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def _router():
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dsn = parse_dsn(SMD)
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s = dsn.resolution.value
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router = GridRouter(
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build_board(dsn),
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trace_width=round(_rule_width_dsn(dsn) * s),
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clearance=round(_rule_clearance_dsn(dsn) * s),
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orthogonal=True,
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resolution=2,
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reserve_escapes=True,
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)
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conns = router._build_connections()
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router._conns = conns
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router._count_pending(conns)
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router._reserve_escapes(conns)
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return router, conns
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def test_a_reserved_escape_is_closed_to_other_nets_and_open_to_its_own():
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router, conns = _router()
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assert router._reserved
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node, claims = next(iter(router._reserved.items()))
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pin_id, owner = claims[0]
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other = next(c.net_no for c in conns if c.net_no != owner)
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cell, layer = node[:2], node[2]
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assert router._enter_cost(cell, layer, other, True, conns) is None # even for rip-up
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assert router._enter_cost(cell, layer, owner, False, conns) is not None or node in router._keepout
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def test_the_escape_is_released_once_its_pin_is_routed():
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router, conns = _router()
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node, claims = next(iter(router._reserved.items()))
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other = next(c.net_no for c in conns if c.net_no != claims[0][1])
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cell, layer = node[:2], node[2]
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assert router._enter_cost(cell, layer, other, False, conns) is None
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for c in conns: # every connection routed: no pin is pending any more
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router._settle(c, -1)
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released = router._enter_cost(cell, layer, other, False, conns)
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reserved, router._reserved = router._reserved, {}
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assert released == router._enter_cost(cell, layer, other, False, conns)
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router._reserved = reserved
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def test_reserving_escapes_loses_nothing_on_the_demo_board():
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plain = build_exact_routing_result(parse_dsn(SMD), resolution=2)
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reserved = build_exact_routing_result(parse_dsn(SMD), resolution=2, reserve_escapes=True)
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assert len(reserved.unrouted) <= len(plain.unrouted)
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@@ -1,108 +0,0 @@
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"""Tracks and vias already on the board (the DSN's wiring) are fixed copper."""
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from __future__ import annotations
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from freeroute.board import build_board
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from freeroute.dsn import parse_dsn
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from freeroute.route.pipeline import route_dsn_board_exact
|
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|
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_DSN = """(pcb wired (parser) (resolution um 10) (unit um)
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(structure
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(layer F.Cu (type signal)) (layer B.Cu (type signal))
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||||
(boundary (path pcb 0 0 0 30000 0 30000 -20000 0 -20000 0 0))
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(via "Via[0-1]_600:300_um") (rule (width 250) (clearance 200)))
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(placement (component S (place A1 5000 -10000 front 0) (place A2 25000 -10000 front 0)))
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(library
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(image S (pin smd 1 0 0))
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||||
(padstack smd (shape (rect F.Cu -400 -400 400 400)) (attach off))
|
||||
(padstack "Via[0-1]_600:300_um" (shape (circle F.Cu 600)) (shape (circle B.Cu 600)) (attach off)))
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(network (net SIG (pins A1-1 A2-1)) (net GND))
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(wiring
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(wire (path F.Cu 400 15000 0 15000 -20000) (net GND) (type route))
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(via "Via[0-1]_600:300_um" 8000 -14000 (net GND) (type route))))"""
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|
||||
|
||||
def test_wiring_is_read_with_its_nets():
|
||||
dsn = parse_dsn(_DSN)
|
||||
assert [(w.net, w.layer, w.width) for w in dsn.wires] == [("GND", "F.Cu", 400.0)]
|
||||
assert [(v.net, v.x, v.y) for v in dsn.vias] == [("GND", 8000.0, -14000.0)]
|
||||
|
||||
|
||||
def test_wiring_is_fixed_copper_and_not_a_connection_to_route():
|
||||
board = build_board(parse_dsn(_DSN))
|
||||
copper = board.get_fixed_copper()
|
||||
gnd = next(n.net_number for n in board.nets if n.name == "GND")
|
||||
assert copper and all(net == gnd for net, _, _ in copper)
|
||||
assert not any(gnd in p.net_nos for p in board.get_pins())
|
||||
|
||||
|
||||
def test_other_nets_route_around_a_fixed_track():
|
||||
dsn = parse_dsn(_DSN)
|
||||
exact, scale, names = route_dsn_board_exact(dsn, resolution=2)
|
||||
sig = next(i + 1 for i, n in enumerate(dsn.nets) if n.name == "SIG")
|
||||
assert sig in exact.result.routed_net_numbers
|
||||
assert exact.drc_clean
|
||||
wall = 15000 * scale
|
||||
for layer, pts in exact.result.wires.get(sig, []):
|
||||
if names[layer] != "F.Cu":
|
||||
continue
|
||||
for p, q in zip(pts, pts[1:], strict=False):
|
||||
assert not (min(p.x, q.x) < wall < max(p.x, q.x)), "crossed the GND track on F.Cu"
|
||||
|
||||
|
||||
# --- fixed wiring as connectivity ------------------------------------------
|
||||
|
||||
_FANOUT = """(pcb fanout (parser) (resolution um 10) (unit um)
|
||||
(structure
|
||||
(layer F.Cu (type signal)) (layer In1.Cu (type power)) (layer In2.Cu (type power))
|
||||
(layer B.Cu (type signal))
|
||||
(boundary (path pcb 0 0 0 30000 0 30000 -20000 0 -20000 0 0))
|
||||
(plane GND (polygon In1.Cu 0 500 -500 29500 -500 29500 -19500 500 -19500 500 -500))
|
||||
(via "Via[0-3]_600:300_um") (rule (width 150) (clearance 150)))
|
||||
(placement (component S (place G1 5000 -10000 front 0) (place A 10000 -10000 front 0)
|
||||
(place B 25000 -11500 back 0)))
|
||||
(library
|
||||
(image S (pin smd 1 0 0))
|
||||
(padstack smd (shape (rect F.Cu -300 -300 300 300)) (attach off))
|
||||
(padstack "Via[0-3]_600:300_um" (shape (circle F.Cu 600)) (shape (circle B.Cu 600)) (attach off)))
|
||||
(network (net GND (pins G1-1)) (net SIG (pins A-1 B-1)))
|
||||
(wiring
|
||||
(wire (path F.Cu 150 5000 -10000 5000 -11500) (net GND) (type route))
|
||||
(via "Via[0-3]_600:300_um" 5000 -11500 (net GND) (type route))
|
||||
(wire (path F.Cu 150 10000 -10000 10000 -11500) (net SIG) (type route))
|
||||
(via "Via[0-3]_600:300_um" 10000 -11500 (net SIG) (type route))
|
||||
(wire (path F.Cu 300 2000 -2000 8000 -2000) (net GND) (type route))))"""
|
||||
|
||||
|
||||
def test_a_pad_fanned_out_to_its_plane_needs_no_route():
|
||||
dsn = parse_dsn(_FANOUT)
|
||||
exact, _scale, _names = route_dsn_board_exact(dsn, resolution=2)
|
||||
gnd = next(i + 1 for i, n in enumerate(dsn.nets) if n.name == "GND")
|
||||
assert exact.result.failed == []
|
||||
assert not exact.result.vias.get(gnd) and not exact.result.wires.get(gnd)
|
||||
|
||||
|
||||
def test_a_fanned_out_signal_is_routed_from_its_via():
|
||||
# B is on the bottom face, level with A's fan-out via: starting from that
|
||||
# via on B.Cu is the cheapest way, and needs no via of its own
|
||||
dsn = parse_dsn(_FANOUT)
|
||||
exact, scale, names = route_dsn_board_exact(dsn, resolution=2)
|
||||
sig = next(i + 1 for i, n in enumerate(dsn.nets) if n.name == "SIG")
|
||||
assert sig in exact.result.routed_net_numbers
|
||||
assert not exact.result.vias.get(sig), "the fan-out via is already there"
|
||||
assert {names[layer] for layer, _ in exact.result.wires[sig]} == {"B.Cu"}
|
||||
|
||||
|
||||
def test_the_session_never_repeats_copper_already_on_the_board():
|
||||
# the JAR writes the DSN's wiring back into its session, and an applier
|
||||
# then adds it a second time on top of itself; freeroute writes only
|
||||
# what it routed
|
||||
from freeroute.route.pipeline import build_exact_routing_result
|
||||
|
||||
fixed_vias = {(5000.0, -11500.0), (10000.0, -11500.0)}
|
||||
fixed_paths = {(5000.0, -10000.0, 5000.0, -11500.0), (10000.0, -10000.0, 10000.0, -11500.0),
|
||||
(2000.0, -2000.0, 8000.0, -2000.0)}
|
||||
result = build_exact_routing_result(parse_dsn(_FANOUT), resolution=2)
|
||||
for net in result.nets:
|
||||
assert not {(v.x, v.y) for v in net.vias} & fixed_vias
|
||||
assert not {tuple(w.coords) for w in net.wires} & fixed_paths
|
||||
@@ -1,284 +0,0 @@
|
||||
"""The grid must not believe copper legal that the exact check then refuses.
|
||||
|
||||
Each case is one way the two used to disagree on roomba-ESP12E: a rotated oval
|
||||
pad modelled as an inflated box (and opened to its own net), a via shared by
|
||||
two connections of a net losing its footprint when one of them is ripped, and
|
||||
a wider net class searched as if it were the default width.
|
||||
"""
|
||||
|
||||
from __future__ import annotations
|
||||
|
||||
import math
|
||||
|
||||
import pytest
|
||||
|
||||
from freeroute.board import build_board
|
||||
from freeroute.dsn import parse_dsn
|
||||
from freeroute.geometry import IntBox, Simplex
|
||||
from freeroute.route.grid_router import GridRouter
|
||||
from freeroute.route.pipeline import (
|
||||
_rule_clearance_dsn,
|
||||
_rule_width_dsn,
|
||||
_via_half_board,
|
||||
build_exact_routing_result,
|
||||
)
|
||||
|
||||
# --- rotated oval pads -------------------------------------------------------
|
||||
|
||||
|
||||
def _socket_dsn(rotation: float, layout: str) -> str:
|
||||
"""A 1x4 2.54 mm socket strip (rect pin 1, oval pins 2-4) at ``rotation``,
|
||||
each pin its own net, routed to a small SMD pad 0.9 mm away."""
|
||||
cx, cy = 100000, -100000
|
||||
t = math.radians(rotation)
|
||||
ax = (math.cos(t), math.sin(t))
|
||||
perp = (-math.sin(t), math.cos(t))
|
||||
places = []
|
||||
for i in range(4):
|
||||
px, py = cx + 2540 * i * ax[0], cy + 2540 * i * ax[1]
|
||||
side = 1 if i % 2 == 0 else -1
|
||||
if layout == "y":
|
||||
tx, ty = px, py + side * 9000
|
||||
else:
|
||||
tx, ty = px + side * 8000 * perp[0], py + side * 8000 * perp[1]
|
||||
places.append(f"(place T{i + 1} {round(tx)} {round(ty)} front 0)")
|
||||
nets = " ".join(f"(net N{i} (pins P3-{i + 1} T{i + 1}-1))" for i in range(4))
|
||||
return f"""(pcb socket (parser) (resolution um 10) (unit um)
|
||||
(structure
|
||||
(layer F.Cu (type signal)) (layer B.Cu (type signal))
|
||||
(boundary (path pcb 0 125000 -115000 85000 -115000 85000 -75000 125000 -75000
|
||||
125000 -115000))
|
||||
(via "Via[0-1]_800:400_um")
|
||||
(rule (width 300) (clearance 250)))
|
||||
(placement
|
||||
(component S (place P3 {cx} {cy} front {rotation}))
|
||||
(component T {" ".join(places)}))
|
||||
(library
|
||||
(image S (pin R 1 0 0) (pin O 2 2540 0) (pin O 3 5080 0) (pin O 4 7620 0))
|
||||
(image T (pin t 1 0 0))
|
||||
(padstack O (shape (path F.Cu 1727.2 0 -152.4 0 152.4))
|
||||
(shape (path B.Cu 1727.2 0 -152.4 0 152.4)) (attach off))
|
||||
(padstack R (shape (rect F.Cu -863.6 -1016 863.6 1016))
|
||||
(shape (rect B.Cu -863.6 -1016 863.6 1016)) (attach off))
|
||||
(padstack t (shape (rect F.Cu -500 -500 500 500)) (attach off))
|
||||
(padstack "Via[0-1]_800:400_um" (shape (circle F.Cu 800)) (shape (circle B.Cu 800))
|
||||
(attach off)))
|
||||
(network {nets}
|
||||
(class c N0 N1 N2 N3 (circuit (use_via "Via[0-1]_800:400_um"))
|
||||
(rule (width 300) (clearance 250)))))"""
|
||||
|
||||
|
||||
def test_a_rotated_oval_pad_is_its_outline_not_its_bounding_box():
|
||||
board = build_board(parse_dsn(_socket_dsn(60, "y")))
|
||||
oval = next(p for p in board.get_pins() if p.component_ref == "P3" and p.name == "2")
|
||||
assert isinstance(oval.shape, Simplex) and not oval.shape.is_int_box()
|
||||
box = oval.shape.bounding_box()
|
||||
assert oval.shape.contains(oval.location)
|
||||
assert not oval.shape.contains(box.ll) and not oval.shape.contains(box.ur)
|
||||
|
||||
|
||||
@pytest.mark.parametrize("layout", ["y", "perp"])
|
||||
def test_routes_leaving_a_rotated_socket_pass_the_exact_check(layout):
|
||||
result = build_exact_routing_result(
|
||||
parse_dsn(_socket_dsn(60, layout)), resolution=2, shove=True
|
||||
)
|
||||
assert result.unrouted == []
|
||||
|
||||
|
||||
# --- a via two connections share --------------------------------------------
|
||||
|
||||
_SHARED_VIA = """(pcb shared (parser) (resolution um 10) (unit um)
|
||||
(structure
|
||||
(layer Top (type signal)) (layer Bottom (type signal))
|
||||
(boundary (path pcb 0 0 0 20000 0 20000 -20000 0 -20000 0 0))
|
||||
(via "Via[0-1]_800:400_um")
|
||||
(rule (width 300) (clearance 250)))
|
||||
(library
|
||||
(padstack p (shape (rect Top -400 -400 400 400)) (attach off))
|
||||
(padstack "Via[0-1]_800:400_um" (shape (circle Top 800)) (shape (circle Bottom 800))
|
||||
(attach off))
|
||||
(image PAD (pin p 1 0 0)))
|
||||
(placement (component PAD
|
||||
(place G1 3000 -5000 front 0) (place G2 3000 -15000 front 0)
|
||||
(place G3 17000 -10000 front 0) (place S1 3000 -10000 front 0)
|
||||
(place S2 17000 -3000 front 0)))
|
||||
(network (net GND (pins G1-1 G2-1 G3-1)) (net SIG (pins S1-1 S2-1))))"""
|
||||
|
||||
|
||||
def _line(a, b, layer):
|
||||
(x, y), (x1, y1) = a, b
|
||||
out = [(x, y, layer)]
|
||||
while x != x1:
|
||||
x += 1 if x1 > x else -1
|
||||
out.append((x, y, layer))
|
||||
while y != y1:
|
||||
y += 1 if y1 > y else -1
|
||||
out.append((x, y, layer))
|
||||
return out
|
||||
|
||||
|
||||
def test_a_shared_via_keeps_its_footprint_when_one_user_is_ripped():
|
||||
dsn = parse_dsn(_SHARED_VIA)
|
||||
s = dsn.resolution.value
|
||||
router = GridRouter(
|
||||
build_board(dsn),
|
||||
trace_width=round(_rule_width_dsn(dsn) * s),
|
||||
clearance=round(_rule_clearance_dsn(dsn) * s),
|
||||
via_half=_via_half_board(dsn, s),
|
||||
)
|
||||
conns = router._conns = router._build_connections()
|
||||
gnd = [c for c in conns if len({c.a.component_ref, c.b.component_ref} & {"G1", "G2", "G3"})]
|
||||
sig = next(c for c in conns if c not in gnd)
|
||||
first, second = gnd
|
||||
g3 = router._cell_of(next(p for p in router.board.get_pins() if p.component_ref == "G3").location)
|
||||
via = (g3[0] - 10, g3[1])
|
||||
|
||||
def through_via(conn):
|
||||
a, b = router._cell_of(conn.a.location), router._cell_of(conn.b.location)
|
||||
return _line(a, via, 0) + _line(via, b, 1)
|
||||
|
||||
router._commit(first, through_via(first))
|
||||
router._commit(second, through_via(second))
|
||||
footprint = [c for c in router._via_cells(via) if c != via]
|
||||
router._rip(first)
|
||||
|
||||
assert second.routed and via in second.via_cells
|
||||
assert all(router._via_claims.get(c) == [second.index] for c in footprint)
|
||||
# another net still keeps its distance from the via that is left
|
||||
assert all(router._enter_cost_base(c, 0, sig.net_no, False, conns) is None for c in footprint)
|
||||
|
||||
|
||||
def test_a_route_through_a_shared_via_rips_every_user():
|
||||
"""Two connections of a net share a via. Another net routed through it
|
||||
in rip-up mode has to rip both, or the one left keeps its via under the
|
||||
new trace and the exact check throws one of them out."""
|
||||
dsn = parse_dsn(_SHARED_VIA)
|
||||
s = dsn.resolution.value
|
||||
router = GridRouter(
|
||||
build_board(dsn),
|
||||
trace_width=round(_rule_width_dsn(dsn) * s),
|
||||
clearance=round(_rule_clearance_dsn(dsn) * s),
|
||||
via_half=_via_half_board(dsn, s),
|
||||
)
|
||||
conns = router._conns = router._build_connections()
|
||||
gnd = [c for c in conns if len({c.a.component_ref, c.b.component_ref} & {"G1", "G2", "G3"})]
|
||||
sig = next(c for c in conns if c not in gnd)
|
||||
first, second = gnd
|
||||
g3 = router._cell_of(next(p for p in router.board.get_pins() if p.component_ref == "G3").location)
|
||||
via = (g3[0] - 10, g3[1])
|
||||
|
||||
def through_via(conn):
|
||||
a, b = router._cell_of(conn.a.location), router._cell_of(conn.b.location)
|
||||
return _line(a, via, 0) + _line(via, b, 1)
|
||||
|
||||
router._commit(first, through_via(first))
|
||||
router._commit(second, through_via(second))
|
||||
# the via's copper alone: footprint cells no trace or trace halo covers
|
||||
crossing = [
|
||||
node
|
||||
for c in router._via_cells(via)
|
||||
for node in ((*c, 0), (*c, 1))
|
||||
if node not in router._cell_owner and node not in router._halo
|
||||
]
|
||||
assert crossing
|
||||
|
||||
assert router._crossed_owners(crossing, sig.net_no, conns) == {first.index, second.index}
|
||||
|
||||
|
||||
# --- a wider net class --------------------------------------------------------
|
||||
|
||||
_WIDE = """(pcb wide (parser) (resolution um 10) (unit um)
|
||||
(structure
|
||||
(layer F.Cu (type signal))
|
||||
(boundary (path pcb 0 0 0 20000 0 20000 -10000 0 -10000 0 0))
|
||||
(rule (width 300) (clearance 250)))
|
||||
(placement (component S (place P1 2000 -5000 front 0) (place P2 18000 -5000 front 0)
|
||||
(place Q1 10000 {ylo} front 0) (place Q2 10000 {yhi} front 0)
|
||||
(place Q3 10000 -1000 front 0) (place Q4 10000 -9000 front 0)))
|
||||
(library (image S (pin pad 1 0 0)) (padstack pad (shape (rect F.Cu -600 -600 600 600)) (attach off)))
|
||||
(network (net PWR (pins P1-1 P2-1)) (net SIG (pins Q1-1 Q3-1)) (net SIG2 (pins Q2-1 Q4-1))
|
||||
(class Power PWR (rule (width 500) (clearance 250)))))"""
|
||||
|
||||
|
||||
@pytest.mark.parametrize("resolution", [1, 2])
|
||||
@pytest.mark.parametrize("gap", [900, 1000, 1075])
|
||||
def test_a_wide_net_past_pads_it_does_not_fit_between_is_not_refused(gap, resolution):
|
||||
# 0.3 mm fits the gap between the two pads, 0.5 mm does not: the grid
|
||||
# must see that, rather than lay it wide and have the exact check drop it
|
||||
ylo, yhi = -5000 - gap // 2 - 600, -5000 + gap // 2 + 600
|
||||
result = build_exact_routing_result(
|
||||
parse_dsn(_WIDE.format(ylo=ylo, yhi=yhi)), resolution=resolution
|
||||
)
|
||||
assert result.unrouted == []
|
||||
|
||||
|
||||
def _wide_router():
|
||||
dsn = parse_dsn(_WIDE.format(ylo=-6050, yhi=-3950))
|
||||
s = dsn.resolution.value
|
||||
pwr = next(i for i, net in enumerate(dsn.nets, 1) if net.name == "PWR")
|
||||
return GridRouter(
|
||||
build_board(dsn),
|
||||
trace_width=round(_rule_width_dsn(dsn) * s),
|
||||
clearance=round(_rule_clearance_dsn(dsn) * s),
|
||||
resolution=2,
|
||||
net_widths={pwr: 5000},
|
||||
), pwr
|
||||
|
||||
|
||||
def test_a_wide_trace_keeps_clear_of_a_default_one_at_the_grid_diagonal():
|
||||
router, _pwr = _wide_router()
|
||||
# 0.5 mm against 0.3 mm needs 0.25 + 0.25 + 0.15 = 0.65 mm between centres,
|
||||
# on either axis, since the exact check compares boxes
|
||||
need = 2500 + router.clearance + router.half_width
|
||||
for dx, dy in [(2, 2), (2, 1), (1, 2)]:
|
||||
assert max(dx, dy) * router.step < need
|
||||
assert (dx, dy) in router._halo_for(2500)
|
||||
|
||||
|
||||
def test_a_wide_rip_up_route_counts_what_its_extra_width_crosses():
|
||||
router, pwr_net = _wide_router()
|
||||
conns = router._conns = router._build_connections()
|
||||
pwr = next(c for c in conns if c.net_no == pwr_net)
|
||||
other = next(c for c in conns if c.net_no != pwr_net)
|
||||
# a default-width trace two cells from the wide route's path
|
||||
x, y = 20, 5
|
||||
router._commit(other, _line((x - 3, y + 2), (x + 3, y + 2), 0))
|
||||
path = _line((x - 3, y), (x + 3, y), 0)
|
||||
spread = router._spread_for(2500)
|
||||
assert other.index not in router._crossed_owners(path, pwr.net_no, conns)
|
||||
assert other.index in router._crossed_owners(path, pwr.net_no, conns, spread)
|
||||
|
||||
|
||||
def test_a_pad_cell_check_uses_the_rotated_outline():
|
||||
board = build_board(parse_dsn(_socket_dsn(60, "y")))
|
||||
router = GridRouter(board, trace_width=3000, clearance=2500, resolution=2)
|
||||
oval = next(p for p in board.get_pins() if p.component_ref == "P3" and p.name == "2")
|
||||
box = oval.shape.bounding_box()
|
||||
margin = router.clearance + router.half_width
|
||||
exact = set(router._pad_cells(oval.shape, box, margin))
|
||||
boxed = set(router._cells_in_box(box, margin))
|
||||
assert exact < boxed
|
||||
for cell in boxed - exact:
|
||||
c = router._cell_center(cell)
|
||||
square = IntBox(c.x - margin, c.y - margin, c.x + margin, c.y + margin)
|
||||
assert oval.shape.intersection(square).dimension() != 2
|
||||
|
||||
|
||||
def test_a_via_by_a_chamfered_corner_is_judged_round():
|
||||
"""The grid keeps a via's centre its radius plus the edge clearance from
|
||||
the outline. The exact check used the via's square, whose corner reaches
|
||||
past a 45-degree chamfer where the round via does not."""
|
||||
from freeroute.board.outline import BoardOutline
|
||||
from freeroute.geometry import IntBox, IntPoint
|
||||
from freeroute.route.exact_router import _inside_outline
|
||||
|
||||
# a 10 mm square with its lower-left corner cut at 45 degrees
|
||||
outline = BoardOutline([IntPoint(*p) for p in
|
||||
[(30, 0), (100, 0), (100, 100), (0, 100), (0, 30)]])
|
||||
half, edge = 4, 1
|
||||
via = IntPoint(19, 20) # its centre 6.4 from the chamfer x + y = 30
|
||||
square = IntBox(via.x - half, via.y - half, via.x + half, via.y + half)
|
||||
assert not outline.box_clear(square, edge) # the square's corner: 0.7 away
|
||||
assert _inside_outline(outline, [], [via], half + edge, edge)
|
||||
# 4.2 from the chamfer: the round via itself is too close
|
||||
assert not _inside_outline(outline, [], [IntPoint(18, 18)], half + edge, edge)
|
||||
@@ -1,42 +0,0 @@
|
||||
"""Net classes wider than the default are routed at their width where it fits."""
|
||||
|
||||
from __future__ import annotations
|
||||
|
||||
from freeroute.dsn import parse_dsn
|
||||
from freeroute.route.pipeline import build_exact_routing_result
|
||||
|
||||
_BOARD = """(pcb widths (parser) (resolution um 10) (unit um)
|
||||
(structure
|
||||
(layer F.Cu (type signal))
|
||||
(boundary (path pcb 0 0 0 20000 0 20000 -10000 0 -10000 0 0))
|
||||
{keepouts}
|
||||
(rule (width 150) (clearance 150)))
|
||||
(placement (component S (place P1 2000 -5000 front 0) (place P2 18000 -5000 front 0)))
|
||||
(library (image S (pin pad 1 0 0)) (padstack pad (shape (rect F.Cu -600 -600 600 600)) (attach off)))
|
||||
(network (net PWR (pins P1-1 P2-1))
|
||||
(class Power PWR (rule (width 400) (clearance 150)))))"""
|
||||
|
||||
# two keepouts leave a 0.65 mm channel: room for 0.15 mm (0.45), not for 0.4 mm (0.7)
|
||||
_CHANNEL = (
|
||||
'(keepout "" (polygon F.Cu 0 9000 0 11000 0 11000 -4675 9000 -4675))\n'
|
||||
' (keepout "" (polygon F.Cu 0 9000 -5325 11000 -5325 11000 -10000 9000 -10000))'
|
||||
)
|
||||
|
||||
|
||||
def _route(keepouts=""):
|
||||
return build_exact_routing_result(parse_dsn(_BOARD.format(keepouts=keepouts)), resolution=2)
|
||||
|
||||
|
||||
def test_a_wider_class_is_routed_and_written_at_its_width():
|
||||
result = _route()
|
||||
assert result.unrouted == [] and result.narrowed == []
|
||||
widths = {w.width for net in result.nets for w in net.wires}
|
||||
assert widths == {400.0}
|
||||
|
||||
|
||||
def test_a_wider_class_that_does_not_fit_falls_back_to_the_default():
|
||||
result = _route(_CHANNEL)
|
||||
assert result.unrouted == []
|
||||
assert [net for net, _a, _b in result.narrowed] == ["PWR"]
|
||||
widths = {w.width for net in result.nets for w in net.wires}
|
||||
assert widths == {150.0}
|
||||
@@ -51,22 +51,19 @@ def test_routes_keep_edge_clearance_at_a_rounded_corner():
|
||||
assert outline.edge_distance(p) >= half + 500 * scale - 1
|
||||
|
||||
|
||||
@pytest.mark.parametrize("resolution", [1, 4])
|
||||
def test_every_pin_of_a_half_millimetre_pitch_row_escapes(resolution):
|
||||
@pytest.mark.parametrize(("resolution", "escape"), [(1, 2), (4, 5)])
|
||||
def test_every_pin_of_a_half_millimetre_pitch_row_escapes(resolution, escape):
|
||||
# Five 0.3 mm pads at 0.5 mm pitch, each wired to its own pad 8 mm away.
|
||||
# Between two neighbours a trace's centre has a legal band only 0.15 mm
|
||||
# wide. At resolution 4 the 0.1 mm columns cannot miss it. At resolution
|
||||
# 1 the 0.4 mm grid misses most bands, but a stub leaves its pin straight
|
||||
# along the band and jogs to the column only past the pads, so every pin
|
||||
# gets out there too, as the JAR manages (only 2 did before).
|
||||
# wide. At resolution 1 the 0.4 mm grid misses most bands; at 4 its
|
||||
# 0.1 mm columns cannot, and every pin gets out, as the JAR manages.
|
||||
places = " ".join(f"(place R{i} {6000 + 500 * i} -6000 front 0)" for i in range(5))
|
||||
places += " " + " ".join(f"(place F{i} {6000 + 500 * i} -14000 front 0)" for i in range(5))
|
||||
nets = " ".join(f"(net N{i} (pins R{i}-1 F{i}-1))" for i in range(5))
|
||||
result, _, _ = route_dsn_board_exact(
|
||||
parse_dsn(_dsn(f"(component P {places})", nets)), resolution=resolution
|
||||
)
|
||||
assert len(result.routed_net_numbers) == 5
|
||||
assert result.drc_clean
|
||||
assert len(result.routed_net_numbers) == escape
|
||||
|
||||
|
||||
def test_resolution_one_has_no_halo_so_the_grid_is_unchanged():
|
||||
@@ -205,18 +202,6 @@ def test_smd_pads_reach_an_inner_plane_by_their_own_via():
|
||||
assert all(names[layer] in ("F.Cu", "B.Cu") for segs in result.result.wires.values() for layer, _ in segs)
|
||||
|
||||
|
||||
def test_a_pad_outside_the_plane_routes_to_it():
|
||||
# G1 sits left of a plane that covers only the right half, so its route
|
||||
# has to reach the plane's cells: those ends are the plane, not a pin
|
||||
dsn_text = _four_layer_dsn().replace(
|
||||
"(plane GND (polygon In1.Cu 0 500 -500 29500 -500 29500 -29500 500 -29500 500 -500))",
|
||||
"(plane GND (polygon In1.Cu 0 15000 -500 29500 -500 29500 -29500 15000 -29500 15000 -500))",
|
||||
)
|
||||
result, _scale, _names = route_dsn_board_exact(parse_dsn(dsn_text))
|
||||
gnd = next(i + 1 for i, n in enumerate(parse_dsn(dsn_text).nets) if n.name == "GND")
|
||||
assert gnd in result.result.routed_net_numbers
|
||||
|
||||
|
||||
def test_a_through_hole_pad_inside_a_plane_needs_no_route():
|
||||
from freeroute.route.grid_router import _connected_groups
|
||||
|
||||
@@ -226,29 +211,3 @@ def test_a_through_hole_pad_inside_a_plane_needs_no_route():
|
||||
groups = _connected_groups(gnd_pins, plane, frozenset(id(z) for z in plane))
|
||||
hub = next(g for g in groups if g[1])
|
||||
assert [p.component_ref for p in hub[0]] == ["GT"]
|
||||
|
||||
|
||||
def test_a_pad_inside_a_via_keepout_reaches_the_plane_by_a_via_outside_it():
|
||||
# a sensor's GND pad: vias are forbidden under the body, so the route
|
||||
# has to leave on the top layer and drop to the plane past the keepout
|
||||
dsn = parse_dsn("""(pcb repro (parser) (resolution um 10) (unit um)
|
||||
(structure
|
||||
(layer F.Cu (type signal)) (layer In1.Cu (type power)) (layer In2.Cu (type power))
|
||||
(layer B.Cu (type signal))
|
||||
(boundary (path pcb 0 0 0 20000 0 20000 -20000 0 -20000 0 0))
|
||||
(plane GND (polygon In1.Cu 0 500 -500 19500 -500 19500 -19500 500 -19500 500 -500))
|
||||
(via_keepout "" (polygon signal 0 8500 -8500 11500 -8500 11500 -11500 8500 -11500 8500 -8500))
|
||||
(via "Via[0-3]_600:300_um") (rule (width 150) (clearance 150)))
|
||||
(placement (component S (place G1 10000 -10000 front 0)))
|
||||
(library
|
||||
(image S (pin smd 1 0 0))
|
||||
(padstack smd (shape (rect F.Cu -175 -300 175 300)) (attach off))
|
||||
(padstack "Via[0-3]_600:300_um" (shape (circle F.Cu 600)) (shape (circle B.Cu 600)) (attach off)))
|
||||
(network (net GND (pins G1-1))))""")
|
||||
exact, scale, _names = route_dsn_board_exact(dsn, resolution=2)
|
||||
assert exact.result.failed == []
|
||||
(via,) = exact.result.vias[1]
|
||||
half = 300 * scale # the via's radius
|
||||
outside = (via.x + half <= 8500 * scale or via.x - half >= 11500 * scale
|
||||
or via.y - half >= -8500 * scale or via.y + half <= -11500 * scale)
|
||||
assert outside, f"via at {via} is inside the via keepout"
|
||||
|
||||
@@ -1,43 +0,0 @@
|
||||
"""--rollback: a rip-up that loses connections is undone, leaving no trace."""
|
||||
|
||||
from __future__ import annotations
|
||||
|
||||
from pathlib import Path
|
||||
|
||||
import pytest
|
||||
|
||||
from freeroute.board import build_board
|
||||
from freeroute.dsn import parse_dsn
|
||||
from freeroute.route.grid_router import GridRouter
|
||||
from freeroute.route.pipeline import _rule_clearance_dsn, _rule_width_dsn, route_dsn_board
|
||||
|
||||
FIXTURES = Path(__file__).resolve().parent.parent / "dsn" / "fixtures"
|
||||
|
||||
|
||||
def _routed_router(name):
|
||||
dsn = parse_dsn((FIXTURES / name).read_text())
|
||||
s = dsn.resolution.value
|
||||
router = GridRouter(
|
||||
build_board(dsn),
|
||||
trace_width=round(_rule_width_dsn(dsn) * s),
|
||||
clearance=round(_rule_clearance_dsn(dsn) * s),
|
||||
rollback=True,
|
||||
)
|
||||
return router, router.route()
|
||||
|
||||
|
||||
@pytest.mark.parametrize("name", ["ripup_needed.dsn", "true_density.dsn", "kicad_routable.dsn"])
|
||||
def test_occupancy_only_holds_routed_connections(name):
|
||||
router, _ = _routed_router(name)
|
||||
conns = router._conns
|
||||
assert all(conns[i].routed for i in router._cell_owner.values())
|
||||
assert all(conns[i].routed for claims in router._via_claims.values() for i in claims)
|
||||
assert all(conns[i].routed for claims in router._halo.values() for i in claims)
|
||||
|
||||
|
||||
@pytest.mark.parametrize("name", ["ripup_needed.dsn", "true_density.dsn", "kicad_routable.dsn"])
|
||||
def test_rollback_never_routes_fewer_than_plain_rip_up(name):
|
||||
text = (FIXTURES / name).read_text()
|
||||
plain, _, _ = route_dsn_board(parse_dsn(text), rollback=False)
|
||||
undo, _, _ = route_dsn_board(parse_dsn(text))
|
||||
assert undo.unrouted <= plain.unrouted
|
||||
@@ -1,58 +0,0 @@
|
||||
"""Pins of a 1.27 mm pitch row routed at 1.0 mm (the RN2483 module on the
|
||||
TTN Enschede mote). A trace centre has to stay within 0.06 mm of a pin's
|
||||
centreline to pass its neighbours, which no grid column hits, so a route
|
||||
leaves each pin straight along that line and only jogs to its column once
|
||||
past the pads. FreeRouting routes this row in full the same way."""
|
||||
|
||||
from __future__ import annotations
|
||||
|
||||
import pytest
|
||||
|
||||
from freeroute.board import build_board
|
||||
from freeroute.board.items import Pin
|
||||
from freeroute.dsn import parse_dsn
|
||||
from freeroute.geometry import IntPoint
|
||||
from freeroute.route.grid_router import GridRouter
|
||||
from freeroute.route.pipeline import route_dsn_board_exact
|
||||
|
||||
|
||||
def _row(x0: int, pins: int = 6, skew: int = 3000) -> str:
|
||||
places = " ".join(f"(place R{i} {x0 + 1270 * i} -5000 front 0)" for i in range(pins))
|
||||
places += " " + " ".join(
|
||||
f"(place T{i} {x0 + 1270 * i + skew} -15000 front 0)" for i in range(pins)
|
||||
)
|
||||
nets = " ".join(f"(net N{i} (pins R{i}-1 T{i}-1))" for i in range(pins))
|
||||
return f"""(pcb t (parser) (resolution um 10) (unit um)
|
||||
(structure (layer F.Cu (type signal)) (layer B.Cu (type signal))
|
||||
(boundary (path pcb 0 0 0 30000 0 30000 -20000 0 -20000 0 0))
|
||||
(via "Via[0-1]_600:400_um") (rule (width 1000) (clearance 200)))
|
||||
(placement (component P {places}))
|
||||
(library (image P (pin pad 1 0 0))
|
||||
(padstack pad (shape (rect F.Cu -508 -762 508 762)) (attach off))
|
||||
(padstack "Via[0-1]_600:400_um" (shape (circle F.Cu 600)) (shape (circle B.Cu 600))
|
||||
(attach off)))
|
||||
(network {nets}))"""
|
||||
|
||||
|
||||
@pytest.mark.parametrize("x0", [5000, 5150, 5300])
|
||||
def test_every_pin_of_a_row_leaves_straight_and_routes(x0):
|
||||
# three offsets of the row against the grid; before, 2 or 3 of 6 routed
|
||||
result, _, _ = route_dsn_board_exact(parse_dsn(_row(x0)), resolution=2)
|
||||
assert len(result.routed_net_numbers) == 6
|
||||
assert result.drc_clean
|
||||
|
||||
|
||||
def test_a_walled_in_pin_may_escape_to_the_column_either_side():
|
||||
# two pins side by side leaving the same way can then jog apart
|
||||
board = build_board(parse_dsn(_row(5000)))
|
||||
router = GridRouter(board, trace_width=10000, clearance=2000, orthogonal=True, resolution=2)
|
||||
router._conns = router._build_connections()
|
||||
pin = next(
|
||||
p for p in board.get_items()
|
||||
if isinstance(p, Pin) and p.location == IntPoint(50000 + 2 * 12700, -50000)
|
||||
)
|
||||
net = pin.net_nos[0]
|
||||
cx, cy = router._cell_of(pin.location)
|
||||
nodes = router._escape_nodes(pin, net, router._conns, [0], (cx, cy))
|
||||
columns = {x for x, y, _ in nodes if y != cy}
|
||||
assert {cx - 1, cx, cx + 1} <= columns
|
||||
@@ -1,136 +0,0 @@
|
||||
"""Vias keep hole-to-hole spacing, even within one net."""
|
||||
|
||||
from __future__ import annotations
|
||||
|
||||
import itertools
|
||||
import math
|
||||
|
||||
from freeroute.dsn import parse_dsn
|
||||
from freeroute.route.pipeline import route_dsn_board_exact
|
||||
|
||||
# four GND pads 0.5 mm apart over a GND plane: each drops a via to the plane
|
||||
_DSN = """(pcb holes (parser) (resolution um 10) (unit um)
|
||||
(structure
|
||||
(layer F.Cu (type signal)) (layer In1.Cu (type power)) (layer In2.Cu (type power))
|
||||
(layer B.Cu (type signal))
|
||||
(boundary (path pcb 0 0 0 20000 0 20000 -20000 0 -20000 0 0))
|
||||
(plane GND (polygon In1.Cu 0 500 -500 19500 -500 19500 -19500 500 -19500 500 -500))
|
||||
(via "Via[0-3]_500:300_um") (rule (width 150) (clearance 150)))
|
||||
(placement (component S (place G1 9000 -10000 front 0) (place G2 9500 -10000 front 0)
|
||||
(place G3 10000 -10000 front 0) (place G4 10500 -10000 front 0)))
|
||||
(library
|
||||
(image S (pin smd 1 0 0))
|
||||
(padstack smd (shape (rect F.Cu -150 -300 150 300)) (attach off))
|
||||
(padstack "Via[0-3]_500:300_um" (shape (circle F.Cu 500)) (shape (circle B.Cu 500)) (attach off)))
|
||||
(network (net GND (pins G1-1 G2-1 G3-1 G4-1))))"""
|
||||
|
||||
|
||||
def test_a_nets_own_vias_keep_hole_to_hole_spacing():
|
||||
dsn = parse_dsn(_DSN)
|
||||
exact, scale, _ = route_dsn_board_exact(dsn, resolution=2)
|
||||
assert exact.result.failed == []
|
||||
vias = exact.result.vias[1]
|
||||
assert len(set(vias)) == len(vias), "a via written twice"
|
||||
need = (300 + 250) * scale # drill + 0.25 mm, centre to centre
|
||||
for a, b in itertools.combinations(vias, 2):
|
||||
assert math.hypot(a.x - b.x, a.y - b.y) >= need, f"vias at {a} and {b} too close"
|
||||
|
||||
|
||||
def test_connections_sharing_a_plane_via_write_it_once():
|
||||
# eight GND pads 0.4 mm apart: the hole spacing makes several of them
|
||||
# end on the same plane via, which must come out once, not once each
|
||||
pads = " ".join(f"(place G{i} {9000 + 400 * i} -10000 front 0)" for i in range(8))
|
||||
pins = " ".join(f"G{i}-1" for i in range(8))
|
||||
dsn = parse_dsn(
|
||||
_DSN.replace(
|
||||
"(place G1 9000 -10000 front 0) (place G2 9500 -10000 front 0)\n"
|
||||
" (place G3 10000 -10000 front 0) (place G4 10500 -10000 front 0)",
|
||||
pads,
|
||||
)
|
||||
.replace("(pins G1-1 G2-1 G3-1 G4-1)", f"(pins {pins})")
|
||||
.replace("(rect F.Cu -150 -300 150 300)", "(rect F.Cu -125 -300 125 300)")
|
||||
)
|
||||
exact, _scale, _ = route_dsn_board_exact(dsn, resolution=2)
|
||||
vias = exact.result.vias[1]
|
||||
assert len(vias) < 8, "no via is shared, so this board no longer tests sharing"
|
||||
assert len(set(vias)) == len(vias), "a shared via written more than once"
|
||||
|
||||
|
||||
def _router(dsn_text, via_drill_um=300):
|
||||
from freeroute.board import build_board
|
||||
from freeroute.route.grid_router import GridRouter
|
||||
from freeroute.route.pipeline import _rule_clearance_dsn, _rule_width_dsn
|
||||
|
||||
dsn = parse_dsn(dsn_text)
|
||||
s = dsn.resolution.value
|
||||
return GridRouter(
|
||||
build_board(dsn), trace_width=round(_rule_width_dsn(dsn) * s),
|
||||
clearance=round(_rule_clearance_dsn(dsn) * s), resolution=2, orthogonal=True,
|
||||
via_drill=via_drill_um * s, hole_to_hole=250 * s,
|
||||
), s
|
||||
|
||||
|
||||
_THT = """(pcb tht (parser) (resolution um 10) (unit um)
|
||||
(structure (layer F.Cu (type signal)) (layer B.Cu (type signal))
|
||||
(boundary (path pcb 0 0 0 20000 0 20000 -20000 0 -20000 0 0))
|
||||
(via "Via[0-1]_500:300_um") (rule (width 150) (clearance 150)))
|
||||
(placement (component T (place J1 10000 -10000 front 0)))
|
||||
(library (image T (pin tht 1 0 0))
|
||||
(padstack tht (shape (circle F.Cu 1700)) (shape (circle B.Cu 1700)) (attach off))
|
||||
(padstack "Via[0-1]_500:300_um" (shape (circle F.Cu 500)) (shape (circle B.Cu 500)) (attach off)))
|
||||
(network (net SIG (pins J1-1))))"""
|
||||
|
||||
|
||||
def test_no_via_goes_near_a_through_hole_pads_hole_even_of_its_own_net():
|
||||
router, s = _router(_THT)
|
||||
pin = router._cell_of(router.board.get_pins()[0].location)
|
||||
assert not router._holes_clear(pin, 1) # own net, right on the pad
|
||||
far = (pin[0] + 40, pin[1])
|
||||
assert router._holes_clear(far, 1)
|
||||
|
||||
|
||||
def test_a_via_in_a_pad_keeps_hole_spacing_from_a_fixed_via():
|
||||
from freeroute.geometry import IntPoint
|
||||
|
||||
text = _THT.replace("(network (net SIG (pins J1-1))))",
|
||||
"(network (net SIG (pins J1-1)))\n"
|
||||
" (wiring (via \"Via[0-1]_500:300_um\" 3000 -3000 (net SIG) (type route))))")
|
||||
router, s = _router(text)
|
||||
assert not router._hole_clear_at(IntPoint(3400 * s, -3000 * s)) # 0.4 mm < 0.55 mm
|
||||
assert router._hole_clear_at(IntPoint(3600 * s, -3000 * s))
|
||||
|
||||
|
||||
def test_hole_spacing_from_a_fixed_via_is_measured_from_where_it_really_is():
|
||||
# a fixed via off the grid with its own 0.25 mm drill, and the router's
|
||||
# via a smaller 0.2 mm one (the flight controller's case): a new via needs
|
||||
# its centre 0.1 + 0.125 + 0.25 = 0.475 mm away, measured exactly, where
|
||||
# one rule for all vias gave 0.2 + 0.25 = 0.45 from the cell centres
|
||||
text = _THT.replace("(network (net SIG (pins J1-1))))",
|
||||
"(network (net SIG (pins J1-1)) (net GND))\n"
|
||||
" (wiring (via \"Via[0-1]_500:250_um\" 3030 -3030 (net GND) (type route))))")
|
||||
text = text.replace(
|
||||
'(attach off)))\n (network',
|
||||
'(attach off))\n (padstack "Via[0-1]_500:250_um" (shape (circle F.Cu 500)) '
|
||||
'(shape (circle B.Cu 500)) (attach off)))\n (network',
|
||||
)
|
||||
router, s = _router(text, via_drill_um=200)
|
||||
via = next(v for v in router.board.get_items() if getattr(v, "drill", 0))
|
||||
assert via.drill == 250 * s
|
||||
loc = via.location
|
||||
for cell in [(x, y) for x in range(router.cols) for y in range(router.rows)]:
|
||||
c = router._cell_center(cell)
|
||||
d = math.hypot(c.x - loc.x, c.y - loc.y)
|
||||
if router.step * 1.5 < d < 470 * s:
|
||||
assert not router._holes_clear(cell, 1), f"{d / s:.0f} um from the fixed via"
|
||||
elif 560 * s < d < 700 * s and cell not in router._tht_block:
|
||||
assert router._holes_clear(cell, 1)
|
||||
|
||||
|
||||
def test_a_route_keeps_its_own_vias_apart():
|
||||
# a route that changed layer at (10, 10) may not change layer again one
|
||||
# cell away; the same cell is the same through via, and far is fine
|
||||
router, _s = _router(_THT)
|
||||
came_from = {(10, 10, 1): (10, 10, 0), (11, 10, 1): (10, 10, 1), (12, 10, 1): (11, 10, 1)}
|
||||
assert router._near_path_via((12, 10, 1), (11, 10), came_from)
|
||||
assert not router._near_path_via((12, 10, 1), (10, 10), came_from)
|
||||
assert not router._near_path_via((12, 10, 1), (40, 10), came_from)
|
||||
+1
-1
@@ -158,7 +158,7 @@ def test_cli_supported_combinations_are_accepted(tmp_path):
|
||||
"orders": ["--orders", "2"],
|
||||
"promote": ["--promote-failures", "2"],
|
||||
"access": ["--access-cost", "5"],
|
||||
"rollback": ["--no-rollback"],
|
||||
"escapes": ["--reserve-escapes"],
|
||||
}
|
||||
for engine, options in ENGINE_OPTIONS.items():
|
||||
for option in options:
|
||||
|
||||
Reference in New Issue
Block a user