rsp2k
45b3753cff
Fixed tracks and vias only kept other nets away, so a pin fanned out to its plane was routed to the plane again, beside its own fan-out. Pins, zones and planes that fixed copper of their net touches now form one connected group: a fanned-out supply pin needs nothing more, a fanned-out signal routes from its via, and copper touching no pin or zone adds nothing to route.
94 lines
4.3 KiB
Python
94 lines
4.3 KiB
Python
"""Tracks and vias already on the board (the DSN's wiring) are fixed copper."""
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from __future__ import annotations
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from freeroute.board import build_board
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from freeroute.dsn import parse_dsn
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from freeroute.route.pipeline import route_dsn_board_exact
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_DSN = """(pcb wired (parser) (resolution um 10) (unit um)
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(structure
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(layer F.Cu (type signal)) (layer B.Cu (type signal))
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(boundary (path pcb 0 0 0 30000 0 30000 -20000 0 -20000 0 0))
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(via "Via[0-1]_600:300_um") (rule (width 250) (clearance 200)))
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(placement (component S (place A1 5000 -10000 front 0) (place A2 25000 -10000 front 0)))
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(library
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(image S (pin smd 1 0 0))
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(padstack smd (shape (rect F.Cu -400 -400 400 400)) (attach off))
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(padstack "Via[0-1]_600:300_um" (shape (circle F.Cu 600)) (shape (circle B.Cu 600)) (attach off)))
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(network (net SIG (pins A1-1 A2-1)) (net GND))
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(wiring
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(wire (path F.Cu 400 15000 0 15000 -20000) (net GND) (type route))
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(via "Via[0-1]_600:300_um" 8000 -14000 (net GND) (type route))))"""
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def test_wiring_is_read_with_its_nets():
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dsn = parse_dsn(_DSN)
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assert [(w.net, w.layer, w.width) for w in dsn.wires] == [("GND", "F.Cu", 400.0)]
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assert [(v.net, v.x, v.y) for v in dsn.vias] == [("GND", 8000.0, -14000.0)]
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def test_wiring_is_fixed_copper_and_not_a_connection_to_route():
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board = build_board(parse_dsn(_DSN))
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copper = board.get_fixed_copper()
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gnd = next(n.net_number for n in board.nets if n.name == "GND")
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assert copper and all(net == gnd for net, _, _ in copper)
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assert not any(gnd in p.net_nos for p in board.get_pins())
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def test_other_nets_route_around_a_fixed_track():
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dsn = parse_dsn(_DSN)
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exact, scale, names = route_dsn_board_exact(dsn, resolution=2)
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sig = next(i + 1 for i, n in enumerate(dsn.nets) if n.name == "SIG")
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assert sig in exact.result.routed_net_numbers
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assert exact.drc_clean
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wall = 15000 * scale
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for layer, pts in exact.result.wires.get(sig, []):
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if names[layer] != "F.Cu":
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continue
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for p, q in zip(pts, pts[1:], strict=False):
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assert not (min(p.x, q.x) < wall < max(p.x, q.x)), "crossed the GND track on F.Cu"
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# --- fixed wiring as connectivity ------------------------------------------
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_FANOUT = """(pcb fanout (parser) (resolution um 10) (unit um)
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(structure
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(layer F.Cu (type signal)) (layer In1.Cu (type power)) (layer In2.Cu (type power))
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(layer B.Cu (type signal))
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(boundary (path pcb 0 0 0 30000 0 30000 -20000 0 -20000 0 0))
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(plane GND (polygon In1.Cu 0 500 -500 29500 -500 29500 -19500 500 -19500 500 -500))
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(via "Via[0-3]_600:300_um") (rule (width 150) (clearance 150)))
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(placement (component S (place G1 5000 -10000 front 0) (place A 10000 -10000 front 0)
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(place B 25000 -11500 back 0)))
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(library
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(image S (pin smd 1 0 0))
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(padstack smd (shape (rect F.Cu -300 -300 300 300)) (attach off))
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(padstack "Via[0-3]_600:300_um" (shape (circle F.Cu 600)) (shape (circle B.Cu 600)) (attach off)))
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(network (net GND (pins G1-1)) (net SIG (pins A-1 B-1)))
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(wiring
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(wire (path F.Cu 150 5000 -10000 5000 -11500) (net GND) (type route))
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(via "Via[0-3]_600:300_um" 5000 -11500 (net GND) (type route))
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(wire (path F.Cu 150 10000 -10000 10000 -11500) (net SIG) (type route))
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(via "Via[0-3]_600:300_um" 10000 -11500 (net SIG) (type route))
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(wire (path F.Cu 300 2000 -2000 8000 -2000) (net GND) (type route))))"""
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def test_a_pad_fanned_out_to_its_plane_needs_no_route():
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dsn = parse_dsn(_FANOUT)
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exact, _scale, _names = route_dsn_board_exact(dsn, resolution=2)
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gnd = next(i + 1 for i, n in enumerate(dsn.nets) if n.name == "GND")
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assert exact.result.failed == []
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assert not exact.result.vias.get(gnd) and not exact.result.wires.get(gnd)
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def test_a_fanned_out_signal_is_routed_from_its_via():
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# B is on the bottom face, level with A's fan-out via: starting from that
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# via on B.Cu is the cheapest way, and needs no via of its own
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dsn = parse_dsn(_FANOUT)
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exact, scale, names = route_dsn_board_exact(dsn, resolution=2)
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sig = next(i + 1 for i, n in enumerate(dsn.nets) if n.name == "SIG")
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assert sig in exact.result.routed_net_numbers
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assert not exact.result.vias.get(sig), "the fan-out via is already there"
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assert {names[layer] for layer, _ in exact.result.wires[sig]} == {"B.Cu"}
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