rsp2k
f1df60fc31
Measured against KiCad's own pads on the TerraHawk rc4 power stage: - Back-side parts kept their pads on F.Cu (32 pads). Mirror the copper layer for a back-side part. - Pad outlines were copied unrotated (29 pads on rotated parts). Place the outline through the same chain as the pin: pin rotation, back-side mirror, part rotation. Oval pads, a path with a width, came out as a zero-height sliver; pad them out by the aperture. - Multi-shape padstacks used the first shape; use the largest. - Footprint-level keepouts were parsed but never placed. KiCad exports a mounting hole's plated ring that way, so the router could not see it. - Vias were sized like a trace (0.25 mm square for a 0.6 mm via), and every remaining short and clearance error was a via. Read the size from the DSN's via padstack and use it in all three engines; the grid engine now reserves the cells a via's copper reaches. With these the exact and room engines route that board with no shorts, clearance or other DRC errors. Pins now carry their component reference.
199 lines
6.9 KiB
Python
199 lines
6.9 KiB
Python
"""DSN -> board construction invariants, validated on a real KiCad board.
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There is no unit-test oracle for the board model, so these assert structural
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invariants against the parsed DSN (the source of truth) and — when a JVM + JAR
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are available — cross-check the board's net set against the reference router's
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routed net set.
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Fixture: ``tests/dsn/fixtures/kicad_routable.dsn`` (a KiCad pcbnew export).
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"""
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from __future__ import annotations
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from pathlib import Path
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import sys
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import pytest
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from freeroute.board import BasicBoard, ObstacleArea, Pin, build_board
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from freeroute.dsn import parse_dsn
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from freeroute.geometry import IntPoint
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sys.path.insert(0, str(Path(__file__).resolve().parent.parent))
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FIXTURES = Path(__file__).resolve().parent.parent / "dsn" / "fixtures"
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ROUTABLE = FIXTURES / "kicad_routable.dsn"
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@pytest.fixture(scope="module")
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def dsn():
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return parse_dsn(ROUTABLE.read_text())
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@pytest.fixture(scope="module")
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def board(dsn) -> BasicBoard:
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return build_board(dsn)
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# --- structural counts match the DSN ----------------------------------------
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def test_layer_count_matches_dsn(dsn, board):
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assert board.get_layer_count() == len(dsn.layers)
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assert [layer.name for layer in board.layer_structure.arr] == [
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layer.name for layer in dsn.layers
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]
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def test_net_count_matches_dsn(dsn, board):
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assert len(board.nets) == len(dsn.nets)
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assert board.nets.names() == {n.name for n in dsn.nets}
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def test_pin_count_matches_placement(dsn, board):
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images = {img.name: img for img in dsn.images}
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expected = sum(
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len(images[pl.lib_name].pins)
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for pl in dsn.placements
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for place in pl.places
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if place.x is not None and pl.lib_name in images
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)
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assert len(board.get_pins()) == expected
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assert expected > 0
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def test_obstacle_count_matches_keepouts(dsn, board):
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# Board-level keepouts plus every placed instance of a footprint-level one.
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# This fixture has none of the first and six plated mounting holes, whose
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# copper KiCad exports as a keepout on each layer.
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images = {img.name: img for img in dsn.images}
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placed = 0
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for placement in dsn.placements:
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image = images.get(placement.lib_name)
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if image is None:
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continue
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per_part = len(image.keepouts) + len(image.via_keepouts) + len(image.wire_keepouts)
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placed += per_part * sum(p.x is not None for p in placement.places)
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assert len(dsn.keepouts) == 0
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assert placed == 12
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assert len(board.get_obstacle_areas()) == placed
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# --- per-item invariants ----------------------------------------------------
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def test_every_pin_shape_contains_its_origin(board):
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pins = board.get_pins()
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assert pins
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for pin in pins:
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assert pin.shape_contains_origin(), f"pad shape missed origin for pin {pin.name}"
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def test_every_pin_reports_a_net(dsn, board):
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# this board's netlist connects every pad, so every pin has a net number
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for pin in board.get_pins():
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assert pin.net_nos, f"pin {pin.name} has no net"
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for net_no in pin.net_nos:
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assert board.nets.get_by_number(net_no) is not None
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def test_items_report_correct_net_membership(board):
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for pin in board.get_pins():
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for net_no in pin.net_nos:
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assert pin in board.get_connectable_items(net_no)
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def test_pin_layers_are_valid(board):
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n_layers = board.get_layer_count()
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for pin in board.get_pins():
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assert pin.layers
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assert all(0 <= layer < n_layers for layer in pin.layers)
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def test_bounding_box_is_non_degenerate(board):
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assert not board.bounding_box.is_empty()
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assert board.bounding_box.dimension() == 2
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# every pin location lies within the board bounding box
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for pin in board.get_pins():
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assert board.bounding_box.contains(pin.location)
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def test_item_types(board):
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for item in board.get_items():
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assert isinstance(item, (Pin, ObstacleArea))
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# --- oracle cross-check ------------------------------------------------------
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@pytest.mark.oracle
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def test_board_net_set_covers_oracle_routed_nets(board):
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from oracle import HAS_ORACLE, route_dsn, routed_net_set
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if not HAS_ORACLE:
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pytest.skip("FreeRouting oracle unavailable")
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# Routing the full board is slow; a couple of passes is enough to route most
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# nets, and a generous timeout absorbs JVM start-up variance.
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ses = route_dsn(ROUTABLE, max_passes=2, timeout=420)
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routed = routed_net_set(ses)
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assert routed, "oracle produced no routed nets"
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# every net the reference router routed exists on our constructed board
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assert routed <= board.nets.names()
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# --- keepouts as KiCad exports them ------------------------------------------
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# Found on the TerraHawk charge-node boards (2026-09-27): a no-track ring along
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# the board edge arrives as one keyhole polygon, "keep router off" rule areas
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# arrive as wire_keepout, and neither may block the board's interior.
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_RING_DSN = """(pcb ring (parser) (resolution um 10) (unit um)
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(structure
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(layer F.Cu (type signal)) (layer B.Cu (type signal))
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(boundary (path pcb 0 0 0 40000 0 40000 -30000 0 -30000 0 0))
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(keepout "" (polygon F.Cu 0 0 0 40000 0 40000 -30000 0 -30000 0 0
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500 -500 500 -29500 39500 -29500 39500 -500 500 -500 0 0))
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(wire_keepout "pour" (polygon F.Cu 0 10000 -10000 20000 -10000 20000 -20000 10000 -20000))
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(place_keepout "courtyard" (polygon F.Cu 0 30000 -10000 35000 -10000 35000 -20000 30000 -20000))
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(rule (width 250) (clearance 150)))
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(placement) (library) (network))"""
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def _areas(dsn_text):
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return build_board(parse_dsn(dsn_text)).get_obstacle_areas()
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def _blocked(areas, x_um, y_um):
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p = IntPoint(x_um * 10, y_um * 10)
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return any(t.contains(p) for a in areas for t in a.tiles)
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def test_keyhole_ring_keepout_blocks_only_the_border():
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areas = _areas(_RING_DSN)
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assert _blocked(areas, 200, -15000) # inside the 0.5 mm edge strip
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assert not _blocked(areas, 5000, -5000) # open board interior
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def test_wire_keepout_is_read_and_blocks_its_area():
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dsn = parse_dsn(_RING_DSN)
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assert [k.kind for k in dsn.keepouts].count("wire_keepout") == 1
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assert _blocked(_areas(_RING_DSN), 15000, -15000)
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def test_place_keepout_does_not_block_routing():
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assert not _blocked(_areas(_RING_DSN), 32500, -15000)
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def test_grid_router_leaves_the_interior_of_a_ring_keepout_open():
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from freeroute.route.pipeline import route_dsn_board
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ring_only = "\n".join(
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line for line in _RING_DSN.splitlines() if "wire_keepout" not in line
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).replace(
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"(placement) (library) (network)",
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"(placement (component P (place P1 5000 -15000 front 0) (place P2 35000 -15000 front 0)))\n"
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" (library (image P (pin pad 1 0 0)) (padstack pad (shape (circle F.Cu 600)) (attach off)))\n"
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" (network (net N (pins P1-1 P2-1)))",
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)
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result, _, _ = route_dsn_board(parse_dsn(ring_only), max_passes=2)
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assert result.routed_net_numbers
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